Alexander Gladtsin лет назад: 6
Родитель
Сommit
d5cd747fd7
55 измененных файлов с 43351 добавлено и 27 удалено
  1. 0 3
      FPGA/CNC/step_driver_control/_xmsgs/pn_parser.xmsgs
  2. 4 7
      FPGA/CNC/step_driver_control/distance_module_summary.html
  3. 1 0
      FPGA/CNC/step_driver_control/div_static_main.jhd
  4. 12 0
      FPGA/CNC/step_driver_control/div_static_main.sch
  5. 7 9
      FPGA/CNC/step_driver_control/iseconfig/step_driver_control.projectmgr
  6. 4 4
      FPGA/CNC/step_driver_control/iseconfig/topboard.xreport
  7. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg
  8. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/distance_module_distance_module_sch_tb_isim_beh.exe
  9. 0 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/isimcrash.log
  10. 29 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/isimkernel.log
  11. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/netId.dat
  12. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/tmp_save/_1
  13. 31 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisim/p_0947159679.c
  14. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisim/p_0947159679.didat
  15. 74 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_02553951401163808816_4245414866.c
  16. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_02553951401163808816_4245414866.didat
  17. 68 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_03367362533346577578_2449448540.c
  18. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_03367362533346577578_2449448540.didat
  19. 71 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_15469197826776211918_2316096324.c
  20. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_15469197826776211918_2316096324.didat
  21. 378 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/a_3902403662_3212880686.c
  22. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/a_3902403662_3212880686.didat
  23. 61 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/distance_module_distance_module_sch_tb_isim_beh.exe_main.c
  24. 88 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_07742682270452569587_1440303589.c
  25. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_07742682270452569587_1440303589.didat
  26. 139 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_15498981380621964558_3982910969.c
  27. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_15498981380621964558_3982910969.didat
  28. 138 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_1812407904.c
  29. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_1812407904.didat
  30. 138 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_3656180732.c
  31. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_3656180732.didat
  32. 337 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.c
  33. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.didat
  34. 135 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2020177359.c
  35. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2020177359.didat
  36. 135 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2072830841.c
  37. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2072830841.didat
  38. 354 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_1148960553.c
  39. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_1148960553.didat
  40. 354 0
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_2586023783.c
  41. BIN
      FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_2586023783.didat
  42. BIN
      FPGA/CNC/step_driver_control/isim/temp/distance_module_distance_module_sch_tb.vdb
  43. BIN
      FPGA/CNC/step_driver_control/isim/work/distance_module_distance_module_sch_tb.vdb
  44. 1 0
      FPGA/CNC/step_driver_control/manual_set.jhd
  45. 12 0
      FPGA/CNC/step_driver_control/manual_set.sch
  46. 7 0
      FPGA/CNC/step_driver_control/step_driver_control.gise
  47. 7 3
      FPGA/CNC/step_driver_control/step_driver_control.xise
  48. 2957 0
      HARD/Knife/m_knife_1.b##
  49. 2951 0
      HARD/Knife/m_knife_1.b#1
  50. 2961 0
      HARD/Knife/m_knife_1.brd
  51. 8371 0
      HARD/Knife/m_knife_1.s##
  52. 15012 0
      HARD/Knife/m_knife_1.s#1
  53. 8513 0
      HARD/Knife/m_knife_1.sch
  54. 1 1
      HARD/Knife_7-7/eagle.epf
  55. BIN
      HARD/Vape_v2/spec.odt

+ 0 - 3
FPGA/CNC/step_driver_control/_xmsgs/pn_parser.xmsgs

@@ -8,8 +8,5 @@
 <!-- Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.    -->
 
 <messages>
-<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file &quot;/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/indic_4reg_dec_test.vhd&quot; into library work</arg>
-</msg>
-
 </messages>
 

+ 4 - 7
FPGA/CNC/step_driver_control/distance_module_summary.html

@@ -2,7 +2,7 @@
 <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
 <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>i7led_decoder_i7led_decoder_sch_tb Project Status</B></TD></TR>
+<TD ALIGN=CENTER COLSPAN='4'><B>topboard Project Status</B></TD></TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
 <TD>step_driver_control.xise</TD>
@@ -11,7 +11,7 @@
 </TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Module Name:</B></TD>
-<TD>distance_module</TD>
+<TD>topboard</TD>
 <TD BGCOLOR='#FFFF99'><B>Implementation State:</B></TD>
 <TD>Programming File Generated</TD>
 </TR>
@@ -42,10 +42,7 @@
 </TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Environment:</B></dif></TD>
-<TD>
-<A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module_envsettings.html'>
-System Settings</A>
-</TD>
+<TD>&nbsp;</TD>
 <TD BGCOLOR='#FFFF99'><UL><LI><B>Final Timing Score:</B></LI></UL></TD>
 <TD>0 &nbsp;<A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.twx?&DataKey=XmlTimingReport'>(Timing Report)</A></TD>
 </TR>
@@ -395,7 +392,7 @@ System Settings</A>
 &nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='3'><B>Secondary Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=SecondaryReports"><B>[-]</B></a></TD></TR>
 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD COLSPAN='2'><B>Generated</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/isim.log'>ISIM Simulator Log</A></TD><TD>Current</TD><TD COLSPAN='2'>Вт июля 24 01:57:04 2018</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/isim.log'>ISIM Simulator Log</A></TD><TD>Current</TD><TD COLSPAN='2'>Пт июля 27 23:42:30 2018</TD></TR>
 <TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/usage_statistics_webtalk.html'>WebTalk Report</A></TD><TD>Current</TD><TD COLSPAN='2'>Пн июля 23 01:50:40 2018</TD></TR>
 <TR ALIGN=LEFT><TD><A HREF_DISABLED='/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/webtalk.log'>WebTalk Log File</A></TD><TD>Current</TD><TD COLSPAN='2'>Пн июля 23 01:50:40 2018</TD></TR>
 </TABLE>

+ 1 - 0
FPGA/CNC/step_driver_control/div_static_main.jhd

@@ -0,0 +1 @@
+MODULE div_static_main

+ 12 - 0
FPGA/CNC/step_driver_control/div_static_main.sch

@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<drawing version="7">
+    <attr value="spartan6" name="DeviceFamilyName">
+        <trait delete="all:0" />
+        <trait editname="all:0" />
+        <trait edittrait="all:0" />
+    </attr>
+    <netlist>
+    </netlist>
+    <sheet sheetnum="1" width="3520" height="2720">
+    </sheet>
+</drawing>

+ 7 - 9
FPGA/CNC/step_driver_control/iseconfig/step_driver_control.projectmgr

@@ -14,7 +14,7 @@
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
-      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001ad000000020000000000000000000000000200000064ffffffff000000810000000300000002000001ad0000000100000003000000000000000100000003</ViewHeaderState>
+      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000202000000010000000100000064000001e4000000020000000000000000000000000200000064ffffffff000000810000000300000002000001e40000000100000003000000000000000100000003</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
       <CurrentItem>XLXI_4 - indic_4reg_decoder (/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/indic_4reg_decoder.sch)</CurrentItem>
    </ItemView>
@@ -26,13 +26,13 @@
          <ClosedNode>Synthesize - XST</ClosedNode>
       </ClosedNodes>
       <SelectedItems>
-         <SelectedItem></SelectedItem>
+         <SelectedItem/>
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
-      <CurrentItem></CurrentItem>
+      <CurrentItem/>
    </ItemView>
    <ItemView guiview="File" >
       <ClosedNodes>
@@ -95,27 +95,25 @@
          <ClosedNode>/distance_module_distance_module_sch_tb - behavioral |home|trurl|STM32_Devel|FPGA|CNC|step_driver_control|distance_test.vhd</ClosedNode>
          <ClosedNode>/sdc_sdc_sch_tb - behavioral |home|trurl|STM32_Devel|FPGA|CNC|step_driver_control|step_1.vhd</ClosedNode>
       </ClosedNodes>
-      <SelectedItems>
-         <SelectedItem>indic_4reg_decoder_indic_4reg_decoder_sch_tb - behavioral (/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/indic_4reg_dec_test.vhd)</SelectedItem>
-      </SelectedItems>
+      <SelectedItems/>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
       <ViewHeaderState orientation="horizontal" >000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000026b000000020000000000000000000000000200000064ffffffff0000008100000003000000020000026b0000000100000003000000000000000100000003</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
-      <CurrentItem>indic_4reg_decoder_indic_4reg_decoder_sch_tb - behavioral (/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/indic_4reg_dec_test.vhd)</CurrentItem>
+      <CurrentItem>XLXI_3 - sdc_divider (/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/sdc_divider.sch)</CurrentItem>
    </ItemView>
    <ItemView engineview="BehavioralSim" sourcetype="" guiview="Process" >
       <ClosedNodes>
          <ClosedNodesVersion>1</ClosedNodesVersion>
       </ClosedNodes>
       <SelectedItems>
-         <SelectedItem>Update All Schematic Files</SelectedItem>
+         <SelectedItem></SelectedItem>
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
       <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
-      <CurrentItem>Update All Schematic Files</CurrentItem>
+      <CurrentItem></CurrentItem>
    </ItemView>
    <ItemView engineview="BehavioralSim" sourcetype="DESUT_VHDL_ARCHITECTURE" guiview="Process" >
       <ClosedNodes>

+ 4 - 4
FPGA/CNC/step_driver_control/iseconfig/topboard.xreport

@@ -1,11 +1,11 @@
 <?xml version='1.0' encoding='UTF-8'?>
 <report-views version="2.0" >
  <header>
-  <DateModified>2018-07-20T17:55:57</DateModified>
-  <ModuleName>distance_module</ModuleName>
+  <DateModified>2018-07-27T23:42:52</DateModified>
+  <ModuleName>topboard</ModuleName>
   <SummaryTimeStamp>Unknown</SummaryTimeStamp>
-  <SavedFilePath>/home/trurl/STM32_Devel/FPGA/CNC/step_driver_control/iseconfig/topboard.xreport</SavedFilePath>
-  <ImplementationReportsDirectory>/home/trurl/STM32_Devel/FPGA/CNC/step_driver_control/</ImplementationReportsDirectory>
+  <SavedFilePath>/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/iseconfig/topboard.xreport</SavedFilePath>
+  <ImplementationReportsDirectory>/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/</ImplementationReportsDirectory>
   <DateInitialized>2018-07-20T17:55:57</DateInitialized>
   <EnableMessageFiltering>false</EnableMessageFiltering>
  </header>

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/ISimEngine-DesignHierarchy.dbg


BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/distance_module_distance_module_sch_tb_isim_beh.exe


+ 0 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/isimcrash.log


+ 29 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/isimkernel.log

@@ -0,0 +1,29 @@
+Command line:
+   distance_module_distance_module_sch_tb_isim_beh.exe
+     -simmode  gui
+     -simrunnum  0
+     -socket  37207
+
+Fri Jul 27 23:37:49 2018
+
+
+ Elaboration Time: 0.02 sec
+
+ Current Memory Usage: 246.907 Meg
+
+ Total Signals          : 121
+ Total Nets             : 126
+ Total Signal Drivers   : 42
+ Total Blocks           : 21
+ Total Primitive Blocks : 19
+ Total Processes        : 43
+ Total Traceable Variables  : 42
+ Total Scalar Nets and Variables : 780
+Total Line Count : 90
+
+ Total Simulation Time: 0.03 sec
+
+ Current Memory Usage: 322.408 Meg
+
+Fri Jul 27 23:41:34 2018
+

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/netId.dat


BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/tmp_save/_1


+ 31 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisim/p_0947159679.c

@@ -0,0 +1,31 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+
+
+
+
+extern void unisim_p_0947159679_init()
+{
+	xsi_register_didat("unisim_p_0947159679", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisim/p_0947159679.didat");
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisim/p_0947159679.didat


+ 74 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_02553951401163808816_4245414866.c

@@ -0,0 +1,74 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+
+
+
+static void Gate_29_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+    char *t10;
+    char *t11;
+
+LAB0:    t1 = (t0 + 2680U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1368U);
+    t4 = *((char **)t2);
+    t2 = (t0 + 1528U);
+    t5 = *((char **)t2);
+    t2 = (t0 + 3080);
+    t6 = (t2 + 56U);
+    t7 = *((char **)t6);
+    t8 = (t7 + 56U);
+    t9 = *((char **)t8);
+    xsi_vlog_AndGate(t9, 3, t3, t4, t5);
+    t10 = (t0 + 3080);
+    xsi_driver_vfirst_trans(t10, 0, 0);
+    t11 = (t0 + 3000);
+    *((int *)t11) = 1;
+
+LAB1:    return;
+}
+
+
+extern void unisims_ver_m_02553951401163808816_4245414866_init()
+{
+	static char *pe[] = {(void *)Gate_29_0};
+	xsi_register_didat("unisims_ver_m_02553951401163808816_4245414866", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_02553951401163808816_4245414866.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_02553951401163808816_4245414866.didat


+ 68 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_03367362533346577578_2449448540.c

@@ -0,0 +1,68 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+
+
+
+static void Gate_29_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+
+LAB0:    t1 = (t0 + 2360U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 2760);
+    t4 = (t2 + 56U);
+    t5 = *((char **)t4);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    xsi_vlog_notGate(t7, t3);
+    t8 = (t0 + 2760);
+    xsi_driver_vfirst_trans(t8, 0, 0);
+    t9 = (t0 + 2680);
+    *((int *)t9) = 1;
+
+LAB1:    return;
+}
+
+
+extern void unisims_ver_m_03367362533346577578_2449448540_init()
+{
+	static char *pe[] = {(void *)Gate_29_0};
+	xsi_register_didat("unisims_ver_m_03367362533346577578_2449448540", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_03367362533346577578_2449448540.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_03367362533346577578_2449448540.didat


+ 71 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_15469197826776211918_2316096324.c

@@ -0,0 +1,71 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+
+
+
+static void Gate_29_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+    char *t10;
+
+LAB0:    t1 = (t0 + 2520U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1368U);
+    t4 = *((char **)t2);
+    t2 = (t0 + 2920);
+    t5 = (t2 + 56U);
+    t6 = *((char **)t5);
+    t7 = (t6 + 56U);
+    t8 = *((char **)t7);
+    xsi_vlog_AndGate(t8, 2, t3, t4);
+    t9 = (t0 + 2920);
+    xsi_driver_vfirst_trans(t9, 0, 0);
+    t10 = (t0 + 2840);
+    *((int *)t10) = 1;
+
+LAB1:    return;
+}
+
+
+extern void unisims_ver_m_15469197826776211918_2316096324_init()
+{
+	static char *pe[] = {(void *)Gate_29_0};
+	xsi_register_didat("unisims_ver_m_15469197826776211918_2316096324", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_15469197826776211918_2316096324.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/unisims_ver/m_15469197826776211918_2316096324.didat


+ 378 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/a_3902403662_3212880686.c

@@ -0,0 +1,378 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_test.vhd";
+
+
+
+static void work_a_3902403662_3212880686_p_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    int64 t7;
+    int t8;
+    int t9;
+    int t10;
+
+LAB0:    t1 = (t0 + 3464U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(63, ng0);
+    t2 = (t0 + 3848);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(64, ng0);
+    t2 = (t0 + 3912);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(65, ng0);
+    t2 = (t0 + 3976);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(66, ng0);
+    t2 = (t0 + 4040);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(67, ng0);
+    t2 = (t0 + 4104);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(68, ng0);
+    t2 = (t0 + 4168);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(69, ng0);
+    t2 = (t0 + 4232);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(70, ng0);
+    t7 = (100 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB6:    *((char **)t1) = &&LAB7;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(71, ng0);
+    t2 = (t0 + 3976);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(72, ng0);
+    t2 = (t0 + 4040);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(73, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB10:    *((char **)t1) = &&LAB11;
+    goto LAB1;
+
+LAB5:    goto LAB4;
+
+LAB7:    goto LAB5;
+
+LAB8:    xsi_set_current_line(74, ng0);
+    t2 = (t0 + 3976);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(75, ng0);
+    t2 = (t0 + 4040);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(76, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB14:    *((char **)t1) = &&LAB15;
+    goto LAB1;
+
+LAB9:    goto LAB8;
+
+LAB11:    goto LAB9;
+
+LAB12:    xsi_set_current_line(77, ng0);
+    t2 = (t0 + 3848);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(78, ng0);
+    t2 = (t0 + 4104);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(80, ng0);
+    t2 = (t0 + 6937);
+    *((int *)t2) = 0;
+    t3 = (t0 + 6941);
+    *((int *)t3) = 4;
+    t8 = 0;
+    t9 = 4;
+
+LAB16:    if (t8 <= t9)
+        goto LAB17;
+
+LAB19:    xsi_set_current_line(86, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB31:    *((char **)t1) = &&LAB32;
+    goto LAB1;
+
+LAB13:    goto LAB12;
+
+LAB15:    goto LAB13;
+
+LAB17:    xsi_set_current_line(81, ng0);
+    t7 = (10 * 1000LL);
+    t4 = (t0 + 3272);
+    xsi_process_wait(t4, t7);
+
+LAB22:    *((char **)t1) = &&LAB23;
+    goto LAB1;
+
+LAB18:    t2 = (t0 + 6937);
+    t8 = *((int *)t2);
+    t3 = (t0 + 6941);
+    t9 = *((int *)t3);
+    if (t8 == t9)
+        goto LAB19;
+
+LAB28:    t10 = (t8 + 1);
+    t8 = t10;
+    t4 = (t0 + 6937);
+    *((int *)t4) = t8;
+    goto LAB16;
+
+LAB20:    xsi_set_current_line(82, ng0);
+    t2 = (t0 + 3912);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(83, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB26:    *((char **)t1) = &&LAB27;
+    goto LAB1;
+
+LAB21:    goto LAB20;
+
+LAB23:    goto LAB21;
+
+LAB24:    xsi_set_current_line(84, ng0);
+    t2 = (t0 + 3912);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    goto LAB18;
+
+LAB25:    goto LAB24;
+
+LAB27:    goto LAB25;
+
+LAB29:    xsi_set_current_line(87, ng0);
+    t2 = (t0 + 3848);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(88, ng0);
+    t2 = (t0 + 4104);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(89, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB35:    *((char **)t1) = &&LAB36;
+    goto LAB1;
+
+LAB30:    goto LAB29;
+
+LAB32:    goto LAB30;
+
+LAB33:    xsi_set_current_line(90, ng0);
+    t2 = (t0 + 4232);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(92, ng0);
+    t2 = (t0 + 6945);
+    *((int *)t2) = 0;
+    t3 = (t0 + 6949);
+    *((int *)t3) = 800;
+    t8 = 0;
+    t9 = 800;
+
+LAB37:    if (t8 <= t9)
+        goto LAB38;
+
+LAB40:    goto LAB2;
+
+LAB34:    goto LAB33;
+
+LAB36:    goto LAB34;
+
+LAB38:    xsi_set_current_line(93, ng0);
+    t7 = (10 * 1000LL);
+    t4 = (t0 + 3272);
+    xsi_process_wait(t4, t7);
+
+LAB43:    *((char **)t1) = &&LAB44;
+    goto LAB1;
+
+LAB39:    t2 = (t0 + 6945);
+    t8 = *((int *)t2);
+    t3 = (t0 + 6949);
+    t9 = *((int *)t3);
+    if (t8 == t9)
+        goto LAB40;
+
+LAB49:    t10 = (t8 + 1);
+    t8 = t10;
+    t4 = (t0 + 6945);
+    *((int *)t4) = t8;
+    goto LAB37;
+
+LAB41:    xsi_set_current_line(94, ng0);
+    t2 = (t0 + 4168);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)3;
+    xsi_driver_first_trans_fast(t2);
+    xsi_set_current_line(95, ng0);
+    t7 = (10 * 1000LL);
+    t2 = (t0 + 3272);
+    xsi_process_wait(t2, t7);
+
+LAB47:    *((char **)t1) = &&LAB48;
+    goto LAB1;
+
+LAB42:    goto LAB41;
+
+LAB44:    goto LAB42;
+
+LAB45:    xsi_set_current_line(96, ng0);
+    t2 = (t0 + 4168);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t4 + 56U);
+    t6 = *((char **)t5);
+    *((unsigned char *)t6) = (unsigned char)2;
+    xsi_driver_first_trans_fast(t2);
+    goto LAB39;
+
+LAB46:    goto LAB45;
+
+LAB48:    goto LAB46;
+
+}
+
+
+extern void work_a_3902403662_3212880686_init()
+{
+	static char *pe[] = {(void *)work_a_3902403662_3212880686_p_0};
+	xsi_register_didat("work_a_3902403662_3212880686", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/a_3902403662_3212880686.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/a_3902403662_3212880686.didat


+ 61 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/distance_module_distance_module_sch_tb_isim_beh.exe_main.c

@@ -0,0 +1,61 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+#include "xsi.h"
+
+struct XSI_INFO xsi_info;
+
+char *IEEE_P_1242562249;
+char *IEEE_P_2592010699;
+char *STD_STANDARD;
+char *UNISIM_P_0947159679;
+char *VL_P_2533777724;
+
+
+int main(int argc, char **argv)
+{
+    xsi_init_design(argc, argv);
+    xsi_register_info(&xsi_info);
+
+    xsi_register_min_prec_unit(-12);
+    work_m_16541823861846354283_2073120511_init();
+    work_m_17101483134921830187_1148960553_init();
+    work_m_16037748242132987739_3656180732_init();
+    work_m_17101483134921830187_2586023783_init();
+    work_m_16037748242132987739_1812407904_init();
+    work_m_16562971922259005791_2072830841_init();
+    work_m_16562971922259005791_2020177359_init();
+    unisims_ver_m_15469197826776211918_2316096324_init();
+    unisims_ver_m_03367362533346577578_2449448540_init();
+    unisims_ver_m_02553951401163808816_4245414866_init();
+    work_m_15498981380621964558_3982910969_init();
+    work_m_07742682270452569587_1440303589_init();
+    ieee_p_2592010699_init();
+    ieee_p_1242562249_init();
+    unisim_p_0947159679_init();
+    vl_p_2533777724_init();
+    work_a_3902403662_3212880686_init();
+
+
+    xsi_register_tops("work_a_3902403662_3212880686");
+    xsi_register_tops("work_m_16541823861846354283_2073120511");
+
+    IEEE_P_1242562249 = xsi_get_engine_memory("ieee_p_1242562249");
+    IEEE_P_2592010699 = xsi_get_engine_memory("ieee_p_2592010699");
+    xsi_register_ieee_std_logic_1164(IEEE_P_2592010699);
+    STD_STANDARD = xsi_get_engine_memory("std_standard");
+    UNISIM_P_0947159679 = xsi_get_engine_memory("unisim_p_0947159679");
+    VL_P_2533777724 = xsi_get_engine_memory("vl_p_2533777724");
+
+    return xsi_run_simulation(argc, argv);
+
+}

+ 88 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_07742682270452569587_1440303589.c

@@ -0,0 +1,88 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+
+
+
+static void Cont_212_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    unsigned int t8;
+    unsigned int t9;
+    char *t10;
+    unsigned int t11;
+    unsigned int t12;
+    char *t13;
+    unsigned int t14;
+    unsigned int t15;
+    char *t16;
+
+LAB0:    t1 = (t0 + 5720U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(212, ng0);
+    t2 = (t0 + 4568U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 6120);
+    t4 = (t2 + 56U);
+    t5 = *((char **)t4);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    memset(t7, 0, 8);
+    t8 = 1U;
+    t9 = t8;
+    t10 = (t3 + 4);
+    t11 = *((unsigned int *)t3);
+    t8 = (t8 & t11);
+    t12 = *((unsigned int *)t10);
+    t9 = (t9 & t12);
+    t13 = (t7 + 4);
+    t14 = *((unsigned int *)t7);
+    *((unsigned int *)t7) = (t14 | t8);
+    t15 = *((unsigned int *)t13);
+    *((unsigned int *)t13) = (t15 | t9);
+    xsi_driver_vfirst_trans(t2, 0, 0);
+    t16 = (t0 + 6040);
+    *((int *)t16) = 1;
+
+LAB1:    return;
+}
+
+
+extern void work_m_07742682270452569587_1440303589_init()
+{
+	static char *pe[] = {(void *)Cont_212_0};
+	xsi_register_didat("work_m_07742682270452569587_1440303589", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_07742682270452569587_1440303589.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_07742682270452569587_1440303589.didat


+ 139 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_15498981380621964558_3982910969.c

@@ -0,0 +1,139 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+static unsigned int ng1[] = {0U, 0U};
+
+
+
+static void Always_36_0(char *t0)
+{
+    char t13[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    char *t11;
+    char *t12;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    unsigned int t18;
+    char *t19;
+    char *t20;
+
+LAB0:    t1 = (t0 + 2816U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(36, ng0);
+    t2 = (t0 + 3136);
+    *((int *)t2) = 1;
+    t3 = (t0 + 2848);
+    *((char **)t3) = t2;
+    *((char **)t1) = &&LAB4;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(37, ng0);
+
+LAB5:    xsi_set_current_line(38, ng0);
+    t4 = (t0 + 1344U);
+    t5 = *((char **)t4);
+    t4 = (t5 + 4);
+    t6 = *((unsigned int *)t4);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t5);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB6;
+
+LAB7:    xsi_set_current_line(40, ng0);
+    t2 = (t0 + 1504U);
+    t3 = *((char **)t2);
+    t2 = (t3 + 4);
+    t6 = *((unsigned int *)t2);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t3);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB9;
+
+LAB10:
+LAB11:
+LAB8:    goto LAB2;
+
+LAB6:    xsi_set_current_line(39, ng0);
+    t11 = ((char*)((ng1)));
+    t12 = (t0 + 1904);
+    xsi_vlogvar_wait_assign_value(t12, t11, 0, 0, 1, 0LL);
+    goto LAB8;
+
+LAB9:    xsi_set_current_line(41, ng0);
+    t4 = (t0 + 1904);
+    t5 = (t4 + 56U);
+    t11 = *((char **)t5);
+    memset(t13, 0, 8);
+    t12 = (t11 + 4);
+    t14 = *((unsigned int *)t12);
+    t15 = (~(t14));
+    t16 = *((unsigned int *)t11);
+    t17 = (t16 & t15);
+    t18 = (t17 & 1U);
+    if (t18 != 0)
+        goto LAB15;
+
+LAB13:    if (*((unsigned int *)t12) == 0)
+        goto LAB12;
+
+LAB14:    t19 = (t13 + 4);
+    *((unsigned int *)t13) = 1;
+    *((unsigned int *)t19) = 1;
+
+LAB15:    t20 = (t0 + 1904);
+    xsi_vlogvar_wait_assign_value(t20, t13, 0, 0, 1, 0LL);
+    goto LAB11;
+
+LAB12:    *((unsigned int *)t13) = 1;
+    goto LAB15;
+
+}
+
+
+extern void work_m_15498981380621964558_3982910969_init()
+{
+	static char *pe[] = {(void *)Always_36_0};
+	xsi_register_didat("work_m_15498981380621964558_3982910969", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_15498981380621964558_3982910969.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_15498981380621964558_3982910969.didat


+ 138 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_1812407904.c

@@ -0,0 +1,138 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+static unsigned int ng1[] = {0U, 0U};
+
+
+
+static void Always_100_0(char *t0)
+{
+    char t13[8];
+    char t14[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    char *t11;
+    char *t12;
+    char *t15;
+    char *t16;
+    unsigned int t17;
+    unsigned int t18;
+    unsigned int t19;
+    unsigned int t20;
+    unsigned int t21;
+    unsigned int t22;
+    char *t23;
+
+LAB0:    t1 = (t0 + 2840U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(100, ng0);
+    t2 = (t0 + 3160);
+    *((int *)t2) = 1;
+    t3 = (t0 + 2872);
+    *((char **)t3) = t2;
+    *((char **)t1) = &&LAB4;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(101, ng0);
+
+LAB5:    xsi_set_current_line(102, ng0);
+    t4 = (t0 + 1368U);
+    t5 = *((char **)t4);
+    t4 = (t5 + 4);
+    t6 = *((unsigned int *)t4);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t5);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB6;
+
+LAB7:    xsi_set_current_line(104, ng0);
+    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t3 + 4);
+    t6 = *((unsigned int *)t2);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t3);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB9;
+
+LAB10:
+LAB11:
+LAB8:    goto LAB2;
+
+LAB6:    xsi_set_current_line(103, ng0);
+    t11 = ((char*)((ng1)));
+    t12 = (t0 + 1928);
+    xsi_vlogvar_wait_assign_value(t12, t11, 0, 0, 16, 0LL);
+    goto LAB8;
+
+LAB9:    xsi_set_current_line(105, ng0);
+    t4 = (t0 + 1528U);
+    t5 = *((char **)t4);
+    t4 = (t0 + 1928);
+    t11 = (t4 + 56U);
+    t12 = *((char **)t11);
+    memset(t14, 0, 8);
+    t15 = (t14 + 4);
+    t16 = (t12 + 4);
+    t17 = *((unsigned int *)t12);
+    t18 = (t17 >> 0);
+    *((unsigned int *)t14) = t18;
+    t19 = *((unsigned int *)t16);
+    t20 = (t19 >> 0);
+    *((unsigned int *)t15) = t20;
+    t21 = *((unsigned int *)t14);
+    *((unsigned int *)t14) = (t21 & 32767U);
+    t22 = *((unsigned int *)t15);
+    *((unsigned int *)t15) = (t22 & 32767U);
+    xsi_vlogtype_concat(t13, 16, 16, 2U, t14, 15, t5, 1);
+    t23 = (t0 + 1928);
+    xsi_vlogvar_wait_assign_value(t23, t13, 0, 0, 16, 0LL);
+    goto LAB11;
+
+}
+
+
+extern void work_m_16037748242132987739_1812407904_init()
+{
+	static char *pe[] = {(void *)Always_100_0};
+	xsi_register_didat("work_m_16037748242132987739_1812407904", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_1812407904.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_1812407904.didat


+ 138 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_3656180732.c

@@ -0,0 +1,138 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+static unsigned int ng1[] = {0U, 0U};
+
+
+
+static void Always_124_0(char *t0)
+{
+    char t13[8];
+    char t14[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    char *t11;
+    char *t12;
+    char *t15;
+    char *t16;
+    unsigned int t17;
+    unsigned int t18;
+    unsigned int t19;
+    unsigned int t20;
+    unsigned int t21;
+    unsigned int t22;
+    char *t23;
+
+LAB0:    t1 = (t0 + 2840U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(124, ng0);
+    t2 = (t0 + 3160);
+    *((int *)t2) = 1;
+    t3 = (t0 + 2872);
+    *((char **)t3) = t2;
+    *((char **)t1) = &&LAB4;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(125, ng0);
+
+LAB5:    xsi_set_current_line(126, ng0);
+    t4 = (t0 + 1368U);
+    t5 = *((char **)t4);
+    t4 = (t5 + 4);
+    t6 = *((unsigned int *)t4);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t5);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB6;
+
+LAB7:    xsi_set_current_line(128, ng0);
+    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t3 + 4);
+    t6 = *((unsigned int *)t2);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t3);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB9;
+
+LAB10:
+LAB11:
+LAB8:    goto LAB2;
+
+LAB6:    xsi_set_current_line(127, ng0);
+    t11 = ((char*)((ng1)));
+    t12 = (t0 + 1928);
+    xsi_vlogvar_wait_assign_value(t12, t11, 0, 0, 8, 0LL);
+    goto LAB8;
+
+LAB9:    xsi_set_current_line(129, ng0);
+    t4 = (t0 + 1528U);
+    t5 = *((char **)t4);
+    t4 = (t0 + 1928);
+    t11 = (t4 + 56U);
+    t12 = *((char **)t11);
+    memset(t14, 0, 8);
+    t15 = (t14 + 4);
+    t16 = (t12 + 4);
+    t17 = *((unsigned int *)t12);
+    t18 = (t17 >> 0);
+    *((unsigned int *)t14) = t18;
+    t19 = *((unsigned int *)t16);
+    t20 = (t19 >> 0);
+    *((unsigned int *)t15) = t20;
+    t21 = *((unsigned int *)t14);
+    *((unsigned int *)t14) = (t21 & 127U);
+    t22 = *((unsigned int *)t15);
+    *((unsigned int *)t15) = (t22 & 127U);
+    xsi_vlogtype_concat(t13, 8, 8, 2U, t14, 7, t5, 1);
+    t23 = (t0 + 1928);
+    xsi_vlogvar_wait_assign_value(t23, t13, 0, 0, 8, 0LL);
+    goto LAB11;
+
+}
+
+
+extern void work_m_16037748242132987739_3656180732_init()
+{
+	static char *pe[] = {(void *)Always_124_0};
+	xsi_register_didat("work_m_16037748242132987739_3656180732", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_3656180732.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16037748242132987739_3656180732.didat


+ 337 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.c

@@ -0,0 +1,337 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/srv/Xilinx/14.7/ISE_DS/ISE/verilog/src/glbl.v";
+static unsigned int ng1[] = {1U, 0U};
+static unsigned int ng2[] = {0U, 0U};
+
+
+
+static void NetDecl_16_0(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    unsigned int t8;
+    unsigned int t9;
+    char *t10;
+    unsigned int t11;
+    unsigned int t12;
+    char *t13;
+    unsigned int t14;
+    unsigned int t15;
+    char *t16;
+
+LAB0:    t1 = (t0 + 6952U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(16, ng0);
+    t2 = (t0 + 1960U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 8640);
+    t4 = (t2 + 56U);
+    t5 = *((char **)t4);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    memset(t7, 0, 8);
+    t8 = 1U;
+    t9 = t8;
+    t10 = (t3 + 4);
+    t11 = *((unsigned int *)t3);
+    t8 = (t8 & t11);
+    t12 = *((unsigned int *)t10);
+    t9 = (t9 & t12);
+    t13 = (t7 + 4);
+    t14 = *((unsigned int *)t7);
+    *((unsigned int *)t7) = (t14 | t8);
+    t15 = *((unsigned int *)t13);
+    *((unsigned int *)t13) = (t15 | t9);
+    xsi_driver_vfirst_trans(t2, 0, 0U);
+    t16 = (t0 + 8512);
+    *((int *)t16) = 1;
+
+LAB1:    return;
+}
+
+static void Cont_48_1(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+    unsigned int t10;
+    unsigned int t11;
+    char *t12;
+    unsigned int t13;
+    unsigned int t14;
+    char *t15;
+    unsigned int t16;
+    unsigned int t17;
+    char *t18;
+
+LAB0:    t1 = (t0 + 7200U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(48, ng0);
+    t2 = (t0 + 3640);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t0 + 8704);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    t8 = (t7 + 56U);
+    t9 = *((char **)t8);
+    memset(t9, 0, 8);
+    t10 = 1U;
+    t11 = t10;
+    t12 = (t4 + 4);
+    t13 = *((unsigned int *)t4);
+    t10 = (t10 & t13);
+    t14 = *((unsigned int *)t12);
+    t11 = (t11 & t14);
+    t15 = (t9 + 4);
+    t16 = *((unsigned int *)t9);
+    *((unsigned int *)t9) = (t16 | t10);
+    t17 = *((unsigned int *)t15);
+    *((unsigned int *)t15) = (t17 | t11);
+    xsi_driver_vfirst_trans(t5, 0, 0);
+    t18 = (t0 + 8528);
+    *((int *)t18) = 1;
+
+LAB1:    return;
+}
+
+static void Cont_49_2(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+    unsigned int t10;
+    unsigned int t11;
+    char *t12;
+    unsigned int t13;
+    unsigned int t14;
+    char *t15;
+    unsigned int t16;
+    unsigned int t17;
+    char *t18;
+
+LAB0:    t1 = (t0 + 7448U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(49, ng0);
+    t2 = (t0 + 3800);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t0 + 8768);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    t8 = (t7 + 56U);
+    t9 = *((char **)t8);
+    memset(t9, 0, 8);
+    t10 = 1U;
+    t11 = t10;
+    t12 = (t4 + 4);
+    t13 = *((unsigned int *)t4);
+    t10 = (t10 & t13);
+    t14 = *((unsigned int *)t12);
+    t11 = (t11 & t14);
+    t15 = (t9 + 4);
+    t16 = *((unsigned int *)t9);
+    *((unsigned int *)t9) = (t16 | t10);
+    t17 = *((unsigned int *)t15);
+    *((unsigned int *)t15) = (t17 | t11);
+    xsi_driver_vfirst_trans(t5, 0, 0);
+    t18 = (t0 + 8544);
+    *((int *)t18) = 1;
+
+LAB1:    return;
+}
+
+static void Cont_50_3(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t6;
+    char *t7;
+    char *t8;
+    char *t9;
+    unsigned int t10;
+    unsigned int t11;
+    char *t12;
+    unsigned int t13;
+    unsigned int t14;
+    char *t15;
+    unsigned int t16;
+    unsigned int t17;
+    char *t18;
+
+LAB0:    t1 = (t0 + 7696U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(50, ng0);
+    t2 = (t0 + 3960);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = (t0 + 8832);
+    t6 = (t5 + 56U);
+    t7 = *((char **)t6);
+    t8 = (t7 + 56U);
+    t9 = *((char **)t8);
+    memset(t9, 0, 8);
+    t10 = 1U;
+    t11 = t10;
+    t12 = (t4 + 4);
+    t13 = *((unsigned int *)t4);
+    t10 = (t10 & t13);
+    t14 = *((unsigned int *)t12);
+    t11 = (t11 & t14);
+    t15 = (t9 + 4);
+    t16 = *((unsigned int *)t9);
+    *((unsigned int *)t9) = (t16 | t10);
+    t17 = *((unsigned int *)t15);
+    *((unsigned int *)t15) = (t17 | t11);
+    xsi_driver_vfirst_trans(t5, 0, 0);
+    t18 = (t0 + 8560);
+    *((int *)t18) = 1;
+
+LAB1:    return;
+}
+
+static void Initial_52_4(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+
+LAB0:    t1 = (t0 + 7944U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(52, ng0);
+
+LAB4:    xsi_set_current_line(53, ng0);
+    t2 = ((char*)((ng1)));
+    t3 = (t0 + 3640);
+    xsi_vlogvar_assign_value(t3, t2, 0, 0, 1);
+    xsi_set_current_line(54, ng0);
+    t2 = ((char*)((ng1)));
+    t3 = (t0 + 3960);
+    xsi_vlogvar_assign_value(t3, t2, 0, 0, 1);
+    xsi_set_current_line(55, ng0);
+    t2 = (t0 + 7752);
+    xsi_process_wait(t2, 100000LL);
+    *((char **)t1) = &&LAB5;
+
+LAB1:    return;
+LAB5:    xsi_set_current_line(56, ng0);
+    t3 = ((char*)((ng2)));
+    t4 = (t0 + 3640);
+    xsi_vlogvar_assign_value(t4, t3, 0, 0, 1);
+    xsi_set_current_line(57, ng0);
+    t2 = ((char*)((ng2)));
+    t3 = (t0 + 3960);
+    xsi_vlogvar_assign_value(t3, t2, 0, 0, 1);
+    goto LAB1;
+
+}
+
+static void Initial_60_5(char *t0)
+{
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+
+LAB0:    t1 = (t0 + 8192U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(60, ng0);
+
+LAB4:    xsi_set_current_line(61, ng0);
+    t2 = ((char*)((ng1)));
+    t3 = (t0 + 3800);
+    xsi_vlogvar_assign_value(t3, t2, 0, 0, 1);
+    xsi_set_current_line(62, ng0);
+    t2 = (t0 + 8000);
+    xsi_process_wait(t2, 0LL);
+    *((char **)t1) = &&LAB5;
+
+LAB1:    return;
+LAB5:    xsi_set_current_line(63, ng0);
+    t3 = ((char*)((ng2)));
+    t4 = (t0 + 3800);
+    xsi_vlogvar_assign_value(t4, t3, 0, 0, 1);
+    goto LAB1;
+
+}
+
+
+extern void work_m_16541823861846354283_2073120511_init()
+{
+	static char *pe[] = {(void *)NetDecl_16_0,(void *)Cont_48_1,(void *)Cont_49_2,(void *)Cont_50_3,(void *)Initial_52_4,(void *)Initial_60_5};
+	xsi_register_didat("work_m_16541823861846354283_2073120511", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16541823861846354283_2073120511.didat


+ 135 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2020177359.c

@@ -0,0 +1,135 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+
+
+
+static void Cont_55_0(char *t0)
+{
+    char t5[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    unsigned int t18;
+    char *t19;
+    char *t20;
+    char *t21;
+    char *t22;
+    char *t23;
+    char *t24;
+    unsigned int t25;
+    unsigned int t26;
+    char *t27;
+    unsigned int t28;
+    unsigned int t29;
+    char *t30;
+    unsigned int t31;
+    unsigned int t32;
+    char *t33;
+
+LAB0:    t1 = (t0 + 2520U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(55, ng0);
+    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1368U);
+    t4 = *((char **)t2);
+    memset(t5, 0, 8);
+    t2 = (t3 + 4);
+    t6 = (t4 + 4);
+    t7 = *((unsigned int *)t3);
+    t8 = *((unsigned int *)t4);
+    t9 = (t7 ^ t8);
+    t10 = *((unsigned int *)t2);
+    t11 = *((unsigned int *)t6);
+    t12 = (t10 ^ t11);
+    t13 = (t9 | t12);
+    t14 = *((unsigned int *)t2);
+    t15 = *((unsigned int *)t6);
+    t16 = (t14 | t15);
+    t17 = (~(t16));
+    t18 = (t13 & t17);
+    if (t18 != 0)
+        goto LAB7;
+
+LAB4:    if (t16 != 0)
+        goto LAB6;
+
+LAB5:    *((unsigned int *)t5) = 1;
+
+LAB7:    t20 = (t0 + 2920);
+    t21 = (t20 + 56U);
+    t22 = *((char **)t21);
+    t23 = (t22 + 56U);
+    t24 = *((char **)t23);
+    memset(t24, 0, 8);
+    t25 = 1U;
+    t26 = t25;
+    t27 = (t5 + 4);
+    t28 = *((unsigned int *)t5);
+    t25 = (t25 & t28);
+    t29 = *((unsigned int *)t27);
+    t26 = (t26 & t29);
+    t30 = (t24 + 4);
+    t31 = *((unsigned int *)t24);
+    *((unsigned int *)t24) = (t31 | t25);
+    t32 = *((unsigned int *)t30);
+    *((unsigned int *)t30) = (t32 | t26);
+    xsi_driver_vfirst_trans(t20, 0, 0);
+    t33 = (t0 + 2840);
+    *((int *)t33) = 1;
+
+LAB1:    return;
+LAB6:    t19 = (t5 + 4);
+    *((unsigned int *)t5) = 1;
+    *((unsigned int *)t19) = 1;
+    goto LAB7;
+
+}
+
+
+extern void work_m_16562971922259005791_2020177359_init()
+{
+	static char *pe[] = {(void *)Cont_55_0};
+	xsi_register_didat("work_m_16562971922259005791_2020177359", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2020177359.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2020177359.didat


+ 135 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2072830841.c

@@ -0,0 +1,135 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+
+
+
+static void Cont_172_0(char *t0)
+{
+    char t5[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    unsigned int t18;
+    char *t19;
+    char *t20;
+    char *t21;
+    char *t22;
+    char *t23;
+    char *t24;
+    unsigned int t25;
+    unsigned int t26;
+    char *t27;
+    unsigned int t28;
+    unsigned int t29;
+    char *t30;
+    unsigned int t31;
+    unsigned int t32;
+    char *t33;
+
+LAB0:    t1 = (t0 + 2520U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(172, ng0);
+    t2 = (t0 + 1208U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1368U);
+    t4 = *((char **)t2);
+    memset(t5, 0, 8);
+    t2 = (t3 + 4);
+    t6 = (t4 + 4);
+    t7 = *((unsigned int *)t3);
+    t8 = *((unsigned int *)t4);
+    t9 = (t7 ^ t8);
+    t10 = *((unsigned int *)t2);
+    t11 = *((unsigned int *)t6);
+    t12 = (t10 ^ t11);
+    t13 = (t9 | t12);
+    t14 = *((unsigned int *)t2);
+    t15 = *((unsigned int *)t6);
+    t16 = (t14 | t15);
+    t17 = (~(t16));
+    t18 = (t13 & t17);
+    if (t18 != 0)
+        goto LAB7;
+
+LAB4:    if (t16 != 0)
+        goto LAB6;
+
+LAB5:    *((unsigned int *)t5) = 1;
+
+LAB7:    t20 = (t0 + 2920);
+    t21 = (t20 + 56U);
+    t22 = *((char **)t21);
+    t23 = (t22 + 56U);
+    t24 = *((char **)t23);
+    memset(t24, 0, 8);
+    t25 = 1U;
+    t26 = t25;
+    t27 = (t5 + 4);
+    t28 = *((unsigned int *)t5);
+    t25 = (t25 & t28);
+    t29 = *((unsigned int *)t27);
+    t26 = (t26 & t29);
+    t30 = (t24 + 4);
+    t31 = *((unsigned int *)t24);
+    *((unsigned int *)t24) = (t31 | t25);
+    t32 = *((unsigned int *)t30);
+    *((unsigned int *)t30) = (t32 | t26);
+    xsi_driver_vfirst_trans(t20, 0, 0);
+    t33 = (t0 + 2840);
+    *((int *)t33) = 1;
+
+LAB1:    return;
+LAB6:    t19 = (t5 + 4);
+    *((unsigned int *)t5) = 1;
+    *((unsigned int *)t19) = 1;
+    goto LAB7;
+
+}
+
+
+extern void work_m_16562971922259005791_2072830841_init()
+{
+	static char *pe[] = {(void *)Cont_172_0};
+	xsi_register_didat("work_m_16562971922259005791_2072830841", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2072830841.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_16562971922259005791_2072830841.didat


+ 354 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_1148960553.c

@@ -0,0 +1,354 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+static unsigned int ng1[] = {0U, 0U};
+static int ng2[] = {1, 0};
+static unsigned int ng3[] = {255U, 0U};
+
+
+
+static void Always_150_0(char *t0)
+{
+    char t13[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    char *t11;
+    char *t12;
+    char *t14;
+
+LAB0:    t1 = (t0 + 3136U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(150, ng0);
+    t2 = (t0 + 3952);
+    *((int *)t2) = 1;
+    t3 = (t0 + 3168);
+    *((char **)t3) = t2;
+    *((char **)t1) = &&LAB4;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(151, ng0);
+
+LAB5:    xsi_set_current_line(152, ng0);
+    t4 = (t0 + 1824U);
+    t5 = *((char **)t4);
+    t4 = (t5 + 4);
+    t6 = *((unsigned int *)t4);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t5);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB6;
+
+LAB7:    xsi_set_current_line(154, ng0);
+    t2 = (t0 + 1664U);
+    t3 = *((char **)t2);
+    t2 = (t3 + 4);
+    t6 = *((unsigned int *)t2);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t3);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB9;
+
+LAB10:
+LAB11:
+LAB8:    goto LAB2;
+
+LAB6:    xsi_set_current_line(153, ng0);
+    t11 = ((char*)((ng1)));
+    t12 = (t0 + 2224);
+    xsi_vlogvar_wait_assign_value(t12, t11, 0, 0, 8, 0LL);
+    goto LAB8;
+
+LAB9:    xsi_set_current_line(155, ng0);
+    t4 = (t0 + 2224);
+    t5 = (t4 + 56U);
+    t11 = *((char **)t5);
+    t12 = ((char*)((ng2)));
+    memset(t13, 0, 8);
+    xsi_vlog_unsigned_add(t13, 32, t11, 8, t12, 32);
+    t14 = (t0 + 2224);
+    xsi_vlogvar_wait_assign_value(t14, t13, 0, 0, 8, 0LL);
+    goto LAB11;
+
+}
+
+static void Cont_158_1(char *t0)
+{
+    char t5[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    char *t9;
+    char *t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    char *t18;
+    char *t19;
+    unsigned int t20;
+    unsigned int t21;
+    unsigned int t22;
+    unsigned int t23;
+    unsigned int t24;
+    unsigned int t25;
+    unsigned int t26;
+    unsigned int t27;
+    int t28;
+    int t29;
+    unsigned int t30;
+    unsigned int t31;
+    unsigned int t32;
+    unsigned int t33;
+    unsigned int t34;
+    unsigned int t35;
+    char *t36;
+    char *t37;
+    char *t38;
+    char *t39;
+    char *t40;
+    unsigned int t41;
+    unsigned int t42;
+    char *t43;
+    unsigned int t44;
+    unsigned int t45;
+    char *t46;
+    unsigned int t47;
+    unsigned int t48;
+    char *t49;
+
+LAB0:    t1 = (t0 + 3384U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(158, ng0);
+    t2 = (t0 + 1344U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1664U);
+    t4 = *((char **)t2);
+    t6 = *((unsigned int *)t3);
+    t7 = *((unsigned int *)t4);
+    t8 = (t6 & t7);
+    *((unsigned int *)t5) = t8;
+    t2 = (t3 + 4);
+    t9 = (t4 + 4);
+    t10 = (t5 + 4);
+    t11 = *((unsigned int *)t2);
+    t12 = *((unsigned int *)t9);
+    t13 = (t11 | t12);
+    *((unsigned int *)t10) = t13;
+    t14 = *((unsigned int *)t10);
+    t15 = (t14 != 0);
+    if (t15 == 1)
+        goto LAB4;
+
+LAB5:
+LAB6:    t36 = (t0 + 4064);
+    t37 = (t36 + 56U);
+    t38 = *((char **)t37);
+    t39 = (t38 + 56U);
+    t40 = *((char **)t39);
+    memset(t40, 0, 8);
+    t41 = 1U;
+    t42 = t41;
+    t43 = (t5 + 4);
+    t44 = *((unsigned int *)t5);
+    t41 = (t41 & t44);
+    t45 = *((unsigned int *)t43);
+    t42 = (t42 & t45);
+    t46 = (t40 + 4);
+    t47 = *((unsigned int *)t40);
+    *((unsigned int *)t40) = (t47 | t41);
+    t48 = *((unsigned int *)t46);
+    *((unsigned int *)t46) = (t48 | t42);
+    xsi_driver_vfirst_trans(t36, 0, 0);
+    t49 = (t0 + 3968);
+    *((int *)t49) = 1;
+
+LAB1:    return;
+LAB4:    t16 = *((unsigned int *)t5);
+    t17 = *((unsigned int *)t10);
+    *((unsigned int *)t5) = (t16 | t17);
+    t18 = (t3 + 4);
+    t19 = (t4 + 4);
+    t20 = *((unsigned int *)t3);
+    t21 = (~(t20));
+    t22 = *((unsigned int *)t18);
+    t23 = (~(t22));
+    t24 = *((unsigned int *)t4);
+    t25 = (~(t24));
+    t26 = *((unsigned int *)t19);
+    t27 = (~(t26));
+    t28 = (t21 & t23);
+    t29 = (t25 & t27);
+    t30 = (~(t28));
+    t31 = (~(t29));
+    t32 = *((unsigned int *)t10);
+    *((unsigned int *)t10) = (t32 & t30);
+    t33 = *((unsigned int *)t10);
+    *((unsigned int *)t10) = (t33 & t31);
+    t34 = *((unsigned int *)t5);
+    *((unsigned int *)t5) = (t34 & t30);
+    t35 = *((unsigned int *)t5);
+    *((unsigned int *)t5) = (t35 & t31);
+    goto LAB6;
+
+}
+
+static void Cont_159_2(char *t0)
+{
+    char t6[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t7;
+    char *t8;
+    unsigned int t9;
+    unsigned int t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    unsigned int t18;
+    unsigned int t19;
+    unsigned int t20;
+    char *t21;
+    char *t22;
+    char *t23;
+    char *t24;
+    char *t25;
+    char *t26;
+    unsigned int t27;
+    unsigned int t28;
+    char *t29;
+    unsigned int t30;
+    unsigned int t31;
+    char *t32;
+    unsigned int t33;
+    unsigned int t34;
+    char *t35;
+
+LAB0:    t1 = (t0 + 3632U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(159, ng0);
+    t2 = (t0 + 2224);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = ((char*)((ng3)));
+    memset(t6, 0, 8);
+    t7 = (t4 + 4);
+    t8 = (t5 + 4);
+    t9 = *((unsigned int *)t4);
+    t10 = *((unsigned int *)t5);
+    t11 = (t9 ^ t10);
+    t12 = *((unsigned int *)t7);
+    t13 = *((unsigned int *)t8);
+    t14 = (t12 ^ t13);
+    t15 = (t11 | t14);
+    t16 = *((unsigned int *)t7);
+    t17 = *((unsigned int *)t8);
+    t18 = (t16 | t17);
+    t19 = (~(t18));
+    t20 = (t15 & t19);
+    if (t20 != 0)
+        goto LAB7;
+
+LAB4:    if (t18 != 0)
+        goto LAB6;
+
+LAB5:    *((unsigned int *)t6) = 1;
+
+LAB7:    t22 = (t0 + 4128);
+    t23 = (t22 + 56U);
+    t24 = *((char **)t23);
+    t25 = (t24 + 56U);
+    t26 = *((char **)t25);
+    memset(t26, 0, 8);
+    t27 = 1U;
+    t28 = t27;
+    t29 = (t6 + 4);
+    t30 = *((unsigned int *)t6);
+    t27 = (t27 & t30);
+    t31 = *((unsigned int *)t29);
+    t28 = (t28 & t31);
+    t32 = (t26 + 4);
+    t33 = *((unsigned int *)t26);
+    *((unsigned int *)t26) = (t33 | t27);
+    t34 = *((unsigned int *)t32);
+    *((unsigned int *)t32) = (t34 | t28);
+    xsi_driver_vfirst_trans(t22, 0, 0);
+    t35 = (t0 + 3984);
+    *((int *)t35) = 1;
+
+LAB1:    return;
+LAB6:    t21 = (t6 + 4);
+    *((unsigned int *)t6) = 1;
+    *((unsigned int *)t21) = 1;
+    goto LAB7;
+
+}
+
+
+extern void work_m_17101483134921830187_1148960553_init()
+{
+	static char *pe[] = {(void *)Always_150_0,(void *)Cont_158_1,(void *)Cont_159_2};
+	xsi_register_didat("work_m_17101483134921830187_1148960553", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_1148960553.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_1148960553.didat


+ 354 - 0
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_2586023783.c

@@ -0,0 +1,354 @@
+/**********************************************************************/
+/*   ____  ____                                                       */
+/*  /   /\/   /                                                       */
+/* /___/  \  /                                                        */
+/* \   \   \/                                                       */
+/*  \   \        Copyright (c) 2003-2009 Xilinx, Inc.                */
+/*  /   /          All Right Reserved.                                 */
+/* /---/   /\                                                         */
+/* \   \  /  \                                                      */
+/*  \___\/\___\                                                    */
+/***********************************************************************/
+
+/* This file is designed for use with ISim build 0xfbc00daa */
+
+#define XSI_HIDE_SYMBOL_SPEC true
+#include "xsi.h"
+#include <memory.h>
+#ifdef __GNUC__
+#include <stdlib.h>
+#else
+#include <malloc.h>
+#define alloca _alloca
+#endif
+static const char *ng0 = "/home/lusius/Devel/STM32_Devel/FPGA/CNC/step_driver_control/distance_module.vf";
+static unsigned int ng1[] = {0U, 0U};
+static int ng2[] = {1, 0};
+static unsigned int ng3[] = {65535U, 0U};
+
+
+
+static void Always_74_0(char *t0)
+{
+    char t13[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    unsigned int t9;
+    unsigned int t10;
+    char *t11;
+    char *t12;
+    char *t14;
+
+LAB0:    t1 = (t0 + 3136U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(74, ng0);
+    t2 = (t0 + 3952);
+    *((int *)t2) = 1;
+    t3 = (t0 + 3168);
+    *((char **)t3) = t2;
+    *((char **)t1) = &&LAB4;
+
+LAB1:    return;
+LAB4:    xsi_set_current_line(75, ng0);
+
+LAB5:    xsi_set_current_line(76, ng0);
+    t4 = (t0 + 1824U);
+    t5 = *((char **)t4);
+    t4 = (t5 + 4);
+    t6 = *((unsigned int *)t4);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t5);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB6;
+
+LAB7:    xsi_set_current_line(78, ng0);
+    t2 = (t0 + 1664U);
+    t3 = *((char **)t2);
+    t2 = (t3 + 4);
+    t6 = *((unsigned int *)t2);
+    t7 = (~(t6));
+    t8 = *((unsigned int *)t3);
+    t9 = (t8 & t7);
+    t10 = (t9 != 0);
+    if (t10 > 0)
+        goto LAB9;
+
+LAB10:
+LAB11:
+LAB8:    goto LAB2;
+
+LAB6:    xsi_set_current_line(77, ng0);
+    t11 = ((char*)((ng1)));
+    t12 = (t0 + 2224);
+    xsi_vlogvar_wait_assign_value(t12, t11, 0, 0, 16, 0LL);
+    goto LAB8;
+
+LAB9:    xsi_set_current_line(79, ng0);
+    t4 = (t0 + 2224);
+    t5 = (t4 + 56U);
+    t11 = *((char **)t5);
+    t12 = ((char*)((ng2)));
+    memset(t13, 0, 8);
+    xsi_vlog_unsigned_add(t13, 32, t11, 16, t12, 32);
+    t14 = (t0 + 2224);
+    xsi_vlogvar_wait_assign_value(t14, t13, 0, 0, 16, 0LL);
+    goto LAB11;
+
+}
+
+static void Cont_82_1(char *t0)
+{
+    char t5[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    unsigned int t6;
+    unsigned int t7;
+    unsigned int t8;
+    char *t9;
+    char *t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    char *t18;
+    char *t19;
+    unsigned int t20;
+    unsigned int t21;
+    unsigned int t22;
+    unsigned int t23;
+    unsigned int t24;
+    unsigned int t25;
+    unsigned int t26;
+    unsigned int t27;
+    int t28;
+    int t29;
+    unsigned int t30;
+    unsigned int t31;
+    unsigned int t32;
+    unsigned int t33;
+    unsigned int t34;
+    unsigned int t35;
+    char *t36;
+    char *t37;
+    char *t38;
+    char *t39;
+    char *t40;
+    unsigned int t41;
+    unsigned int t42;
+    char *t43;
+    unsigned int t44;
+    unsigned int t45;
+    char *t46;
+    unsigned int t47;
+    unsigned int t48;
+    char *t49;
+
+LAB0:    t1 = (t0 + 3384U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(82, ng0);
+    t2 = (t0 + 1344U);
+    t3 = *((char **)t2);
+    t2 = (t0 + 1664U);
+    t4 = *((char **)t2);
+    t6 = *((unsigned int *)t3);
+    t7 = *((unsigned int *)t4);
+    t8 = (t6 & t7);
+    *((unsigned int *)t5) = t8;
+    t2 = (t3 + 4);
+    t9 = (t4 + 4);
+    t10 = (t5 + 4);
+    t11 = *((unsigned int *)t2);
+    t12 = *((unsigned int *)t9);
+    t13 = (t11 | t12);
+    *((unsigned int *)t10) = t13;
+    t14 = *((unsigned int *)t10);
+    t15 = (t14 != 0);
+    if (t15 == 1)
+        goto LAB4;
+
+LAB5:
+LAB6:    t36 = (t0 + 4064);
+    t37 = (t36 + 56U);
+    t38 = *((char **)t37);
+    t39 = (t38 + 56U);
+    t40 = *((char **)t39);
+    memset(t40, 0, 8);
+    t41 = 1U;
+    t42 = t41;
+    t43 = (t5 + 4);
+    t44 = *((unsigned int *)t5);
+    t41 = (t41 & t44);
+    t45 = *((unsigned int *)t43);
+    t42 = (t42 & t45);
+    t46 = (t40 + 4);
+    t47 = *((unsigned int *)t40);
+    *((unsigned int *)t40) = (t47 | t41);
+    t48 = *((unsigned int *)t46);
+    *((unsigned int *)t46) = (t48 | t42);
+    xsi_driver_vfirst_trans(t36, 0, 0);
+    t49 = (t0 + 3968);
+    *((int *)t49) = 1;
+
+LAB1:    return;
+LAB4:    t16 = *((unsigned int *)t5);
+    t17 = *((unsigned int *)t10);
+    *((unsigned int *)t5) = (t16 | t17);
+    t18 = (t3 + 4);
+    t19 = (t4 + 4);
+    t20 = *((unsigned int *)t3);
+    t21 = (~(t20));
+    t22 = *((unsigned int *)t18);
+    t23 = (~(t22));
+    t24 = *((unsigned int *)t4);
+    t25 = (~(t24));
+    t26 = *((unsigned int *)t19);
+    t27 = (~(t26));
+    t28 = (t21 & t23);
+    t29 = (t25 & t27);
+    t30 = (~(t28));
+    t31 = (~(t29));
+    t32 = *((unsigned int *)t10);
+    *((unsigned int *)t10) = (t32 & t30);
+    t33 = *((unsigned int *)t10);
+    *((unsigned int *)t10) = (t33 & t31);
+    t34 = *((unsigned int *)t5);
+    *((unsigned int *)t5) = (t34 & t30);
+    t35 = *((unsigned int *)t5);
+    *((unsigned int *)t5) = (t35 & t31);
+    goto LAB6;
+
+}
+
+static void Cont_83_2(char *t0)
+{
+    char t6[8];
+    char *t1;
+    char *t2;
+    char *t3;
+    char *t4;
+    char *t5;
+    char *t7;
+    char *t8;
+    unsigned int t9;
+    unsigned int t10;
+    unsigned int t11;
+    unsigned int t12;
+    unsigned int t13;
+    unsigned int t14;
+    unsigned int t15;
+    unsigned int t16;
+    unsigned int t17;
+    unsigned int t18;
+    unsigned int t19;
+    unsigned int t20;
+    char *t21;
+    char *t22;
+    char *t23;
+    char *t24;
+    char *t25;
+    char *t26;
+    unsigned int t27;
+    unsigned int t28;
+    char *t29;
+    unsigned int t30;
+    unsigned int t31;
+    char *t32;
+    unsigned int t33;
+    unsigned int t34;
+    char *t35;
+
+LAB0:    t1 = (t0 + 3632U);
+    t2 = *((char **)t1);
+    if (t2 == 0)
+        goto LAB2;
+
+LAB3:    goto *t2;
+
+LAB2:    xsi_set_current_line(83, ng0);
+    t2 = (t0 + 2224);
+    t3 = (t2 + 56U);
+    t4 = *((char **)t3);
+    t5 = ((char*)((ng3)));
+    memset(t6, 0, 8);
+    t7 = (t4 + 4);
+    t8 = (t5 + 4);
+    t9 = *((unsigned int *)t4);
+    t10 = *((unsigned int *)t5);
+    t11 = (t9 ^ t10);
+    t12 = *((unsigned int *)t7);
+    t13 = *((unsigned int *)t8);
+    t14 = (t12 ^ t13);
+    t15 = (t11 | t14);
+    t16 = *((unsigned int *)t7);
+    t17 = *((unsigned int *)t8);
+    t18 = (t16 | t17);
+    t19 = (~(t18));
+    t20 = (t15 & t19);
+    if (t20 != 0)
+        goto LAB7;
+
+LAB4:    if (t18 != 0)
+        goto LAB6;
+
+LAB5:    *((unsigned int *)t6) = 1;
+
+LAB7:    t22 = (t0 + 4128);
+    t23 = (t22 + 56U);
+    t24 = *((char **)t23);
+    t25 = (t24 + 56U);
+    t26 = *((char **)t25);
+    memset(t26, 0, 8);
+    t27 = 1U;
+    t28 = t27;
+    t29 = (t6 + 4);
+    t30 = *((unsigned int *)t6);
+    t27 = (t27 & t30);
+    t31 = *((unsigned int *)t29);
+    t28 = (t28 & t31);
+    t32 = (t26 + 4);
+    t33 = *((unsigned int *)t26);
+    *((unsigned int *)t26) = (t33 | t27);
+    t34 = *((unsigned int *)t32);
+    *((unsigned int *)t32) = (t34 | t28);
+    xsi_driver_vfirst_trans(t22, 0, 0);
+    t35 = (t0 + 3984);
+    *((int *)t35) = 1;
+
+LAB1:    return;
+LAB6:    t21 = (t6 + 4);
+    *((unsigned int *)t6) = 1;
+    *((unsigned int *)t21) = 1;
+    goto LAB7;
+
+}
+
+
+extern void work_m_17101483134921830187_2586023783_init()
+{
+	static char *pe[] = {(void *)Always_74_0,(void *)Cont_82_1,(void *)Cont_83_2};
+	xsi_register_didat("work_m_17101483134921830187_2586023783", "isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_2586023783.didat");
+	xsi_register_executes(pe);
+}

BIN
FPGA/CNC/step_driver_control/isim/distance_module_distance_module_sch_tb_isim_beh.exe.sim/work/m_17101483134921830187_2586023783.didat


BIN
FPGA/CNC/step_driver_control/isim/temp/distance_module_distance_module_sch_tb.vdb


BIN
FPGA/CNC/step_driver_control/isim/work/distance_module_distance_module_sch_tb.vdb


+ 1 - 0
FPGA/CNC/step_driver_control/manual_set.jhd

@@ -0,0 +1 @@
+MODULE manual_set

+ 12 - 0
FPGA/CNC/step_driver_control/manual_set.sch

@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<drawing version="7">
+    <attr value="spartan6" name="DeviceFamilyName">
+        <trait delete="all:0" />
+        <trait editname="all:0" />
+        <trait edittrait="all:0" />
+    </attr>
+    <netlist>
+    </netlist>
+    <sheet sheetnum="1" width="3520" height="2720">
+    </sheet>
+</drawing>

+ 7 - 0
FPGA/CNC/step_driver_control/step_driver_control.gise

@@ -230,6 +230,8 @@
     <transform xil_pn:end_ts="1532394274" xil_pn:in_ck="-9210463584011096700" xil_pn:name="TRAN_schematicsToHdlSim" xil_pn:prop_ck="-7951357827644154794" xil_pn:start_ts="1532394273">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForInputs"/>
+      <status xil_pn:value="InputAdded"/>
       <outfile xil_pn:name="i7led_decoder.vf"/>
       <outfile xil_pn:name="indic_4reg_decoder.vf"/>
       <outfile xil_pn:name="topboard.vf"/>
@@ -241,6 +243,7 @@
     <transform xil_pn:end_ts="1532394340" xil_pn:in_ck="-5010341382388211675" xil_pn:name="TRAN_copyPostAbstractToPreSimulation" xil_pn:start_ts="1532394340">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForPredecessor"/>
       <outfile xil_pn:name="count_bidir_4.vf"/>
       <outfile xil_pn:name="count_test.vf"/>
       <outfile xil_pn:name="distance_module.vf"/>
@@ -256,6 +259,8 @@
     <transform xil_pn:end_ts="1532394341" xil_pn:in_ck="-5010341382388211675" xil_pn:name="TRAN_ISimulateBehavioralModelRunFuse" xil_pn:prop_ck="-9184879157114868359" xil_pn:start_ts="1532394340">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForProperties"/>
+      <status xil_pn:value="OutOfDateForPredecessor"/>
       <status xil_pn:value="OutOfDateForOutputs"/>
       <status xil_pn:value="OutputChanged"/>
       <outfile xil_pn:name="fuse.log"/>
@@ -268,6 +273,8 @@
     <transform xil_pn:end_ts="1532394686" xil_pn:in_ck="6450670889684223136" xil_pn:name="TRAN_ISimulateBehavioralModel" xil_pn:prop_ck="9060817770807054812" xil_pn:start_ts="1532394686">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForProperties"/>
+      <status xil_pn:value="OutOfDateForPredecessor"/>
       <status xil_pn:value="OutOfDateForOutputs"/>
       <status xil_pn:value="OutputChanged"/>
       <outfile xil_pn:name="indic_4reg_decoder_indic_4reg_decoder_sch_tb_isim_beh.wdb"/>

+ 7 - 3
FPGA/CNC/step_driver_control/step_driver_control.xise

@@ -49,6 +49,10 @@
       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
       <association xil_pn:name="Implementation" xil_pn:seqID="204"/>
     </file>
+    <file xil_pn:name="div_static_main.sch" xil_pn:type="FILE_SCHEMATIC">
+      <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="184"/>
+      <association xil_pn:name="Implementation" xil_pn:seqID="184"/>
+    </file>
   </files>
 
   <properties>
@@ -293,8 +297,8 @@
     <property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
     <property xil_pn:name="Security" xil_pn:value="Enable Readback and Reconfiguration" xil_pn:valueState="default"/>
-    <property xil_pn:name="Selected Module Instance Name" xil_pn:value="/indic_4reg_decoder_indic_4reg_decoder_sch_tb" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.indic_4reg_decoder_indic_4reg_decoder_sch_tb" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Selected Module Instance Name" xil_pn:value="/topboard/XLXI_3" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="work.sdc_divider" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Selected Simulation Root Source Node Post-Route" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Selected Simulation Root Source Node Post-Translate" xil_pn:value="" xil_pn:valueState="default"/>
@@ -312,7 +316,7 @@
     <property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
     <property xil_pn:name="Slice Utilization Ratio" xil_pn:value="100" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify 'define Macro Name and Value" xil_pn:value="" xil_pn:valueState="default"/>
-    <property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="work.indic_4reg_decoder_indic_4reg_decoder_sch_tb" xil_pn:valueState="default"/>
+    <property xil_pn:name="Specify Top Level Instance Names Behavioral" xil_pn:value="work.sdc_divider" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Map" xil_pn:value="Default" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Route" xil_pn:value="Default" xil_pn:valueState="default"/>
     <property xil_pn:name="Specify Top Level Instance Names Post-Translate" xil_pn:value="Default" xil_pn:valueState="default"/>

Разница между файлами не показана из-за своего большого размера
+ 2957 - 0
HARD/Knife/m_knife_1.b##


Разница между файлами не показана из-за своего большого размера
+ 2951 - 0
HARD/Knife/m_knife_1.b#1


Разница между файлами не показана из-за своего большого размера
+ 2961 - 0
HARD/Knife/m_knife_1.brd


Разница между файлами не показана из-за своего большого размера
+ 8371 - 0
HARD/Knife/m_knife_1.s##


Разница между файлами не показана из-за своего большого размера
+ 15012 - 0
HARD/Knife/m_knife_1.s#1


Разница между файлами не показана из-за своего большого размера
+ 8513 - 0
HARD/Knife/m_knife_1.sch


+ 1 - 1
HARD/Knife_7-7/eagle.epf

@@ -350,7 +350,7 @@ UsedLibrary="/home/lusius/eagle-7.7.0/lbr/zilog.lbr"
 
 [Win_1]
 Type="Control Panel"
-Loc="0 0 1917 1197"
+Loc="1920 0 3837 1197"
 State=2
 Number=0
 

BIN
HARD/Vape_v2/spec.odt