stm32f0xx_it.c 4.1 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_it.c
  4. * @brief Interrupt Service Routines.
  5. ******************************************************************************
  6. *
  7. * COPYRIGHT(c) 2016 STMicroelectronics
  8. *
  9. * Redistribution and use in source and binary forms, with or without modification,
  10. * are permitted provided that the following conditions are met:
  11. * 1. Redistributions of source code must retain the above copyright notice,
  12. * this list of conditions and the following disclaimer.
  13. * 2. Redistributions in binary form must reproduce the above copyright notice,
  14. * this list of conditions and the following disclaimer in the documentation
  15. * and/or other materials provided with the distribution.
  16. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  17. * may be used to endorse or promote products derived from this software
  18. * without specific prior written permission.
  19. *
  20. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  23. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  24. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  26. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  27. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  28. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  29. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. *
  31. ******************************************************************************
  32. */
  33. /* Includes ------------------------------------------------------------------*/
  34. #include "stm32f0xx_hal.h"
  35. #include "stm32f0xx.h"
  36. #include "stm32f0xx_it.h"
  37. /* USER CODE BEGIN 0 */
  38. /* USER CODE END 0 */
  39. /* External variables --------------------------------------------------------*/
  40. extern DMA_HandleTypeDef hdma_adc;
  41. /******************************************************************************/
  42. /* Cortex-M0 Processor Interruption and Exception Handlers */
  43. /******************************************************************************/
  44. /**
  45. * @brief This function handles Non maskable interrupt.
  46. */
  47. void NMI_Handler(void)
  48. {
  49. /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  50. /* USER CODE END NonMaskableInt_IRQn 0 */
  51. /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  52. /* USER CODE END NonMaskableInt_IRQn 1 */
  53. }
  54. /**
  55. * @brief This function handles Hard fault interrupt.
  56. */
  57. void HardFault_Handler(void)
  58. {
  59. /* USER CODE BEGIN HardFault_IRQn 0 */
  60. /* USER CODE END HardFault_IRQn 0 */
  61. while (1)
  62. {
  63. }
  64. /* USER CODE BEGIN HardFault_IRQn 1 */
  65. /* USER CODE END HardFault_IRQn 1 */
  66. }
  67. /**
  68. * @brief This function handles System tick timer.
  69. */
  70. void SysTick_Handler(void)
  71. {
  72. /* USER CODE BEGIN SysTick_IRQn 0 */
  73. /* USER CODE END SysTick_IRQn 0 */
  74. HAL_IncTick();
  75. HAL_SYSTICK_IRQHandler();
  76. /* USER CODE BEGIN SysTick_IRQn 1 */
  77. /* USER CODE END SysTick_IRQn 1 */
  78. }
  79. /******************************************************************************/
  80. /* STM32F0xx Peripheral Interrupt Handlers */
  81. /* Add here the Interrupt Handlers for the used peripherals. */
  82. /* For the available peripheral interrupt handler names, */
  83. /* please refer to the startup file (startup_stm32f0xx.s). */
  84. /******************************************************************************/
  85. /**
  86. * @brief This function handles DMA1 channel 1 interrupt.
  87. */
  88. void DMA1_Channel1_IRQHandler(void)
  89. {
  90. /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
  91. /* USER CODE END DMA1_Channel1_IRQn 0 */
  92. HAL_DMA_IRQHandler(&hdma_adc);
  93. /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
  94. /* USER CODE END DMA1_Channel1_IRQn 1 */
  95. }
  96. /* USER CODE BEGIN 1 */
  97. /* USER CODE END 1 */
  98. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/