STM32_Devel/FPGA/CNC/step_driver_control/_xmsgs/xst.xmsgs

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<messages>
<msg type="warning" file="HDLCompiler" num="413" delta="old" >"/home/trurl/STM32_Devel/FPGA/CNC/step_driver_control/sdc_divider.vf" Line 103: Result of <arg fmt="%d" index="1">9</arg>-bit expression is truncated to fit in <arg fmt="%d" index="2">8</arg>-bit target.
</msg>

<msg type="info" file="Xst" num="3210" delta="new" >&quot;<arg fmt="%s" index="1">/home/trurl/STM32_Devel/FPGA/CNC/step_driver_control/sdc_divider.vf</arg>&quot; line <arg fmt="%s" index="2">143</arg>: Output port &lt;<arg fmt="%s" index="3">CEO</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">XLXI_3</arg>&gt; is unconnected or connected to loadless signal.
</msg>

<msg type="info" file="Xst" num="3210" delta="new" >&quot;<arg fmt="%s" index="1">/home/trurl/STM32_Devel/FPGA/CNC/step_driver_control/sdc_divider.vf</arg>&quot; line <arg fmt="%s" index="2">143</arg>: Output port &lt;<arg fmt="%s" index="3">TC</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">XLXI_3</arg>&gt; is unconnected or connected to loadless signal.
</msg>

<msg type="info" file="Xst" num="2169" delta="new" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
</msg>

</messages>