stm32f0xx_wwdg.c 9.9 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_wwdg.c
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 05-December-2014
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Window watchdog (WWDG) peripheral:
  9. * + Prescaler, Refresh window and Counter configuration
  10. * + WWDG activation
  11. * + Interrupts and flags management
  12. *
  13. * @verbatim
  14. *
  15. ==============================================================================
  16. ##### WWDG features #####
  17. ==============================================================================
  18. [..] Once enabled the WWDG generates a system reset on expiry of a programmed
  19. time period, unless the program refreshes the counter (downcounter)
  20. before to reach 0x3F value (i.e. a reset is generated when the counter
  21. value rolls over from 0x40 to 0x3F).
  22. [..] An MCU reset is also generated if the counter value is refreshed
  23. before the counter has reached the refresh window value. This
  24. implies that the counter must be refreshed in a limited window.
  25. [..] Once enabled the WWDG cannot be disabled except by a system reset.
  26. [..] WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
  27. reset occurs.
  28. [..] The WWDG counter input clock is derived from the APB clock divided
  29. by a programmable prescaler.
  30. [..] WWDG counter clock = PCLK1 / Prescaler.
  31. [..] WWDG timeout = (WWDG counter clock) * (counter value).
  32. [..] Min-max timeout value @32MHz (PCLK1): ~85us / ~43ms.
  33. ##### How to use this driver #####
  34. ==============================================================================
  35. [..]
  36. (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE)
  37. function.
  38. (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function.
  39. (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function.
  40. (#) Set the WWDG counter value and start it using WWDG_Enable() function.
  41. When the WWDG is enabled the counter value should be configured to
  42. a value greater than 0x40 to prevent generating an immediate reset.
  43. (#) Optionally you can enable the Early wakeup interrupt which is
  44. generated when the counter reach 0x40.
  45. Once enabled this interrupt cannot be disabled except by a system reset.
  46. (#) Then the application program must refresh the WWDG counter at regular
  47. intervals during normal operation to prevent an MCU reset, using
  48. WWDG_SetCounter() function. This operation must occur only when
  49. the counter value is lower than the refresh window value,
  50. programmed using WWDG_SetWindowValue().
  51. * @endverbatim
  52. *
  53. ******************************************************************************
  54. * @attention
  55. *
  56. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  57. *
  58. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  59. * You may not use this file except in compliance with the License.
  60. * You may obtain a copy of the License at:
  61. *
  62. * http://www.st.com/software_license_agreement_liberty_v2
  63. *
  64. * Unless required by applicable law or agreed to in writing, software
  65. * distributed under the License is distributed on an "AS IS" BASIS,
  66. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  67. * See the License for the specific language governing permissions and
  68. * limitations under the License.
  69. *
  70. ******************************************************************************
  71. */
  72. /* Includes ------------------------------------------------------------------*/
  73. #include "stm32f0xx_wwdg.h"
  74. #include "stm32f0xx_rcc.h"
  75. /** @addtogroup STM32F0xx_StdPeriph_Driver
  76. * @{
  77. */
  78. /** @defgroup WWDG
  79. * @brief WWDG driver modules
  80. * @{
  81. */
  82. /* Private typedef -----------------------------------------------------------*/
  83. /* Private define ------------------------------------------------------------*/
  84. /* --------------------- WWDG registers bit mask ---------------------------- */
  85. /* CFR register bit mask */
  86. #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F)
  87. #define CFR_W_MASK ((uint32_t)0xFFFFFF80)
  88. #define BIT_MASK ((uint8_t)0x7F)
  89. /* Private macro -------------------------------------------------------------*/
  90. /* Private variables ---------------------------------------------------------*/
  91. /* Private function prototypes -----------------------------------------------*/
  92. /* Private functions ---------------------------------------------------------*/
  93. /** @defgroup WWDG_Private_Functions
  94. * @{
  95. */
  96. /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
  97. * @brief Prescaler, Refresh window and Counter configuration functions
  98. *
  99. @verbatim
  100. ==============================================================================
  101. ##### Prescaler, Refresh window and Counter configuration functions #####
  102. ==============================================================================
  103. @endverbatim
  104. * @{
  105. */
  106. /**
  107. * @brief Deinitializes the WWDG peripheral registers to their default reset values.
  108. * @param None
  109. * @retval None
  110. */
  111. void WWDG_DeInit(void)
  112. {
  113. RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
  114. RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
  115. }
  116. /**
  117. * @brief Sets the WWDG Prescaler.
  118. * @param WWDG_Prescaler: specifies the WWDG Prescaler.
  119. * This parameter can be one of the following values:
  120. * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
  121. * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
  122. * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
  123. * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
  124. * @retval None
  125. */
  126. void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
  127. {
  128. uint32_t tmpreg = 0;
  129. /* Check the parameters */
  130. assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
  131. /* Clear WDGTB[1:0] bits */
  132. tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
  133. /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
  134. tmpreg |= WWDG_Prescaler;
  135. /* Store the new value */
  136. WWDG->CFR = tmpreg;
  137. }
  138. /**
  139. * @brief Sets the WWDG window value.
  140. * @param WindowValue: specifies the window value to be compared to the downcounter.
  141. * This parameter value must be lower than 0x80.
  142. * @retval None
  143. */
  144. void WWDG_SetWindowValue(uint8_t WindowValue)
  145. {
  146. __IO uint32_t tmpreg = 0;
  147. /* Check the parameters */
  148. assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
  149. /* Clear W[6:0] bits */
  150. tmpreg = WWDG->CFR & CFR_W_MASK;
  151. /* Set W[6:0] bits according to WindowValue value */
  152. tmpreg |= WindowValue & (uint32_t) BIT_MASK;
  153. /* Store the new value */
  154. WWDG->CFR = tmpreg;
  155. }
  156. /**
  157. * @brief Enables the WWDG Early Wakeup interrupt(EWI).
  158. * @note Once enabled this interrupt cannot be disabled except by a system reset.
  159. * @param None
  160. * @retval None
  161. */
  162. void WWDG_EnableIT(void)
  163. {
  164. WWDG->CFR |= WWDG_CFR_EWI;
  165. }
  166. /**
  167. * @brief Sets the WWDG counter value.
  168. * @param Counter: specifies the watchdog counter value.
  169. * This parameter must be a number between 0x40 and 0x7F (to prevent
  170. * generating an immediate reset).
  171. * @retval None
  172. */
  173. void WWDG_SetCounter(uint8_t Counter)
  174. {
  175. /* Check the parameters */
  176. assert_param(IS_WWDG_COUNTER(Counter));
  177. /* Write to T[6:0] bits to configure the counter value, no need to do
  178. a read-modify-write; writing a 0 to WDGA bit does nothing */
  179. WWDG->CR = Counter & BIT_MASK;
  180. }
  181. /**
  182. * @}
  183. */
  184. /** @defgroup WWDG_Group2 WWDG activation functions
  185. * @brief WWDG activation functions
  186. *
  187. @verbatim
  188. ==============================================================================
  189. ##### WWDG activation function #####
  190. ==============================================================================
  191. @endverbatim
  192. * @{
  193. */
  194. /**
  195. * @brief Enables WWDG and load the counter value.
  196. * @param Counter: specifies the watchdog counter value.
  197. * This parameter must be a number between 0x40 and 0x7F (to prevent
  198. * generating an immediate reset).
  199. * @retval None
  200. */
  201. void WWDG_Enable(uint8_t Counter)
  202. {
  203. /* Check the parameters */
  204. assert_param(IS_WWDG_COUNTER(Counter));
  205. WWDG->CR = WWDG_CR_WDGA | Counter;
  206. }
  207. /**
  208. * @}
  209. */
  210. /** @defgroup WWDG_Group3 Interrupts and flags management functions
  211. * @brief Interrupts and flags management functions
  212. *
  213. @verbatim
  214. ==============================================================================
  215. ##### Interrupts and flags management functions #####
  216. ==============================================================================
  217. @endverbatim
  218. * @{
  219. */
  220. /**
  221. * @brief Checks whether the Early Wakeup interrupt flag is set or not.
  222. * @param None
  223. * @retval The new state of the Early Wakeup interrupt flag (SET or RESET).
  224. */
  225. FlagStatus WWDG_GetFlagStatus(void)
  226. {
  227. FlagStatus bitstatus = RESET;
  228. if ((WWDG->SR) != (uint32_t)RESET)
  229. {
  230. bitstatus = SET;
  231. }
  232. else
  233. {
  234. bitstatus = RESET;
  235. }
  236. return bitstatus;
  237. }
  238. /**
  239. * @brief Clears Early Wakeup interrupt flag.
  240. * @param None
  241. * @retval None
  242. */
  243. void WWDG_ClearFlag(void)
  244. {
  245. WWDG->SR = (uint32_t)RESET;
  246. }
  247. /**
  248. * @}
  249. */
  250. /**
  251. * @}
  252. */
  253. /**
  254. * @}
  255. */
  256. /**
  257. * @}
  258. */
  259. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/