stm32f10x_gpio.c 19 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_gpio.c
  4. * @author MCD Application Team
  5. * @version V3.3.0
  6. * @date 04/16/2010
  7. * @brief This file provides all the GPIO firmware functions.
  8. ******************************************************************************
  9. * @copy
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
  19. */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "stm32f10x_gpio.h"
  22. #include "stm32f10x_rcc.h"
  23. /** @addtogroup STM32F10x_StdPeriph_Driver
  24. * @{
  25. */
  26. /** @defgroup GPIO
  27. * @brief GPIO driver modules
  28. * @{
  29. */
  30. /** @defgroup GPIO_Private_TypesDefinitions
  31. * @{
  32. */
  33. /**
  34. * @}
  35. */
  36. /** @defgroup GPIO_Private_Defines
  37. * @{
  38. */
  39. /* ------------ RCC registers bit address in the alias region ----------------*/
  40. #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
  41. /* --- EVENTCR Register -----*/
  42. /* Alias word address of EVOE bit */
  43. #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
  44. #define EVOE_BitNumber ((uint8_t)0x07)
  45. #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
  46. /* --- MAPR Register ---*/
  47. /* Alias word address of MII_RMII_SEL bit */
  48. #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
  49. #define MII_RMII_SEL_BitNumber ((u8)0x17)
  50. #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
  51. #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
  52. #define LSB_MASK ((uint16_t)0xFFFF)
  53. #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
  54. #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
  55. #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
  56. #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
  57. /**
  58. * @}
  59. */
  60. /** @defgroup GPIO_Private_Macros
  61. * @{
  62. */
  63. /**
  64. * @}
  65. */
  66. /** @defgroup GPIO_Private_Variables
  67. * @{
  68. */
  69. /**
  70. * @}
  71. */
  72. /** @defgroup GPIO_Private_FunctionPrototypes
  73. * @{
  74. */
  75. /**
  76. * @}
  77. */
  78. /** @defgroup GPIO_Private_Functions
  79. * @{
  80. */
  81. /**
  82. * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
  83. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  84. * @retval None
  85. */
  86. void GPIO_DeInit(GPIO_TypeDef* GPIOx)
  87. {
  88. /* Check the parameters */
  89. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  90. if (GPIOx == GPIOA)
  91. {
  92. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
  93. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
  94. }
  95. else if (GPIOx == GPIOB)
  96. {
  97. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
  98. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
  99. }
  100. else if (GPIOx == GPIOC)
  101. {
  102. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
  103. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
  104. }
  105. else if (GPIOx == GPIOD)
  106. {
  107. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
  108. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
  109. }
  110. else if (GPIOx == GPIOE)
  111. {
  112. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
  113. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
  114. }
  115. else if (GPIOx == GPIOF)
  116. {
  117. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
  118. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
  119. }
  120. else
  121. {
  122. if (GPIOx == GPIOG)
  123. {
  124. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
  125. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
  126. }
  127. }
  128. }
  129. /**
  130. * @brief Deinitializes the Alternate Functions (remap, event control
  131. * and EXTI configuration) registers to their default reset values.
  132. * @param None
  133. * @retval None
  134. */
  135. void GPIO_AFIODeInit(void)
  136. {
  137. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
  138. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
  139. }
  140. /**
  141. * @brief Initializes the GPIOx peripheral according to the specified
  142. * parameters in the GPIO_InitStruct.
  143. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  144. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
  145. * contains the configuration information for the specified GPIO peripheral.
  146. * @retval None
  147. */
  148. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  149. {
  150. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  151. uint32_t tmpreg = 0x00, pinmask = 0x00;
  152. /* Check the parameters */
  153. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  154. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  155. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  156. /*---------------------------- GPIO Mode Configuration -----------------------*/
  157. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  158. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  159. {
  160. /* Check the parameters */
  161. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  162. /* Output mode */
  163. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  164. }
  165. /*---------------------------- GPIO CRL Configuration ------------------------*/
  166. /* Configure the eight low port pins */
  167. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  168. {
  169. tmpreg = GPIOx->CRL;
  170. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  171. {
  172. pos = ((uint32_t)0x01) << pinpos;
  173. /* Get the port pins position */
  174. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  175. if (currentpin == pos)
  176. {
  177. pos = pinpos << 2;
  178. /* Clear the corresponding low control register bits */
  179. pinmask = ((uint32_t)0x0F) << pos;
  180. tmpreg &= ~pinmask;
  181. /* Write the mode configuration in the corresponding bits */
  182. tmpreg |= (currentmode << pos);
  183. /* Reset the corresponding ODR bit */
  184. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  185. {
  186. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  187. }
  188. else
  189. {
  190. /* Set the corresponding ODR bit */
  191. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  192. {
  193. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  194. }
  195. }
  196. }
  197. }
  198. GPIOx->CRL = tmpreg;
  199. }
  200. /*---------------------------- GPIO CRH Configuration ------------------------*/
  201. /* Configure the eight high port pins */
  202. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  203. {
  204. tmpreg = GPIOx->CRH;
  205. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  206. {
  207. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  208. /* Get the port pins position */
  209. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  210. if (currentpin == pos)
  211. {
  212. pos = pinpos << 2;
  213. /* Clear the corresponding high control register bits */
  214. pinmask = ((uint32_t)0x0F) << pos;
  215. tmpreg &= ~pinmask;
  216. /* Write the mode configuration in the corresponding bits */
  217. tmpreg |= (currentmode << pos);
  218. /* Reset the corresponding ODR bit */
  219. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  220. {
  221. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  222. }
  223. /* Set the corresponding ODR bit */
  224. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  225. {
  226. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  227. }
  228. }
  229. }
  230. GPIOx->CRH = tmpreg;
  231. }
  232. }
  233. /**
  234. * @brief Fills each GPIO_InitStruct member with its default value.
  235. * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
  236. * be initialized.
  237. * @retval None
  238. */
  239. void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
  240. {
  241. /* Reset GPIO init structure parameters values */
  242. GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
  243. GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
  244. GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
  245. }
  246. /**
  247. * @brief Reads the specified input port pin.
  248. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  249. * @param GPIO_Pin: specifies the port bit to read.
  250. * This parameter can be GPIO_Pin_x where x can be (0..15).
  251. * @retval The input port pin value.
  252. */
  253. uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  254. {
  255. uint8_t bitstatus = 0x00;
  256. /* Check the parameters */
  257. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  258. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  259. if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
  260. {
  261. bitstatus = (uint8_t)Bit_SET;
  262. }
  263. else
  264. {
  265. bitstatus = (uint8_t)Bit_RESET;
  266. }
  267. return bitstatus;
  268. }
  269. /**
  270. * @brief Reads the specified GPIO input data port.
  271. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  272. * @retval GPIO input data port value.
  273. */
  274. uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
  275. {
  276. /* Check the parameters */
  277. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  278. return ((uint16_t)GPIOx->IDR);
  279. }
  280. /**
  281. * @brief Reads the specified output data port bit.
  282. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  283. * @param GPIO_Pin: specifies the port bit to read.
  284. * This parameter can be GPIO_Pin_x where x can be (0..15).
  285. * @retval The output port pin value.
  286. */
  287. uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  288. {
  289. uint8_t bitstatus = 0x00;
  290. /* Check the parameters */
  291. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  292. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  293. if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
  294. {
  295. bitstatus = (uint8_t)Bit_SET;
  296. }
  297. else
  298. {
  299. bitstatus = (uint8_t)Bit_RESET;
  300. }
  301. return bitstatus;
  302. }
  303. /**
  304. * @brief Reads the specified GPIO output data port.
  305. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  306. * @retval GPIO output data port value.
  307. */
  308. uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
  309. {
  310. /* Check the parameters */
  311. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  312. return ((uint16_t)GPIOx->ODR);
  313. }
  314. /**
  315. * @brief Sets the selected data port bits.
  316. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  317. * @param GPIO_Pin: specifies the port bits to be written.
  318. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  319. * @retval None
  320. */
  321. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  322. {
  323. /* Check the parameters */
  324. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  325. assert_param(IS_GPIO_PIN(GPIO_Pin));
  326. GPIOx->BSRR = GPIO_Pin;
  327. }
  328. /**
  329. * @brief Clears the selected data port bits.
  330. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  331. * @param GPIO_Pin: specifies the port bits to be written.
  332. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  333. * @retval None
  334. */
  335. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  336. {
  337. /* Check the parameters */
  338. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  339. assert_param(IS_GPIO_PIN(GPIO_Pin));
  340. GPIOx->BRR = GPIO_Pin;
  341. }
  342. /**
  343. * @brief Sets or clears the selected data port bit.
  344. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  345. * @param GPIO_Pin: specifies the port bit to be written.
  346. * This parameter can be one of GPIO_Pin_x where x can be (0..15).
  347. * @param BitVal: specifies the value to be written to the selected bit.
  348. * This parameter can be one of the BitAction enum values:
  349. * @arg Bit_RESET: to clear the port pin
  350. * @arg Bit_SET: to set the port pin
  351. * @retval None
  352. */
  353. void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
  354. {
  355. /* Check the parameters */
  356. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  357. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  358. assert_param(IS_GPIO_BIT_ACTION(BitVal));
  359. if (BitVal != Bit_RESET)
  360. {
  361. GPIOx->BSRR = GPIO_Pin;
  362. }
  363. else
  364. {
  365. GPIOx->BRR = GPIO_Pin;
  366. }
  367. }
  368. /**
  369. * @brief Writes data to the specified GPIO data port.
  370. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  371. * @param PortVal: specifies the value to be written to the port output data register.
  372. * @retval None
  373. */
  374. void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
  375. {
  376. /* Check the parameters */
  377. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  378. GPIOx->ODR = PortVal;
  379. }
  380. /**
  381. * @brief Locks GPIO Pins configuration registers.
  382. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  383. * @param GPIO_Pin: specifies the port bit to be written.
  384. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  385. * @retval None
  386. */
  387. void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  388. {
  389. uint32_t tmp = 0x00010000;
  390. /* Check the parameters */
  391. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  392. assert_param(IS_GPIO_PIN(GPIO_Pin));
  393. tmp |= GPIO_Pin;
  394. /* Set LCKK bit */
  395. GPIOx->LCKR = tmp;
  396. /* Reset LCKK bit */
  397. GPIOx->LCKR = GPIO_Pin;
  398. /* Set LCKK bit */
  399. GPIOx->LCKR = tmp;
  400. /* Read LCKK bit*/
  401. tmp = GPIOx->LCKR;
  402. /* Read LCKK bit*/
  403. tmp = GPIOx->LCKR;
  404. }
  405. /**
  406. * @brief Selects the GPIO pin used as Event output.
  407. * @param GPIO_PortSource: selects the GPIO port to be used as source
  408. * for Event output.
  409. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
  410. * @param GPIO_PinSource: specifies the pin for the Event output.
  411. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  412. * @retval None
  413. */
  414. void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  415. {
  416. uint32_t tmpreg = 0x00;
  417. /* Check the parameters */
  418. assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
  419. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  420. tmpreg = AFIO->EVCR;
  421. /* Clear the PORT[6:4] and PIN[3:0] bits */
  422. tmpreg &= EVCR_PORTPINCONFIG_MASK;
  423. tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
  424. tmpreg |= GPIO_PinSource;
  425. AFIO->EVCR = tmpreg;
  426. }
  427. /**
  428. * @brief Enables or disables the Event Output.
  429. * @param NewState: new state of the Event output.
  430. * This parameter can be: ENABLE or DISABLE.
  431. * @retval None
  432. */
  433. void GPIO_EventOutputCmd(FunctionalState NewState)
  434. {
  435. /* Check the parameters */
  436. assert_param(IS_FUNCTIONAL_STATE(NewState));
  437. *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
  438. }
  439. /**
  440. * @brief Changes the mapping of the specified pin.
  441. * @param GPIO_Remap: selects the pin to remap.
  442. * This parameter can be one of the following values:
  443. * @arg GPIO_Remap_SPI1
  444. * @arg GPIO_Remap_I2C1
  445. * @arg GPIO_Remap_USART1
  446. * @arg GPIO_Remap_USART2
  447. * @arg GPIO_PartialRemap_USART3
  448. * @arg GPIO_FullRemap_USART3
  449. * @arg GPIO_PartialRemap_TIM1
  450. * @arg GPIO_FullRemap_TIM1
  451. * @arg GPIO_PartialRemap1_TIM2
  452. * @arg GPIO_PartialRemap2_TIM2
  453. * @arg GPIO_FullRemap_TIM2
  454. * @arg GPIO_PartialRemap_TIM3
  455. * @arg GPIO_FullRemap_TIM3
  456. * @arg GPIO_Remap_TIM4
  457. * @arg GPIO_Remap1_CAN1
  458. * @arg GPIO_Remap2_CAN1
  459. * @arg GPIO_Remap_PD01
  460. * @arg GPIO_Remap_TIM5CH4_LSI
  461. * @arg GPIO_Remap_ADC1_ETRGINJ
  462. * @arg GPIO_Remap_ADC1_ETRGREG
  463. * @arg GPIO_Remap_ADC2_ETRGINJ
  464. * @arg GPIO_Remap_ADC2_ETRGREG
  465. * @arg GPIO_Remap_ETH
  466. * @arg GPIO_Remap_CAN2
  467. * @arg GPIO_Remap_SWJ_NoJTRST
  468. * @arg GPIO_Remap_SWJ_JTAGDisable
  469. * @arg GPIO_Remap_SWJ_Disable
  470. * @arg GPIO_Remap_SPI3
  471. * @arg GPIO_Remap_TIM2ITR1_PTP_SOF
  472. * @arg GPIO_Remap_PTP_PPS
  473. * @arg GPIO_Remap_TIM15
  474. * @arg GPIO_Remap_TIM16
  475. * @arg GPIO_Remap_TIM17
  476. * @arg GPIO_Remap_CEC
  477. * @arg GPIO_Remap_TIM1_DMA
  478. * @arg GPIO_Remap_TIM9
  479. * @arg GPIO_Remap_TIM10
  480. * @arg GPIO_Remap_TIM11
  481. * @arg GPIO_Remap_TIM13
  482. * @arg GPIO_Remap_TIM14
  483. * @arg GPIO_Remap_FSMC_NADV
  484. * @note If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected
  485. * to Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
  486. * @param NewState: new state of the port pin remapping.
  487. * This parameter can be: ENABLE or DISABLE.
  488. * @retval None
  489. */
  490. void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
  491. {
  492. uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
  493. /* Check the parameters */
  494. assert_param(IS_GPIO_REMAP(GPIO_Remap));
  495. assert_param(IS_FUNCTIONAL_STATE(NewState));
  496. if((GPIO_Remap & 0x80000000) == 0x80000000)
  497. {
  498. tmpreg = AFIO->MAPR2;
  499. }
  500. else
  501. {
  502. tmpreg = AFIO->MAPR;
  503. }
  504. tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
  505. tmp = GPIO_Remap & LSB_MASK;
  506. if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
  507. {
  508. tmpreg &= DBGAFR_SWJCFG_MASK;
  509. AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
  510. }
  511. else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
  512. {
  513. tmp1 = ((uint32_t)0x03) << tmpmask;
  514. tmpreg &= ~tmp1;
  515. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  516. }
  517. else
  518. {
  519. tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
  520. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  521. }
  522. if (NewState != DISABLE)
  523. {
  524. tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
  525. }
  526. if((GPIO_Remap & 0x80000000) == 0x80000000)
  527. {
  528. AFIO->MAPR2 = tmpreg;
  529. }
  530. else
  531. {
  532. AFIO->MAPR = tmpreg;
  533. }
  534. }
  535. /**
  536. * @brief Selects the GPIO pin used as EXTI Line.
  537. * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
  538. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
  539. * @param GPIO_PinSource: specifies the EXTI line to be configured.
  540. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  541. * @retval None
  542. */
  543. void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  544. {
  545. uint32_t tmp = 0x00;
  546. /* Check the parameters */
  547. assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
  548. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  549. tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
  550. AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
  551. AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
  552. }
  553. /**
  554. * @brief Selects the Ethernet media interface.
  555. * @note This function applies only to STM32 Connectivity line devices.
  556. * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
  557. * This parameter can be one of the following values:
  558. * @arg GPIO_ETH_MediaInterface_MII: MII mode
  559. * @arg GPIO_ETH_MediaInterface_RMII: RMII mode
  560. * @retval None
  561. */
  562. void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
  563. {
  564. assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
  565. /* Configure MII_RMII selection bit */
  566. *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
  567. }
  568. /**
  569. * @}
  570. */
  571. /**
  572. * @}
  573. */
  574. /**
  575. * @}
  576. */
  577. /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/