stm32f10x_adc.h 21 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_adc.h
  4. * @author MCD Application Team
  5. * @version V3.3.0
  6. * @date 04/16/2010
  7. * @brief This file contains all the functions prototypes for the ADC firmware
  8. * library.
  9. ******************************************************************************
  10. * @copy
  11. *
  12. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  13. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  14. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  15. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  16. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  17. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  18. *
  19. * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
  20. */
  21. /* Define to prevent recursive inclusion -------------------------------------*/
  22. #ifndef __STM32F10x_ADC_H
  23. #define __STM32F10x_ADC_H
  24. #ifdef __cplusplus
  25. extern "C" {
  26. #endif
  27. /* Includes ------------------------------------------------------------------*/
  28. #include "stm32f10x.h"
  29. /** @addtogroup STM32F10x_StdPeriph_Driver
  30. * @{
  31. */
  32. /** @addtogroup ADC
  33. * @{
  34. */
  35. /** @defgroup ADC_Exported_Types
  36. * @{
  37. */
  38. /**
  39. * @brief ADC Init structure definition
  40. */
  41. typedef struct
  42. {
  43. uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or
  44. dual mode.
  45. This parameter can be a value of @ref ADC_mode */
  46. FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in
  47. Scan (multichannels) or Single (one channel) mode.
  48. This parameter can be set to ENABLE or DISABLE */
  49. FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in
  50. Continuous or Single mode.
  51. This parameter can be set to ENABLE or DISABLE. */
  52. uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog
  53. to digital conversion of regular channels. This parameter
  54. can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */
  55. uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right.
  56. This parameter can be a value of @ref ADC_data_align */
  57. uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted
  58. using the sequencer for regular channel group.
  59. This parameter must range from 1 to 16. */
  60. }ADC_InitTypeDef;
  61. /**
  62. * @}
  63. */
  64. /** @defgroup ADC_Exported_Constants
  65. * @{
  66. */
  67. #define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
  68. ((PERIPH) == ADC2) || \
  69. ((PERIPH) == ADC3))
  70. #define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \
  71. ((PERIPH) == ADC3))
  72. /** @defgroup ADC_mode
  73. * @{
  74. */
  75. #define ADC_Mode_Independent ((uint32_t)0x00000000)
  76. #define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000)
  77. #define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000)
  78. #define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000)
  79. #define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000)
  80. #define ADC_Mode_InjecSimult ((uint32_t)0x00050000)
  81. #define ADC_Mode_RegSimult ((uint32_t)0x00060000)
  82. #define ADC_Mode_FastInterl ((uint32_t)0x00070000)
  83. #define ADC_Mode_SlowInterl ((uint32_t)0x00080000)
  84. #define ADC_Mode_AlterTrig ((uint32_t)0x00090000)
  85. #define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \
  86. ((MODE) == ADC_Mode_RegInjecSimult) || \
  87. ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \
  88. ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \
  89. ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \
  90. ((MODE) == ADC_Mode_InjecSimult) || \
  91. ((MODE) == ADC_Mode_RegSimult) || \
  92. ((MODE) == ADC_Mode_FastInterl) || \
  93. ((MODE) == ADC_Mode_SlowInterl) || \
  94. ((MODE) == ADC_Mode_AlterTrig))
  95. /**
  96. * @}
  97. */
  98. /** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion
  99. * @{
  100. */
  101. #define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */
  102. #define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */
  103. #define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */
  104. #define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */
  105. #define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */
  106. #define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */
  107. #define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */
  108. #define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */
  109. #define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */
  110. #define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */
  111. #define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */
  112. #define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */
  113. #define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */
  114. #define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */
  115. #define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \
  116. ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \
  117. ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \
  118. ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \
  119. ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \
  120. ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \
  121. ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \
  122. ((REGTRIG) == ADC_ExternalTrigConv_None) || \
  123. ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \
  124. ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \
  125. ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \
  126. ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \
  127. ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \
  128. ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3))
  129. /**
  130. * @}
  131. */
  132. /** @defgroup ADC_data_align
  133. * @{
  134. */
  135. #define ADC_DataAlign_Right ((uint32_t)0x00000000)
  136. #define ADC_DataAlign_Left ((uint32_t)0x00000800)
  137. #define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \
  138. ((ALIGN) == ADC_DataAlign_Left))
  139. /**
  140. * @}
  141. */
  142. /** @defgroup ADC_channels
  143. * @{
  144. */
  145. #define ADC_Channel_0 ((uint8_t)0x00)
  146. #define ADC_Channel_1 ((uint8_t)0x01)
  147. #define ADC_Channel_2 ((uint8_t)0x02)
  148. #define ADC_Channel_3 ((uint8_t)0x03)
  149. #define ADC_Channel_4 ((uint8_t)0x04)
  150. #define ADC_Channel_5 ((uint8_t)0x05)
  151. #define ADC_Channel_6 ((uint8_t)0x06)
  152. #define ADC_Channel_7 ((uint8_t)0x07)
  153. #define ADC_Channel_8 ((uint8_t)0x08)
  154. #define ADC_Channel_9 ((uint8_t)0x09)
  155. #define ADC_Channel_10 ((uint8_t)0x0A)
  156. #define ADC_Channel_11 ((uint8_t)0x0B)
  157. #define ADC_Channel_12 ((uint8_t)0x0C)
  158. #define ADC_Channel_13 ((uint8_t)0x0D)
  159. #define ADC_Channel_14 ((uint8_t)0x0E)
  160. #define ADC_Channel_15 ((uint8_t)0x0F)
  161. #define ADC_Channel_16 ((uint8_t)0x10)
  162. #define ADC_Channel_17 ((uint8_t)0x11)
  163. #define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16)
  164. #define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17)
  165. #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \
  166. ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \
  167. ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \
  168. ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \
  169. ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \
  170. ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \
  171. ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \
  172. ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \
  173. ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17))
  174. /**
  175. * @}
  176. */
  177. /** @defgroup ADC_sampling_time
  178. * @{
  179. */
  180. #define ADC_SampleTime_1Cycles5 ((uint8_t)0x00)
  181. #define ADC_SampleTime_7Cycles5 ((uint8_t)0x01)
  182. #define ADC_SampleTime_13Cycles5 ((uint8_t)0x02)
  183. #define ADC_SampleTime_28Cycles5 ((uint8_t)0x03)
  184. #define ADC_SampleTime_41Cycles5 ((uint8_t)0x04)
  185. #define ADC_SampleTime_55Cycles5 ((uint8_t)0x05)
  186. #define ADC_SampleTime_71Cycles5 ((uint8_t)0x06)
  187. #define ADC_SampleTime_239Cycles5 ((uint8_t)0x07)
  188. #define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \
  189. ((TIME) == ADC_SampleTime_7Cycles5) || \
  190. ((TIME) == ADC_SampleTime_13Cycles5) || \
  191. ((TIME) == ADC_SampleTime_28Cycles5) || \
  192. ((TIME) == ADC_SampleTime_41Cycles5) || \
  193. ((TIME) == ADC_SampleTime_55Cycles5) || \
  194. ((TIME) == ADC_SampleTime_71Cycles5) || \
  195. ((TIME) == ADC_SampleTime_239Cycles5))
  196. /**
  197. * @}
  198. */
  199. /** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion
  200. * @{
  201. */
  202. #define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */
  203. #define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */
  204. #define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */
  205. #define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */
  206. #define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */
  207. #define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */
  208. #define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */
  209. #define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */
  210. #define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */
  211. #define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */
  212. #define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */
  213. #define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */
  214. #define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */
  215. #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \
  216. ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \
  217. ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \
  218. ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \
  219. ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \
  220. ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \
  221. ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \
  222. ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \
  223. ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \
  224. ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \
  225. ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \
  226. ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \
  227. ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4))
  228. /**
  229. * @}
  230. */
  231. /** @defgroup ADC_injected_channel_selection
  232. * @{
  233. */
  234. #define ADC_InjectedChannel_1 ((uint8_t)0x14)
  235. #define ADC_InjectedChannel_2 ((uint8_t)0x18)
  236. #define ADC_InjectedChannel_3 ((uint8_t)0x1C)
  237. #define ADC_InjectedChannel_4 ((uint8_t)0x20)
  238. #define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \
  239. ((CHANNEL) == ADC_InjectedChannel_2) || \
  240. ((CHANNEL) == ADC_InjectedChannel_3) || \
  241. ((CHANNEL) == ADC_InjectedChannel_4))
  242. /**
  243. * @}
  244. */
  245. /** @defgroup ADC_analog_watchdog_selection
  246. * @{
  247. */
  248. #define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200)
  249. #define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200)
  250. #define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200)
  251. #define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000)
  252. #define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000)
  253. #define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000)
  254. #define ADC_AnalogWatchdog_None ((uint32_t)0x00000000)
  255. #define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \
  256. ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \
  257. ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \
  258. ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \
  259. ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \
  260. ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \
  261. ((WATCHDOG) == ADC_AnalogWatchdog_None))
  262. /**
  263. * @}
  264. */
  265. /** @defgroup ADC_interrupts_definition
  266. * @{
  267. */
  268. #define ADC_IT_EOC ((uint16_t)0x0220)
  269. #define ADC_IT_AWD ((uint16_t)0x0140)
  270. #define ADC_IT_JEOC ((uint16_t)0x0480)
  271. #define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00))
  272. #define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \
  273. ((IT) == ADC_IT_JEOC))
  274. /**
  275. * @}
  276. */
  277. /** @defgroup ADC_flags_definition
  278. * @{
  279. */
  280. #define ADC_FLAG_AWD ((uint8_t)0x01)
  281. #define ADC_FLAG_EOC ((uint8_t)0x02)
  282. #define ADC_FLAG_JEOC ((uint8_t)0x04)
  283. #define ADC_FLAG_JSTRT ((uint8_t)0x08)
  284. #define ADC_FLAG_STRT ((uint8_t)0x10)
  285. #define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00))
  286. #define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \
  287. ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \
  288. ((FLAG) == ADC_FLAG_STRT))
  289. /**
  290. * @}
  291. */
  292. /** @defgroup ADC_thresholds
  293. * @{
  294. */
  295. #define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF)
  296. /**
  297. * @}
  298. */
  299. /** @defgroup ADC_injected_offset
  300. * @{
  301. */
  302. #define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF)
  303. /**
  304. * @}
  305. */
  306. /** @defgroup ADC_injected_length
  307. * @{
  308. */
  309. #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4))
  310. /**
  311. * @}
  312. */
  313. /** @defgroup ADC_injected_rank
  314. * @{
  315. */
  316. #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4))
  317. /**
  318. * @}
  319. */
  320. /** @defgroup ADC_regular_length
  321. * @{
  322. */
  323. #define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10))
  324. /**
  325. * @}
  326. */
  327. /** @defgroup ADC_regular_rank
  328. * @{
  329. */
  330. #define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10))
  331. /**
  332. * @}
  333. */
  334. /** @defgroup ADC_regular_discontinuous_mode_number
  335. * @{
  336. */
  337. #define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8))
  338. /**
  339. * @}
  340. */
  341. /**
  342. * @}
  343. */
  344. /** @defgroup ADC_Exported_Macros
  345. * @{
  346. */
  347. /**
  348. * @}
  349. */
  350. /** @defgroup ADC_Exported_Functions
  351. * @{
  352. */
  353. void ADC_DeInit(ADC_TypeDef* ADCx);
  354. void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct);
  355. void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct);
  356. void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  357. void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  358. void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState);
  359. void ADC_ResetCalibration(ADC_TypeDef* ADCx);
  360. FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx);
  361. void ADC_StartCalibration(ADC_TypeDef* ADCx);
  362. FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx);
  363. void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  364. FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx);
  365. void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number);
  366. void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  367. void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
  368. void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  369. uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx);
  370. uint32_t ADC_GetDualModeConversionValue(void);
  371. void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  372. void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  373. void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv);
  374. void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  375. void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState);
  376. FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx);
  377. void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime);
  378. void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length);
  379. void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset);
  380. uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel);
  381. void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog);
  382. void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold);
  383. void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel);
  384. void ADC_TempSensorVrefintCmd(FunctionalState NewState);
  385. FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
  386. void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG);
  387. ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT);
  388. void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT);
  389. #ifdef __cplusplus
  390. }
  391. #endif
  392. #endif /*__STM32F10x_ADC_H */
  393. /**
  394. * @}
  395. */
  396. /**
  397. * @}
  398. */
  399. /**
  400. * @}
  401. */
  402. /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/