stm32f10x_dac.c 19 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_dac.c
  4. * @author MCD Application Team
  5. * @version V3.3.0
  6. * @date 04/16/2010
  7. * @brief This file provides all the DAC firmware functions.
  8. ******************************************************************************
  9. * @copy
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
  19. */
  20. /* Includes ------------------------------------------------------------------*/
  21. #include "stm32f10x_dac.h"
  22. #include "stm32f10x_rcc.h"
  23. /** @addtogroup STM32F10x_StdPeriph_Driver
  24. * @{
  25. */
  26. /** @defgroup DAC
  27. * @brief DAC driver modules
  28. * @{
  29. */
  30. /** @defgroup DAC_Private_TypesDefinitions
  31. * @{
  32. */
  33. /**
  34. * @}
  35. */
  36. /** @defgroup DAC_Private_Defines
  37. * @{
  38. */
  39. /* DAC EN mask */
  40. #define CR_EN_Set ((uint32_t)0x00000001)
  41. /* DAC DMAEN mask */
  42. #define CR_DMAEN_Set ((uint32_t)0x00001000)
  43. /* CR register Mask */
  44. #define CR_CLEAR_Mask ((uint32_t)0x00000FFE)
  45. /* DAC SWTRIG mask */
  46. #define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001)
  47. /* DAC Dual Channels SWTRIG masks */
  48. #define DUAL_SWTRIG_Set ((uint32_t)0x00000003)
  49. #define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC)
  50. /* DHR registers offsets */
  51. #define DHR12R1_Offset ((uint32_t)0x00000008)
  52. #define DHR12R2_Offset ((uint32_t)0x00000014)
  53. #define DHR12RD_Offset ((uint32_t)0x00000020)
  54. /* DOR register offset */
  55. #define DOR_Offset ((uint32_t)0x0000002C)
  56. /**
  57. * @}
  58. */
  59. /** @defgroup DAC_Private_Macros
  60. * @{
  61. */
  62. /**
  63. * @}
  64. */
  65. /** @defgroup DAC_Private_Variables
  66. * @{
  67. */
  68. /**
  69. * @}
  70. */
  71. /** @defgroup DAC_Private_FunctionPrototypes
  72. * @{
  73. */
  74. /**
  75. * @}
  76. */
  77. /** @defgroup DAC_Private_Functions
  78. * @{
  79. */
  80. /**
  81. * @brief Deinitializes the DAC peripheral registers to their default reset values.
  82. * @param None
  83. * @retval None
  84. */
  85. void DAC_DeInit(void)
  86. {
  87. /* Enable DAC reset state */
  88. RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
  89. /* Release DAC from reset state */
  90. RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
  91. }
  92. /**
  93. * @brief Initializes the DAC peripheral according to the specified
  94. * parameters in the DAC_InitStruct.
  95. * @param DAC_Channel: the selected DAC channel.
  96. * This parameter can be one of the following values:
  97. * @arg DAC_Channel_1: DAC Channel1 selected
  98. * @arg DAC_Channel_2: DAC Channel2 selected
  99. * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
  100. * contains the configuration information for the specified DAC channel.
  101. * @retval None
  102. */
  103. void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
  104. {
  105. uint32_t tmpreg1 = 0, tmpreg2 = 0;
  106. /* Check the DAC parameters */
  107. assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
  108. assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
  109. assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
  110. assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
  111. /*---------------------------- DAC CR Configuration --------------------------*/
  112. /* Get the DAC CR value */
  113. tmpreg1 = DAC->CR;
  114. /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
  115. tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
  116. /* Configure for the selected DAC channel: buffer output, trigger, wave genration,
  117. mask/amplitude for wave genration */
  118. /* Set TSELx and TENx bits according to DAC_Trigger value */
  119. /* Set WAVEx bits according to DAC_WaveGeneration value */
  120. /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
  121. /* Set BOFFx bit according to DAC_OutputBuffer value */
  122. tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
  123. DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
  124. /* Calculate CR register value depending on DAC_Channel */
  125. tmpreg1 |= tmpreg2 << DAC_Channel;
  126. /* Write to DAC CR */
  127. DAC->CR = tmpreg1;
  128. }
  129. /**
  130. * @brief Fills each DAC_InitStruct member with its default value.
  131. * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
  132. * be initialized.
  133. * @retval None
  134. */
  135. void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
  136. {
  137. /*--------------- Reset DAC init structure parameters values -----------------*/
  138. /* Initialize the DAC_Trigger member */
  139. DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
  140. /* Initialize the DAC_WaveGeneration member */
  141. DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
  142. /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
  143. DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
  144. /* Initialize the DAC_OutputBuffer member */
  145. DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
  146. }
  147. /**
  148. * @brief Enables or disables the specified DAC channel.
  149. * @param DAC_Channel: the selected DAC channel.
  150. * This parameter can be one of the following values:
  151. * @arg DAC_Channel_1: DAC Channel1 selected
  152. * @arg DAC_Channel_2: DAC Channel2 selected
  153. * @param NewState: new state of the DAC channel.
  154. * This parameter can be: ENABLE or DISABLE.
  155. * @retval None
  156. */
  157. void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
  158. {
  159. /* Check the parameters */
  160. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  161. assert_param(IS_FUNCTIONAL_STATE(NewState));
  162. if (NewState != DISABLE)
  163. {
  164. /* Enable the selected DAC channel */
  165. DAC->CR |= CR_EN_Set << DAC_Channel;
  166. }
  167. else
  168. {
  169. /* Disable the selected DAC channel */
  170. DAC->CR &= ~(CR_EN_Set << DAC_Channel);
  171. }
  172. }
  173. #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL)
  174. /**
  175. * @brief Enables or disables the specified DAC interrupts.
  176. * @param DAC_Channel: the selected DAC channel.
  177. * This parameter can be one of the following values:
  178. * @arg DAC_Channel_1: DAC Channel1 selected
  179. * @arg DAC_Channel_2: DAC Channel2 selected
  180. * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled.
  181. * This parameter can be the following values:
  182. * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
  183. * @param NewState: new state of the specified DAC interrupts.
  184. * This parameter can be: ENABLE or DISABLE.
  185. * @retval None
  186. */
  187. void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState)
  188. {
  189. /* Check the parameters */
  190. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  191. assert_param(IS_FUNCTIONAL_STATE(NewState));
  192. assert_param(IS_DAC_IT(DAC_IT));
  193. if (NewState != DISABLE)
  194. {
  195. /* Enable the selected DAC interrupts */
  196. DAC->CR |= (DAC_IT << DAC_Channel);
  197. }
  198. else
  199. {
  200. /* Disable the selected DAC interrupts */
  201. DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel));
  202. }
  203. }
  204. #endif
  205. /**
  206. * @brief Enables or disables the specified DAC channel DMA request.
  207. * @param DAC_Channel: the selected DAC channel.
  208. * This parameter can be one of the following values:
  209. * @arg DAC_Channel_1: DAC Channel1 selected
  210. * @arg DAC_Channel_2: DAC Channel2 selected
  211. * @param NewState: new state of the selected DAC channel DMA request.
  212. * This parameter can be: ENABLE or DISABLE.
  213. * @retval None
  214. */
  215. void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
  216. {
  217. /* Check the parameters */
  218. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  219. assert_param(IS_FUNCTIONAL_STATE(NewState));
  220. if (NewState != DISABLE)
  221. {
  222. /* Enable the selected DAC channel DMA request */
  223. DAC->CR |= CR_DMAEN_Set << DAC_Channel;
  224. }
  225. else
  226. {
  227. /* Disable the selected DAC channel DMA request */
  228. DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
  229. }
  230. }
  231. /**
  232. * @brief Enables or disables the selected DAC channel software trigger.
  233. * @param DAC_Channel: the selected DAC channel.
  234. * This parameter can be one of the following values:
  235. * @arg DAC_Channel_1: DAC Channel1 selected
  236. * @arg DAC_Channel_2: DAC Channel2 selected
  237. * @param NewState: new state of the selected DAC channel software trigger.
  238. * This parameter can be: ENABLE or DISABLE.
  239. * @retval None
  240. */
  241. void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
  242. {
  243. /* Check the parameters */
  244. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  245. assert_param(IS_FUNCTIONAL_STATE(NewState));
  246. if (NewState != DISABLE)
  247. {
  248. /* Enable software trigger for the selected DAC channel */
  249. DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
  250. }
  251. else
  252. {
  253. /* Disable software trigger for the selected DAC channel */
  254. DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
  255. }
  256. }
  257. /**
  258. * @brief Enables or disables simultaneously the two DAC channels software
  259. * triggers.
  260. * @param NewState: new state of the DAC channels software triggers.
  261. * This parameter can be: ENABLE or DISABLE.
  262. * @retval None
  263. */
  264. void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
  265. {
  266. /* Check the parameters */
  267. assert_param(IS_FUNCTIONAL_STATE(NewState));
  268. if (NewState != DISABLE)
  269. {
  270. /* Enable software trigger for both DAC channels */
  271. DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
  272. }
  273. else
  274. {
  275. /* Disable software trigger for both DAC channels */
  276. DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
  277. }
  278. }
  279. /**
  280. * @brief Enables or disables the selected DAC channel wave generation.
  281. * @param DAC_Channel: the selected DAC channel.
  282. * This parameter can be one of the following values:
  283. * @arg DAC_Channel_1: DAC Channel1 selected
  284. * @arg DAC_Channel_2: DAC Channel2 selected
  285. * @param DAC_Wave: Specifies the wave type to enable or disable.
  286. * This parameter can be one of the following values:
  287. * @arg DAC_Wave_Noise: noise wave generation
  288. * @arg DAC_Wave_Triangle: triangle wave generation
  289. * @param NewState: new state of the selected DAC channel wave generation.
  290. * This parameter can be: ENABLE or DISABLE.
  291. * @retval None
  292. */
  293. void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
  294. {
  295. /* Check the parameters */
  296. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  297. assert_param(IS_DAC_WAVE(DAC_Wave));
  298. assert_param(IS_FUNCTIONAL_STATE(NewState));
  299. if (NewState != DISABLE)
  300. {
  301. /* Enable the selected wave generation for the selected DAC channel */
  302. DAC->CR |= DAC_Wave << DAC_Channel;
  303. }
  304. else
  305. {
  306. /* Disable the selected wave generation for the selected DAC channel */
  307. DAC->CR &= ~(DAC_Wave << DAC_Channel);
  308. }
  309. }
  310. /**
  311. * @brief Set the specified data holding register value for DAC channel1.
  312. * @param DAC_Align: Specifies the data alignement for DAC channel1.
  313. * This parameter can be one of the following values:
  314. * @arg DAC_Align_8b_R: 8bit right data alignement selected
  315. * @arg DAC_Align_12b_L: 12bit left data alignement selected
  316. * @arg DAC_Align_12b_R: 12bit right data alignement selected
  317. * @param Data : Data to be loaded in the selected data holding register.
  318. * @retval None
  319. */
  320. void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
  321. {
  322. __IO uint32_t tmp = 0;
  323. /* Check the parameters */
  324. assert_param(IS_DAC_ALIGN(DAC_Align));
  325. assert_param(IS_DAC_DATA(Data));
  326. tmp = (uint32_t)DAC_BASE;
  327. tmp += DHR12R1_Offset + DAC_Align;
  328. /* Set the DAC channel1 selected data holding register */
  329. *(__IO uint32_t *) tmp = Data;
  330. }
  331. /**
  332. * @brief Set the specified data holding register value for DAC channel2.
  333. * @param DAC_Align: Specifies the data alignement for DAC channel2.
  334. * This parameter can be one of the following values:
  335. * @arg DAC_Align_8b_R: 8bit right data alignement selected
  336. * @arg DAC_Align_12b_L: 12bit left data alignement selected
  337. * @arg DAC_Align_12b_R: 12bit right data alignement selected
  338. * @param Data : Data to be loaded in the selected data holding register.
  339. * @retval None
  340. */
  341. void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
  342. {
  343. __IO uint32_t tmp = 0;
  344. /* Check the parameters */
  345. assert_param(IS_DAC_ALIGN(DAC_Align));
  346. assert_param(IS_DAC_DATA(Data));
  347. tmp = (uint32_t)DAC_BASE;
  348. tmp += DHR12R2_Offset + DAC_Align;
  349. /* Set the DAC channel2 selected data holding register */
  350. *(__IO uint32_t *)tmp = Data;
  351. }
  352. /**
  353. * @brief Set the specified data holding register value for dual channel
  354. * DAC.
  355. * @param DAC_Align: Specifies the data alignement for dual channel DAC.
  356. * This parameter can be one of the following values:
  357. * @arg DAC_Align_8b_R: 8bit right data alignement selected
  358. * @arg DAC_Align_12b_L: 12bit left data alignement selected
  359. * @arg DAC_Align_12b_R: 12bit right data alignement selected
  360. * @param Data2: Data for DAC Channel2 to be loaded in the selected data
  361. * holding register.
  362. * @param Data1: Data for DAC Channel1 to be loaded in the selected data
  363. * holding register.
  364. * @retval None
  365. */
  366. void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
  367. {
  368. uint32_t data = 0, tmp = 0;
  369. /* Check the parameters */
  370. assert_param(IS_DAC_ALIGN(DAC_Align));
  371. assert_param(IS_DAC_DATA(Data1));
  372. assert_param(IS_DAC_DATA(Data2));
  373. /* Calculate and set dual DAC data holding register value */
  374. if (DAC_Align == DAC_Align_8b_R)
  375. {
  376. data = ((uint32_t)Data2 << 8) | Data1;
  377. }
  378. else
  379. {
  380. data = ((uint32_t)Data2 << 16) | Data1;
  381. }
  382. tmp = (uint32_t)DAC_BASE;
  383. tmp += DHR12RD_Offset + DAC_Align;
  384. /* Set the dual DAC selected data holding register */
  385. *(__IO uint32_t *)tmp = data;
  386. }
  387. /**
  388. * @brief Returns the last data output value of the selected DAC cahnnel.
  389. * @param DAC_Channel: the selected DAC channel.
  390. * This parameter can be one of the following values:
  391. * @arg DAC_Channel_1: DAC Channel1 selected
  392. * @arg DAC_Channel_2: DAC Channel2 selected
  393. * @retval The selected DAC channel data output value.
  394. */
  395. uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
  396. {
  397. __IO uint32_t tmp = 0;
  398. /* Check the parameters */
  399. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  400. tmp = (uint32_t) DAC_BASE ;
  401. tmp += DOR_Offset + ((uint32_t)DAC_Channel >> 2);
  402. /* Returns the DAC channel data output register value */
  403. return (uint16_t) (*(__IO uint32_t*) tmp);
  404. }
  405. #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL)
  406. /**
  407. * @brief Checks whether the specified DAC flag is set or not.
  408. * @param DAC_Channel: thee selected DAC channel.
  409. * This parameter can be one of the following values:
  410. * @arg DAC_Channel_1: DAC Channel1 selected
  411. * @arg DAC_Channel_2: DAC Channel2 selected
  412. * @param DAC_FLAG: specifies the flag to check.
  413. * This parameter can be only of the following value:
  414. * @arg DAC_FLAG_DMAUDR: DMA underrun flag
  415. * @retval The new state of DAC_FLAG (SET or RESET).
  416. */
  417. FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG)
  418. {
  419. FlagStatus bitstatus = RESET;
  420. /* Check the parameters */
  421. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  422. assert_param(IS_DAC_FLAG(DAC_FLAG));
  423. /* Check the status of the specified DAC flag */
  424. if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET)
  425. {
  426. /* DAC_FLAG is set */
  427. bitstatus = SET;
  428. }
  429. else
  430. {
  431. /* DAC_FLAG is reset */
  432. bitstatus = RESET;
  433. }
  434. /* Return the DAC_FLAG status */
  435. return bitstatus;
  436. }
  437. /**
  438. * @brief Clears the DAC channelx's pending flags.
  439. * @param DAC_Channel: the selected DAC channel.
  440. * This parameter can be one of the following values:
  441. * @arg DAC_Channel_1: DAC Channel1 selected
  442. * @arg DAC_Channel_2: DAC Channel2 selected
  443. * @param DAC_FLAG: specifies the flag to clear.
  444. * This parameter can be of the following value:
  445. * @arg DAC_FLAG_DMAUDR: DMA underrun flag
  446. * @retval None
  447. */
  448. void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG)
  449. {
  450. /* Check the parameters */
  451. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  452. assert_param(IS_DAC_FLAG(DAC_FLAG));
  453. /* Clear the selected DAC flags */
  454. DAC->SR = (DAC_FLAG << DAC_Channel);
  455. }
  456. /**
  457. * @brief Checks whether the specified DAC interrupt has occurred or not.
  458. * @param DAC_Channel: the selected DAC channel.
  459. * This parameter can be one of the following values:
  460. * @arg DAC_Channel_1: DAC Channel1 selected
  461. * @arg DAC_Channel_2: DAC Channel2 selected
  462. * @param DAC_IT: specifies the DAC interrupt source to check.
  463. * This parameter can be the following values:
  464. * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
  465. * @retval The new state of DAC_IT (SET or RESET).
  466. */
  467. ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT)
  468. {
  469. ITStatus bitstatus = RESET;
  470. uint32_t enablestatus = 0;
  471. /* Check the parameters */
  472. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  473. assert_param(IS_DAC_IT(DAC_IT));
  474. /* Get the DAC_IT enable bit status */
  475. enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ;
  476. /* Check the status of the specified DAC interrupt */
  477. if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus)
  478. {
  479. /* DAC_IT is set */
  480. bitstatus = SET;
  481. }
  482. else
  483. {
  484. /* DAC_IT is reset */
  485. bitstatus = RESET;
  486. }
  487. /* Return the DAC_IT status */
  488. return bitstatus;
  489. }
  490. /**
  491. * @brief Clears the DAC channelx’s interrupt pending bits.
  492. * @param DAC_Channel: the selected DAC channel.
  493. * This parameter can be one of the following values:
  494. * @arg DAC_Channel_1: DAC Channel1 selected
  495. * @arg DAC_Channel_2: DAC Channel2 selected
  496. * @param DAC_IT: specifies the DAC interrupt pending bit to clear.
  497. * This parameter can be the following values:
  498. * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask
  499. * @retval None
  500. */
  501. void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT)
  502. {
  503. /* Check the parameters */
  504. assert_param(IS_DAC_CHANNEL(DAC_Channel));
  505. assert_param(IS_DAC_IT(DAC_IT));
  506. /* Clear the selected DAC interrupt pending bits */
  507. DAC->SR = (DAC_IT << DAC_Channel);
  508. }
  509. #endif
  510. /**
  511. * @}
  512. */
  513. /**
  514. * @}
  515. */
  516. /**
  517. * @}
  518. */
  519. /******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/