stm32f4xx_rng.c 14 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_rng.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 30-September-2011
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the Random Number Generator (RNG) peripheral:
  9. * - Initialization and Configuration
  10. * - Get 32 bit Random number
  11. * - Interrupts and flags management
  12. *
  13. * @verbatim
  14. *
  15. * ===================================================================
  16. * How to use this driver
  17. * ===================================================================
  18. * 1. Enable The RNG controller clock using
  19. * RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG, ENABLE) function.
  20. *
  21. * 2. Activate the RNG peripheral using RNG_Cmd() function.
  22. *
  23. * 3. Wait until the 32 bit Random number Generator contains a valid
  24. * random data (using polling/interrupt mode). For more details,
  25. * refer to "Interrupts and flags management functions" module
  26. * description.
  27. *
  28. * 4. Get the 32 bit Random number using RNG_GetRandomNumber() function
  29. *
  30. * 5. To get another 32 bit Random number, go to step 3.
  31. *
  32. *
  33. *
  34. * @endverbatim
  35. *
  36. ******************************************************************************
  37. * @attention
  38. *
  39. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  40. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  41. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  42. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  43. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  44. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  45. *
  46. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  47. ******************************************************************************
  48. */
  49. /* Includes ------------------------------------------------------------------*/
  50. #include "stm32f4xx_rng.h"
  51. #include "stm32f4xx_rcc.h"
  52. /** @addtogroup STM32F4xx_StdPeriph_Driver
  53. * @{
  54. */
  55. /** @defgroup RNG
  56. * @brief RNG driver modules
  57. * @{
  58. */
  59. /* Private typedef -----------------------------------------------------------*/
  60. /* Private define ------------------------------------------------------------*/
  61. /* Private macro -------------------------------------------------------------*/
  62. /* Private variables ---------------------------------------------------------*/
  63. /* Private function prototypes -----------------------------------------------*/
  64. /* Private functions ---------------------------------------------------------*/
  65. /** @defgroup RNG_Private_Functions
  66. * @{
  67. */
  68. /** @defgroup RNG_Group1 Initialization and Configuration functions
  69. * @brief Initialization and Configuration functions
  70. *
  71. @verbatim
  72. ===============================================================================
  73. Initialization and Configuration functions
  74. ===============================================================================
  75. This section provides functions allowing to
  76. - Initialize the RNG peripheral
  77. - Enable or disable the RNG peripheral
  78. @endverbatim
  79. * @{
  80. */
  81. /**
  82. * @brief Deinitializes the RNG peripheral registers to their default reset values.
  83. * @param None
  84. * @retval None
  85. */
  86. void RNG_DeInit(void)
  87. {
  88. /* Enable RNG reset state */
  89. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, ENABLE);
  90. /* Release RNG from reset state */
  91. RCC_AHB2PeriphResetCmd(RCC_AHB2Periph_RNG, DISABLE);
  92. }
  93. /**
  94. * @brief Enables or disables the RNG peripheral.
  95. * @param NewState: new state of the RNG peripheral.
  96. * This parameter can be: ENABLE or DISABLE.
  97. * @retval None
  98. */
  99. void RNG_Cmd(FunctionalState NewState)
  100. {
  101. /* Check the parameters */
  102. assert_param(IS_FUNCTIONAL_STATE(NewState));
  103. if (NewState != DISABLE)
  104. {
  105. /* Enable the RNG */
  106. RNG->CR |= RNG_CR_RNGEN;
  107. }
  108. else
  109. {
  110. /* Disable the RNG */
  111. RNG->CR &= ~RNG_CR_RNGEN;
  112. }
  113. }
  114. /**
  115. * @}
  116. */
  117. /** @defgroup RNG_Group2 Get 32 bit Random number function
  118. * @brief Get 32 bit Random number function
  119. *
  120. @verbatim
  121. ===============================================================================
  122. Get 32 bit Random number function
  123. ===============================================================================
  124. This section provides a function allowing to get the 32 bit Random number
  125. @note Before to call this function you have to wait till DRDY flag is set,
  126. using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  127. @endverbatim
  128. * @{
  129. */
  130. /**
  131. * @brief Returns a 32-bit random number.
  132. *
  133. * @note Before to call this function you have to wait till DRDY (data ready)
  134. * flag is set, using RNG_GetFlagStatus(RNG_FLAG_DRDY) function.
  135. * @note Each time the the Random number data is read (using RNG_GetRandomNumber()
  136. * function), the RNG_FLAG_DRDY flag is automatically cleared.
  137. * @note In the case of a seed error, the generation of random numbers is
  138. * interrupted for as long as the SECS bit is '1'. If a number is
  139. * available in the RNG_DR register, it must not be used because it may
  140. * not have enough entropy. In this case, it is recommended to clear the
  141. * SEIS bit(using RNG_ClearFlag(RNG_FLAG_SECS) function), then disable
  142. * and enable the RNG peripheral (using RNG_Cmd() function) to
  143. * reinitialize and restart the RNG.
  144. * @note In the case of a clock error, the RNG is no more able to generate
  145. * random numbers because the PLL48CLK clock is not correct. User have
  146. * to check that the clock controller is correctly configured to provide
  147. * the RNG clock and clear the CEIS bit (using RNG_ClearFlag(RNG_FLAG_CECS)
  148. * function) . The clock error has no impact on the previously generated
  149. * random numbers, and the RNG_DR register contents can be used.
  150. *
  151. * @param None
  152. * @retval 32-bit random number.
  153. */
  154. uint32_t RNG_GetRandomNumber(void)
  155. {
  156. /* Return the 32 bit random number from the DR register */
  157. return RNG->DR;
  158. }
  159. /**
  160. * @}
  161. */
  162. /** @defgroup RNG_Group3 Interrupts and flags management functions
  163. * @brief Interrupts and flags management functions
  164. *
  165. @verbatim
  166. ===============================================================================
  167. Interrupts and flags management functions
  168. ===============================================================================
  169. This section provides functions allowing to configure the RNG Interrupts and
  170. to get the status and clear flags and Interrupts pending bits.
  171. The RNG provides 3 Interrupts sources and 3 Flags:
  172. Flags :
  173. ----------
  174. 1. RNG_FLAG_DRDY : In the case of the RNG_DR register contains valid
  175. random data. it is cleared by reading the valid data
  176. (using RNG_GetRandomNumber() function).
  177. 2. RNG_FLAG_CECS : In the case of a seed error detection.
  178. 3. RNG_FLAG_SECS : In the case of a clock error detection.
  179. Interrupts :
  180. ------------
  181. if enabled, an RNG interrupt is pending :
  182. 1. In the case of the RNG_DR register contains valid random data.
  183. This interrupt source is cleared once the RNG_DR register has been read
  184. (using RNG_GetRandomNumber() function) until a new valid value is
  185. computed.
  186. or
  187. 2. In the case of a seed error : One of the following faulty sequences has
  188. been detected:
  189. - More than 64 consecutive bits at the same value (0 or 1)
  190. - More than 32 consecutive alternance of 0 and 1 (0101010101...01)
  191. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_SEI)
  192. function.
  193. or
  194. 3. In the case of a clock error : the PLL48CLK (RNG peripheral clock source)
  195. was not correctly detected (fPLL48CLK< fHCLK/16).
  196. This interrupt source is cleared using RNG_ClearITPendingBit(RNG_IT_CEI)
  197. function.
  198. @note In this case, User have to check that the clock controller is
  199. correctly configured to provide the RNG clock.
  200. Managing the RNG controller events :
  201. ------------------------------------
  202. The user should identify which mode will be used in his application to manage
  203. the RNG controller events: Polling mode or Interrupt mode.
  204. 1. In the Polling Mode it is advised to use the following functions:
  205. - RNG_GetFlagStatus() : to check if flags events occur.
  206. - RNG_ClearFlag() : to clear the flags events.
  207. @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag(). it is cleared only
  208. by reading the Random number data.
  209. 2. In the Interrupt Mode it is advised to use the following functions:
  210. - RNG_ITConfig() : to enable or disable the interrupt source.
  211. - RNG_GetITStatus() : to check if Interrupt occurs.
  212. - RNG_ClearITPendingBit() : to clear the Interrupt pending Bit
  213. (corresponding Flag).
  214. @endverbatim
  215. * @{
  216. */
  217. /**
  218. * @brief Enables or disables the RNG interrupt.
  219. * @note The RNG provides 3 interrupt sources,
  220. * - Computed data is ready event (DRDY), and
  221. * - Seed error Interrupt (SEI) and
  222. * - Clock error Interrupt (CEI),
  223. * all these interrupts sources are enabled by setting the IE bit in
  224. * CR register. However, each interrupt have its specific status bit
  225. * (see RNG_GetITStatus() function) and clear bit except the DRDY event
  226. * (see RNG_ClearITPendingBit() function).
  227. * @param NewState: new state of the RNG interrupt.
  228. * This parameter can be: ENABLE or DISABLE.
  229. * @retval None
  230. */
  231. void RNG_ITConfig(FunctionalState NewState)
  232. {
  233. /* Check the parameters */
  234. assert_param(IS_FUNCTIONAL_STATE(NewState));
  235. if (NewState != DISABLE)
  236. {
  237. /* Enable the RNG interrupt */
  238. RNG->CR |= RNG_CR_IE;
  239. }
  240. else
  241. {
  242. /* Disable the RNG interrupt */
  243. RNG->CR &= ~RNG_CR_IE;
  244. }
  245. }
  246. /**
  247. * @brief Checks whether the specified RNG flag is set or not.
  248. * @param RNG_FLAG: specifies the RNG flag to check.
  249. * This parameter can be one of the following values:
  250. * @arg RNG_FLAG_DRDY: Data Ready flag.
  251. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  252. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  253. * @retval The new state of RNG_FLAG (SET or RESET).
  254. */
  255. FlagStatus RNG_GetFlagStatus(uint8_t RNG_FLAG)
  256. {
  257. FlagStatus bitstatus = RESET;
  258. /* Check the parameters */
  259. assert_param(IS_RNG_GET_FLAG(RNG_FLAG));
  260. /* Check the status of the specified RNG flag */
  261. if ((RNG->SR & RNG_FLAG) != (uint8_t)RESET)
  262. {
  263. /* RNG_FLAG is set */
  264. bitstatus = SET;
  265. }
  266. else
  267. {
  268. /* RNG_FLAG is reset */
  269. bitstatus = RESET;
  270. }
  271. /* Return the RNG_FLAG status */
  272. return bitstatus;
  273. }
  274. /**
  275. * @brief Clears the RNG flags.
  276. * @param RNG_FLAG: specifies the flag to clear.
  277. * This parameter can be any combination of the following values:
  278. * @arg RNG_FLAG_CECS: Clock Error Current flag.
  279. * @arg RNG_FLAG_SECS: Seed Error Current flag.
  280. * @note RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag() function.
  281. * This flag is cleared only by reading the Random number data (using
  282. * RNG_GetRandomNumber() function).
  283. * @retval None
  284. */
  285. void RNG_ClearFlag(uint8_t RNG_FLAG)
  286. {
  287. /* Check the parameters */
  288. assert_param(IS_RNG_CLEAR_FLAG(RNG_FLAG));
  289. /* Clear the selected RNG flags */
  290. RNG->SR = ~(uint32_t)(((uint32_t)RNG_FLAG) << 4);
  291. }
  292. /**
  293. * @brief Checks whether the specified RNG interrupt has occurred or not.
  294. * @param RNG_IT: specifies the RNG interrupt source to check.
  295. * This parameter can be one of the following values:
  296. * @arg RNG_IT_CEI: Clock Error Interrupt.
  297. * @arg RNG_IT_SEI: Seed Error Interrupt.
  298. * @retval The new state of RNG_IT (SET or RESET).
  299. */
  300. ITStatus RNG_GetITStatus(uint8_t RNG_IT)
  301. {
  302. ITStatus bitstatus = RESET;
  303. /* Check the parameters */
  304. assert_param(IS_RNG_GET_IT(RNG_IT));
  305. /* Check the status of the specified RNG interrupt */
  306. if ((RNG->SR & RNG_IT) != (uint8_t)RESET)
  307. {
  308. /* RNG_IT is set */
  309. bitstatus = SET;
  310. }
  311. else
  312. {
  313. /* RNG_IT is reset */
  314. bitstatus = RESET;
  315. }
  316. /* Return the RNG_IT status */
  317. return bitstatus;
  318. }
  319. /**
  320. * @brief Clears the RNG interrupt pending bit(s).
  321. * @param RNG_IT: specifies the RNG interrupt pending bit(s) to clear.
  322. * This parameter can be any combination of the following values:
  323. * @arg RNG_IT_CEI: Clock Error Interrupt.
  324. * @arg RNG_IT_SEI: Seed Error Interrupt.
  325. * @retval None
  326. */
  327. void RNG_ClearITPendingBit(uint8_t RNG_IT)
  328. {
  329. /* Check the parameters */
  330. assert_param(IS_RNG_IT(RNG_IT));
  331. /* Clear the selected RNG interrupt pending bit */
  332. RNG->SR = (uint8_t)~RNG_IT;
  333. }
  334. /**
  335. * @}
  336. */
  337. /**
  338. * @}
  339. */
  340. /**
  341. * @}
  342. */
  343. /**
  344. * @}
  345. */
  346. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/