stm32f4xx_syscfg.c 7.3 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_syscfg.c
  4. * @author MCD Application Team
  5. * @version V1.0.0
  6. * @date 30-September-2011
  7. * @brief This file provides firmware functions to manage the SYSCFG peripheral.
  8. *
  9. * @verbatim
  10. *
  11. * ===================================================================
  12. * How to use this driver
  13. * ===================================================================
  14. *
  15. * This driver provides functions for:
  16. *
  17. * 1. Remapping the memory accessible in the code area using SYSCFG_MemoryRemapConfig()
  18. *
  19. * 2. Manage the EXTI lines connection to the GPIOs using SYSCFG_EXTILineConfig()
  20. *
  21. * 3. Select the ETHERNET media interface (RMII/RII) using SYSCFG_ETH_MediaInterfaceConfig()
  22. *
  23. * @note SYSCFG APB clock must be enabled to get write access to SYSCFG registers,
  24. * using RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
  25. *
  26. * @endverbatim
  27. *
  28. ******************************************************************************
  29. * @attention
  30. *
  31. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  32. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  33. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  34. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  35. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  36. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  37. *
  38. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  39. ******************************************************************************
  40. */
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f4xx_syscfg.h"
  43. #include "stm32f4xx_rcc.h"
  44. /** @addtogroup STM32F4xx_StdPeriph_Driver
  45. * @{
  46. */
  47. /** @defgroup SYSCFG
  48. * @brief SYSCFG driver modules
  49. * @{
  50. */
  51. /* Private typedef -----------------------------------------------------------*/
  52. /* Private define ------------------------------------------------------------*/
  53. /* ------------ RCC registers bit address in the alias region ----------- */
  54. #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
  55. /* --- PMC Register ---*/
  56. /* Alias word address of MII_RMII_SEL bit */
  57. #define PMC_OFFSET (SYSCFG_OFFSET + 0x04)
  58. #define MII_RMII_SEL_BitNumber ((uint8_t)0x17)
  59. #define PMC_MII_RMII_SEL_BB (PERIPH_BB_BASE + (PMC_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
  60. /* --- CMPCR Register ---*/
  61. /* Alias word address of CMP_PD bit */
  62. #define CMPCR_OFFSET (SYSCFG_OFFSET + 0x20)
  63. #define CMP_PD_BitNumber ((uint8_t)0x00)
  64. #define CMPCR_CMP_PD_BB (PERIPH_BB_BASE + (CMPCR_OFFSET * 32) + (CMP_PD_BitNumber * 4))
  65. /* Private macro -------------------------------------------------------------*/
  66. /* Private variables ---------------------------------------------------------*/
  67. /* Private function prototypes -----------------------------------------------*/
  68. /* Private functions ---------------------------------------------------------*/
  69. /** @defgroup SYSCFG_Private_Functions
  70. * @{
  71. */
  72. /**
  73. * @brief Deinitializes the Alternate Functions (remap and EXTI configuration)
  74. * registers to their default reset values.
  75. * @param None
  76. * @retval None
  77. */
  78. void SYSCFG_DeInit(void)
  79. {
  80. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
  81. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
  82. }
  83. /**
  84. * @brief Changes the mapping of the specified pin.
  85. * @param SYSCFG_Memory: selects the memory remapping.
  86. * This parameter can be one of the following values:
  87. * @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
  88. * @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
  89. * @arg SYSCFG_MemoryRemap_FSMC: FSMC (Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
  90. * @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM (112kB) mapped at 0x00000000
  91. * @retval None
  92. */
  93. void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
  94. {
  95. /* Check the parameters */
  96. assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
  97. SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
  98. }
  99. /**
  100. * @brief Selects the GPIO pin used as EXTI Line.
  101. * @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source for
  102. * EXTI lines where x can be (A..I).
  103. * @param EXTI_PinSourcex: specifies the EXTI line to be configured.
  104. * This parameter can be EXTI_PinSourcex where x can be (0..15, except
  105. * for EXTI_PortSourceGPIOI x can be (0..11).
  106. * @retval None
  107. */
  108. void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
  109. {
  110. uint32_t tmp = 0x00;
  111. /* Check the parameters */
  112. assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
  113. assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
  114. tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
  115. SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
  116. SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
  117. }
  118. /**
  119. * @brief Selects the ETHERNET media interface
  120. * @param SYSCFG_ETH_MediaInterface: specifies the Media Interface mode.
  121. * This parameter can be one of the following values:
  122. * @arg SYSCFG_ETH_MediaInterface_MII: MII mode selected
  123. * @arg SYSCFG_ETH_MediaInterface_RMII: RMII mode selected
  124. * @retval None
  125. */
  126. void SYSCFG_ETH_MediaInterfaceConfig(uint32_t SYSCFG_ETH_MediaInterface)
  127. {
  128. assert_param(IS_SYSCFG_ETH_MEDIA_INTERFACE(SYSCFG_ETH_MediaInterface));
  129. /* Configure MII_RMII selection bit */
  130. *(__IO uint32_t *) PMC_MII_RMII_SEL_BB = SYSCFG_ETH_MediaInterface;
  131. }
  132. /**
  133. * @brief Enables or disables the I/O Compensation Cell.
  134. * @note The I/O compensation cell can be used only when the device supply
  135. * voltage ranges from 2.4 to 3.6 V.
  136. * @param NewState: new state of the I/O Compensation Cell.
  137. * This parameter can be one of the following values:
  138. * @arg ENABLE: I/O compensation cell enabled
  139. * @arg DISABLE: I/O compensation cell power-down mode
  140. * @retval None
  141. */
  142. void SYSCFG_CompensationCellCmd(FunctionalState NewState)
  143. {
  144. /* Check the parameters */
  145. assert_param(IS_FUNCTIONAL_STATE(NewState));
  146. *(__IO uint32_t *) CMPCR_CMP_PD_BB = (uint32_t)NewState;
  147. }
  148. /**
  149. * @brief Checks whether the I/O Compensation Cell ready flag is set or not.
  150. * @param None
  151. * @retval The new state of the I/O Compensation Cell ready flag (SET or RESET)
  152. */
  153. FlagStatus SYSCFG_GetCompensationCellStatus(void)
  154. {
  155. FlagStatus bitstatus = RESET;
  156. if ((SYSCFG->CMPCR & SYSCFG_CMPCR_READY ) != (uint32_t)RESET)
  157. {
  158. bitstatus = SET;
  159. }
  160. else
  161. {
  162. bitstatus = RESET;
  163. }
  164. return bitstatus;
  165. }
  166. /**
  167. * @}
  168. */
  169. /**
  170. * @}
  171. */
  172. /**
  173. * @}
  174. */
  175. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/