stm32f0xx_i2c_cpal.h 33 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_i2c_cpal.h
  4. * @author MCD Application Team
  5. * @version V1.2.0
  6. * @date 24-July-2014
  7. * @brief This file contains all the functions prototypes for the I2C firmware
  8. * layer.
  9. ******************************************************************************
  10. * @attention
  11. *
  12. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  13. *
  14. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15. * You may not use this file except in compliance with the License.
  16. * You may obtain a copy of the License at:
  17. *
  18. * http://www.st.com/software_license_agreement_liberty_v2
  19. *
  20. * Unless required by applicable law or agreed to in writing, software
  21. * distributed under the License is distributed on an "AS IS" BASIS,
  22. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23. * See the License for the specific language governing permissions and
  24. * limitations under the License.
  25. *
  26. ******************************************************************************
  27. */
  28. /* Includes ------------------------------------------------------------------*/
  29. /*========= CPAL library files includes =========*/
  30. #include "stm32f0xx_i2c_cpal_hal.h"
  31. #include "stm32f0xx_i2c_cpal_conf.h"
  32. /* Define to prevent recursive inclusion -------------------------------------*/
  33. #ifndef __STM32F0XX_I2C_CPAL_H
  34. #define __STM32F0XX_I2C_CPAL_H
  35. #ifdef __cplusplus
  36. extern "C" {
  37. #endif
  38. /* Exported types ------------------------------------------------------------*/
  39. /*========= CPAL_Dev_TypeDef =========*/
  40. /* CPAL devices enumeration contains the device instances */
  41. typedef enum
  42. {
  43. CPAL_I2C1 = 0x00, /*!< Use I2C1 device */
  44. CPAL_I2C2 = 0x01 /*!< Use I2C2 device */
  45. }CPAL_DevTypeDef;
  46. /*========= CPAL_Direction_TypeDef =========*/
  47. /* CPAL transfer directions enumeration is used to configure DMA channels
  48. (TX and RX) if CPAL_PROGMODEL_DMA is selected or TX/RX interrupts
  49. if CPAL_PROGMODEL_INTERRUPT is selected:
  50. - If CPAL_DIRECTION_TX is selected only TX DMA Channel or TX Interrupt is configured
  51. - If CPAL_DIRECTION_RX is selected only RX DMA Channel or RX Interrupt is configured
  52. - If CPAL_DIRECTION_TXRX is selected both TX and Rx DMA Channels or Interrupts are configured.*/
  53. typedef enum
  54. {
  55. CPAL_DIRECTION_TX = 0x01, /*!<Transmitter only direction */
  56. CPAL_DIRECTION_RX = 0x02, /*!<Receiver only direction */
  57. CPAL_DIRECTION_TXRX = 0x03, /*!<Transmitter and Receiver direction */
  58. }CPAL_DirectionTypeDef;
  59. /*========= CPAL_Mode_TypeDef =========*/
  60. /* CPAL device Mode enumeration is used to select in which mode the
  61. device will proceed : in master mode or slave mode.
  62. When an I2C device is used in master mode, it will initiate communication
  63. by sending start bit. When it is used in slave mode, it will wait till
  64. receiving its own address to start communication.*/
  65. typedef enum
  66. {
  67. CPAL_MODE_MASTER = 0x00, /*!< Use device as master */
  68. CPAL_MODE_SLAVE = 0x01 /*!< Use device as slave */
  69. }CPAL_ModeTypeDef;
  70. /*========= CPAL_ProgModel_TypeDef =========*/
  71. /* CPAL Programming Models enumeration is used to define the programming
  72. model of device communication.
  73. - CPAL_PROGMODEL_DMA : device is programmed to communicate using DMA.
  74. - CPAL_PROGMODEL_INTERRUPT : device is programmed to communicate using
  75. interruption ( TXE , RXNE ...) handlers.
  76. - CPAL_PROGMODEL_POLLING : device is programmed to communicate using
  77. application polling routines (interrupts and DMA will not be used).*/
  78. typedef enum
  79. {
  80. CPAL_PROGMODEL_INTERRUPT = 0x01, /*!<Interrupt transfer programming model */
  81. CPAL_PROGMODEL_DMA = 0x02 /*!<DMA transfer programming model */
  82. }CPAL_ProgModelTypeDef;
  83. /*========= CPAL_Transfer_TypeDef =========*/
  84. /* CPAL Transfer structure contains all transfer parameters which are used
  85. in every Read or Write operation.*/
  86. typedef struct
  87. {
  88. uint8_t* pbBuffer; /*!<The address of the buffer from/to which the transfer should start */
  89. __IO uint32_t wNumData; /*!<Number of data to be transferred for the current transaction */
  90. uint32_t wAddr1; /*!<Contains the Target device Address (optional)*/
  91. uint32_t wAddr2; /*!<Contains the Register/Physical Address into the device (optional) */
  92. } CPAL_TransferTypeDef;
  93. /*========= CPAL_State_TypeDef =========*/
  94. /* CPAL global State enumeration contains the current state of CPAL communication.
  95. Before starting each operation this state is tested. After each operation
  96. CPAL_State is updated with the new value resulting from the relative operation.*/
  97. typedef enum
  98. {
  99. CPAL_STATE_DISABLED = 0x00, /*!<The Disabled state indicates that the device
  100. is not configured.*/
  101. CPAL_STATE_READY = 0x01, /*!<The Ready state indicates that the device is configured
  102. correctly and is ready for read or write operation and/or
  103. the last transaction has been successfully completed */
  104. CPAL_STATE_READY_TX = 0x03, /*!<The Ready_TX state indicates that the device is ready for
  105. transmission operation */
  106. CPAL_STATE_READY_RX = 0x05, /*!<The Ready_RX state indicates that the device is ready for
  107. reception operation */
  108. CPAL_STATE_BUSY = 0x02, /*!<The Busy state indicates that a Write or Read
  109. operation started */
  110. CPAL_STATE_BUSY_TX = 0x06, /*!<The Busy_TX state indicates that a transmission
  111. operation is on going */
  112. CPAL_STATE_BUSY_RX = 0x0A, /*!<The Busy_RX state indicates that a reception
  113. operation is on going */
  114. CPAL_STATE_ERROR = 0x10, /*!<The Error state indicates that the last operation failed.
  115. To determine which error caused the failure, read the
  116. device status structure.*/
  117. }CPAL_StateTypeDef;
  118. /*========= CPAL_I2CError_TypeDef =========*/
  119. /* I2C Errors TypeDef */
  120. typedef enum
  121. {
  122. CPAL_I2C_ERR_NONE = 0x00000000, /*!<No Error: This is the default state for an Idle peripheral */
  123. CPAL_I2C_ERR_TIMEOUT = 0x000000FF, /*!<Timeout error: The specified timeout has been elapsed without
  124. any response (expected flag or data didn't happen at expected time).*/
  125. CPAL_I2C_ERR_BERR = 0x00000100, /*!<A bus error is detected when a START or a STOP condition is detected
  126. and is not located after a multiple of 9 SCL clock pulses.
  127. The bus error flag is set only in case the I2C is involved in the transfer
  128. as master or addressed slave.
  129. In case of a misplaced START or ReSTART detection, the I2C enters address
  130. recognition state as for a correct START condition.
  131. When a bus error is detected, BERR flag is set in I2C_ISR register, and an
  132. interrupt is generated if ERRIE is set in I2C_CR1 register.*/
  133. CPAL_I2C_ERR_ARLO = 0x00000200, /*!<An arbitration loss is detected when a high level is sent on SDA, but a low
  134. level is sampled on the SCL rising edge.
  135. ? In master mode, the arbitration loss is detected during address phase, data
  136. phase and data acknowledge phase. In that case, SDA and SCL lines are released,
  137. START control bit is cleared by hardware and the master switches automatically
  138. to slave mode.
  139. ? In slave mode, arbitration loss is detected during data phase and data acknowledge
  140. phase. In that case, the transmission is stopped, and SCL and SDA lines are released.
  141. When an arbitration loss is detected, ARLO flag is set in I2C_ISR register, and an
  142. interrupt is generated if ERRIE is set in I2C_CR1 register.*/
  143. CPAL_I2C_ERR_AF = 0x00000010, /*!<Acknowledge Failure : NACK is considered as error only when this event is set in master mode.
  144. ? If Master: a Stop or repeated Start condition must be generated by software.
  145. When a NACK is detected, NACKF flag is set in I2C_ISR register, and an
  146. interrupt is generated if NACKIE is set in I2C_CR1 register.*/
  147. CPAL_I2C_ERR_OVR = 0x00000400, /*!<An overrun or underrun error is detected in slave mode when NOSTRETCH=1 and:
  148. ? In reception when a new byte is received and the RXDR register has not been read yet
  149. New received byte is lost, and a NACK is automatically sent as a response to the new byte.
  150. ? In transmission :
  151. – when STOPF=1 and the first data should be sent. The content of TXDATA is sent.
  152. – when a new byte should be sent and the TXDR register has not been written yet.
  153. The content of TXDATA is sent (same byte is sent twice)
  154. When an overrun or underrun error is detected, OVR flag is set in I2C_ISR register,
  155. and an interrupt is generated if ERRIE is set in I2C_CR1 register.*/
  156. }CPAL_I2CErrorTypeDef;
  157. /*========= CPAL_Dev_TypeDef =========*/
  158. /* CPAL Device structure definition */
  159. typedef struct
  160. {
  161. CPAL_DevTypeDef CPAL_Dev; /*!<Instance of the device. This parameter can be one
  162. of the following values: CPAL_Dev_TypeDef */
  163. CPAL_DirectionTypeDef CPAL_Direction; /*!<Specifies the direction for the device transfers.
  164. It can be one of the following values: CPAL_Direction_TypeDef */
  165. CPAL_ModeTypeDef CPAL_Mode; /*!<Specifies the maser/slave mode of device. It can be one of the
  166. following values: CPAL_Mode_TypeDef */
  167. CPAL_ProgModelTypeDef CPAL_ProgModel; /*!<Specifies the programming model for the device transfers.
  168. It can be one of the following values: CPAL_ProgModel_Enum */
  169. CPAL_TransferTypeDef* pCPAL_TransferTx; /*!<Pointer on a structure specifying the parameters of the current
  170. transmission operations. The structure fields are specified as
  171. follows: CPAL_Transfer_TypeDef. Use pNULL value if this direction
  172. is not needed.*/
  173. CPAL_TransferTypeDef* pCPAL_TransferRx; /*!<Pointer on a structure specifying the parameters of the current
  174. reception operations. The structure fields are specified as
  175. follows: CPAL_Transfer_TypeDef. Use pNULL value if this direction
  176. is not needed.*/
  177. __IO CPAL_StateTypeDef CPAL_State; /*!<Holds the current State of the CPAL driver relative to the device
  178. instantiated by CPAL_Dev field. The state parameter can be one of
  179. the following values: CPAL_State_Enum */
  180. __IO uint32_t wCPAL_DevError; /*!<Specifies the error code for the current operation.The error codes
  181. are specified for each device type as follows:
  182. CPAL_I2CError_Enum for I2C devices */
  183. uint32_t wCPAL_Options; /*!<Bit-field value specifying additional options for the configuration
  184. of the device: The bit-field value can be any combination of following
  185. values: CPAL_Options_Enum. When a value is not selected the relative
  186. feature is disabled */
  187. __IO uint32_t wCPAL_Timeout; /*!<This field is with timeout procedure. its used to detect timeout */
  188. I2C_InitTypeDef* pCPAL_I2C_Struct; /*!<Pointer to a device Initialization structure as described
  189. in the standard device library driver.
  190. A NULL pointer can be provided for this field and, in this case,
  191. the default values will be used for all the device initialization.
  192. If only some fields need to be modified for the initialization,
  193. one can use the CPAL_PPP_StructInit() function just before setting
  194. the needed fields.
  195. Example:
  196. CPAL_InitTypeDef I2C1_DevStructure;
  197. CPAL_I2C_StructInit(&I2C1_DevStructure);
  198. I2C1_DevStructure->pI2C_Struct->I2C_Speed = 100000;
  199. CPAL_I2C_Init(&I2C1_DevStructure); */
  200. }CPAL_InitTypeDef;
  201. /*========= Table containing all I2C device structures =========*/
  202. extern CPAL_InitTypeDef* I2C_DevStructures[];
  203. /*========= CPAL_Global_Device_Structures =========*/
  204. /* CPAL Global Device Structures are the Global default structures which
  205. are used to handle devices configuration and status.*/
  206. #ifdef CPAL_USE_I2C1
  207. extern CPAL_InitTypeDef I2C1_DevStructure;
  208. #endif /* CPAL_USE_I2C1 */
  209. #ifdef CPAL_USE_I2C2
  210. extern CPAL_InitTypeDef I2C2_DevStructure;
  211. #endif /* CPAL_USE_I2C2 */
  212. /* Exported constants --------------------------------------------------------*/
  213. /*========= CPAL_Options_TypeDef =========*/
  214. /* CPAL Options defines contains configuration options which can be affected
  215. to wCPAL_Options which is a bit-field argument so any combination of these
  216. parameters can be selected. If one option is not selected then the relative
  217. feature is disabled.
  218. There are common options and device specific options.*/
  219. #define CPAL_OPT_I2C_DUALADDR ((uint32_t)0x00000001) /*!<Use Dual Address Mode (available in Slave Mode only).
  220. To use this option enable it by affecting this define
  221. and own address2 to wCPAL_Options */
  222. #define CPAL_OPT_DMATX_TCIT ((uint32_t)0x00000100) /*!<Enable the Transmitter DMA Transfer Complete interrupt */
  223. #define CPAL_OPT_DMATX_HTIT ((uint32_t)0x00000200) /*!<Enable the Transmitter DMA Half Transfer Complete interrupt */
  224. #define CPAL_OPT_DMATX_TEIT ((uint32_t)0x00000400) /*!<Enable the Transmitter DMA Transfer Error interrupt */
  225. #define CPAL_OPT_DMARX_TCIT ((uint32_t)0x00000800) /*!<Enable the Receiver DMA Transfer Complete interrupt */
  226. #define CPAL_OPT_DMARX_HTIT ((uint32_t)0x00001000) /*!<Enable the Receiver DMA Half Transfer Complete interrupt */
  227. #define CPAL_OPT_DMARX_TEIT ((uint32_t)0x00002000) /*!<Enable the Receiver DMA Half Transfer Error interrupt */
  228. #define CPAL_OPT_DMATX_CIRCULAR ((uint32_t)0x00004000) /*!<Enable the Circular Mode for DMA Transmitter */
  229. #define CPAL_OPT_DMARX_CIRCULAR ((uint32_t)0x00008000) /*!<Enable the Circular Mode for DMA Receiver */
  230. #define CPAL_OPT_NO_MEM_ADDR ((uint32_t)0x00010000) /*!<Enable No Memory addressing mode: only slave device address sent
  231. No Register/Physical address to be sent after slave address */
  232. #define CPAL_OPT_16BIT_REG ((uint32_t)0x00020000) /*!<Enable 16-Bit Register/Physical addressing mode (two bytes,
  233. MSB first). This option is supported only when CPAL_OPT_NO_MEM_ADDR
  234. option is not set */
  235. #define CPAL_OPT_I2C_GENCALL ((uint32_t)0x00100000) /*!<Use General Call Address Mode (available in Slave Mode only)
  236. (General Call Address = 0x00) */
  237. #define CPAL_OPT_I2C_AUTOMATIC_END ((uint32_t)0x00200000) /*!<Enable Automatic end mode for master */
  238. #define CPAL_OPT_I2C_ERRIT_DISABLE ((uint32_t)0x00400000) /*!<Disable I2C Errors interrupt (Bus Error, Arbitration Loss,
  239. Acknowledge Failure and Overrun/Underrun Errors).
  240. By default, errors interrupt is enabled to manage errors efficiently */
  241. #define CPAL_OPT_I2C_NOSTOP ((uint32_t)0x00800000) /*!<Use communication mode with no STOP generation at the end
  242. of data transfer (for multi-read/write operations) */
  243. #define CPAL_OPT_I2C_NOSTOP_MODE ((uint32_t)0x01000000) /*!<Start communication in No STOP generation mode and close
  244. communication by Generating stop */
  245. #define CPAL_OPT_I2C_OA2_MASK ((uint32_t)0x0E000000) /*!<Contain Own Address 2 Mask (OA2MSK is coded on 3 bit)*/
  246. #define CPAL_OPT_I2C_10BIT_HEADR ((uint32_t)0x10000000) /*!<Enable the send of slave address-10bit-header only when switching from
  247. master transmitter to master receiver mode with No stop generation option enabled */
  248. #define CPAL_OPT_I2C_WAKEUP_STOP ((uint32_t)0x20000000) /*!<Enable the WakeUp from stop capability for the I2C slave device */
  249. #define CPAL_OPT_I2C_NACK_ADD ((uint32_t)0x40000000) /*!<Initialize the I2C Slave device without enabling the acknowledgement of its
  250. own address. This option must not be used with No Stop generation mode */
  251. /*========= CPAL_Interne_Defines =========*/
  252. #define CPAL_PASS ((uint32_t)0x00000000) /*!<This value is returned if the last operation succeed */
  253. #define CPAL_FAIL ((uint32_t)0x00000001) /*!<This value is returned if the last operation failed */
  254. #define pNULL (void*)0 /*!<This Value is used to initialise a null pointer */
  255. /* Exported macro ------------------------------------------------------------*/
  256. /* Exported functions --------------------------------------------------------*/
  257. /*========= CPAL_I2C_Exported_Functions =========*/
  258. /* These functions constitute the main CPAL API interface. All functions take as argument the
  259. CPAL_InitTypeDef structure defined in @ref CPAL_Dev_TypeDef. */
  260. uint32_t CPAL_I2C_Init (CPAL_InitTypeDef* pDevInitStruct); /*<!This function Initializes the selected I2C device
  261. and all needed resources (GPIOs, clocks, DMA,
  262. interrupts …)*/
  263. uint32_t CPAL_I2C_DeInit (CPAL_InitTypeDef* pDevInitStruct); /*<!This function free the resources used by the I2C
  264. device (GPIOs, clocks, DMA, interrupts …) and
  265. deinitialize the device itself */
  266. uint32_t CPAL_I2C_StructInit (CPAL_InitTypeDef* pDevInitStruct); /*<!This function Initializes I2C device structure
  267. by filling all fields with their default values.
  268. Warning: Pointer fields are filled with CPAL local variables
  269. pointer. To avoid all risks, it is recommended to declare
  270. application local variables and fill these fields with their
  271. pointers.*/
  272. #if defined (CPAL_I2C_MASTER_MODE) || ! defined (CPAL_I2C_LISTEN_MODE)
  273. uint32_t CPAL_I2C_Write (CPAL_InitTypeDef* pDevInitStruct); /*<!This function Writes data to the specified I2C device.
  274. All information relative to the write transfer parameters and
  275. current status are extracted from pCPAL_TransferTx field defined
  276. in @ref CPAL_Transfer_TypeDef */
  277. uint32_t CPAL_I2C_Read (CPAL_InitTypeDef* pDevInitStruct); /*<!This function Read data from the specified I2C device
  278. All information relative to the read transfer parameters and
  279. current status are extracted from pCPAL_TransferTx field defined
  280. in @ref CPAL_Transfer_TypeDef */
  281. #endif /* CPAL_I2C_MASTER_MODE || ! CPAL_I2C_LISTEN_MODE */
  282. #if defined (CPAL_I2C_LISTEN_MODE) && defined (CPAL_I2C_SLAVE_MODE)
  283. uint32_t CPAL_I2C_Listen (CPAL_InitTypeDef* pDevInitStruct); /*<!This function allows the specified I2C device to enter listen mode
  284. All information relative to the read or write transfer parameters and
  285. current status are extracted from fields defined in @ref CPAL_Transfer_TypeDef */
  286. #endif /* CPAL_I2C_LISTEN_MODE && CPAL_I2C_SLAVE_MODE */
  287. uint32_t CPAL_I2C_IsDeviceReady(CPAL_InitTypeDef* pDevInitStruct); /*<!This function can be used to wait until target device is ready
  288. for communication (ie. for memories after write operations) */
  289. uint32_t CPAL_I2C_EV_IRQHandler(CPAL_InitTypeDef* pDevInitStruct); /*<!This function manages all I2C device events */
  290. uint32_t CPAL_I2C_ER_IRQHandler(CPAL_InitTypeDef* pDevInitStruct); /*<!This function manages all I2C device errors */
  291. #ifdef CPAL_I2C_DMA_PROGMODEL
  292. uint32_t CPAL_I2C_DMA_TX_IRQHandler(CPAL_InitTypeDef* pDevInitStruct); /*<!This function Handles DMA TX Interrupts */
  293. uint32_t CPAL_I2C_DMA_RX_IRQHandler(CPAL_InitTypeDef* pDevInitStruct); /*<!This function Handles DMA RX Interrupts */
  294. #endif /* CPAL_I2C_DMA_PROGMODEL */
  295. /*========== CPAL_TIMEOUT_Callback ==========*/
  296. #ifndef CPAL_TIMEOUT_UserCallback
  297. uint32_t CPAL_TIMEOUT_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when a Timeout
  298. occurs during communication with devices */
  299. #endif
  300. /*========= CPAL_I2C_User_Callbacks =========*/
  301. /* These functions prototypes only are declared here. User can (optionally)
  302. implement the function body in his own application depending on the application needs.
  303. Each callback is called in a particular situation detailed in the callback description.*/
  304. #ifndef CPAL_I2C_TX_UserCallback
  305. void CPAL_I2C_TX_UserCallback (CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in Interrupt mode)
  306. the peripheral is preparing to send data */
  307. #endif
  308. #ifndef CPAL_I2C_RX_UserCallback
  309. void CPAL_I2C_RX_UserCallback (CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in Interrupt mode)
  310. the peripheral has received data */
  311. #endif
  312. #ifndef CPAL_I2C_TXTC_UserCallback
  313. void CPAL_I2C_TXTC_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA or Interrupt mode)
  314. TX Transfer is complete (to use in DMA mode, Transfer complete
  315. interrupt must be enabled) */
  316. #endif
  317. #ifndef CPAL_I2C_RXTC_UserCallback
  318. void CPAL_I2C_RXTC_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA or Interrupt mode)
  319. RX Transfer is complete (to use in DMA mode, Transfer complete
  320. interrupt must be enabled) */
  321. #endif
  322. #ifndef CPAL_I2C_DMATXTC_UserCallback
  323. void CPAL_I2C_DMATXTC_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called (in DMA mode) when
  324. DMA Transmission is finished (If Transfer Complete
  325. interrupt is enabled) */
  326. #endif
  327. #ifndef CPAL_I2C_DMATXHT_UserCallback
  328. void CPAL_I2C_DMATXHT_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called (in DMA mode) when the
  329. DMA Transmission has reached the half of the
  330. buffer (If Half Transfer interrupt is enabled) */
  331. #endif
  332. #ifndef CPAL_I2C_DMATXTE_UserCallback
  333. void CPAL_I2C_DMATXTE_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA mode) a
  334. DMA Transmission transfer error has occurred
  335. (If Transfer Error interrupt is enabled ) */
  336. #endif
  337. #ifndef CPAL_I2C_DMARXTC_UserCallback
  338. void CPAL_I2C_DMARXTC_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA mode) when
  339. DMA Reception is finished (If Transfer Complete
  340. interrupt is enabled) */
  341. #endif
  342. #ifndef CPAL_I2C_DMARXHT_UserCallback
  343. void CPAL_I2C_DMARXHT_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA mode) the
  344. DMA Reception has reached the half of the
  345. buffer (If Half Transfer interrupt is enabled) */
  346. #endif
  347. #ifndef CPAL_I2C_DMARXTE_UserCallback
  348. void CPAL_I2C_DMARXTE_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when (in DMA mode) a
  349. DMA Reception transfer error has occurred
  350. (If Transfer Error interrupt is enabled ) */
  351. #endif
  352. #ifndef CPAL_I2C_GENCALL_UserCallback
  353. void CPAL_I2C_GENCALL_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when General Call mode
  354. is set (used in General Call Mode only ) */
  355. #endif
  356. #ifndef CPAL_I2C_DUALF_UserCallback
  357. void CPAL_I2C_DUALF_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when Slave OA2 Address
  358. matched (used in Dual Address Mode only ) */
  359. #endif
  360. #ifndef CPAL_I2C_SLAVE_READ_UserCallback
  361. void CPAL_I2C_SLAVE_READ_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when a write operation is
  362. requested from master in Listen mode only */
  363. #endif
  364. #ifndef CPAL_I2C_SLAVE_WRITE_UserCallback
  365. void CPAL_I2C_SLAVE_WRITE_UserCallback(CPAL_InitTypeDef* pDevInitStruct); /*<!This function is called when a read operation is
  366. requested from master in Listen mode only */
  367. #endif
  368. /*========= CPAL_User_ErrorCallback_Prototypes =========*/
  369. /* User can use two types of Callback:
  370. - Single Error Callback : All error are handled by one Callback (CPAL_I2C_ERR_UserCallback()).
  371. - Multiple Error Callback : Each error has its own Callback ( CPAL_I2C_ERRTYPE_UserCallback () ,
  372. ERRTYPE : can be one of I2C Errors (BERR, ARLO, OVR and NACK)).
  373. To select one of this type, user should comment or uncomment adequate defines in stm32f0xx_i2c_cpal_conf.h file. */
  374. #ifdef USE_SINGLE_ERROR_CALLBACK
  375. #ifndef CPAL_I2C_ERR_UserCallback
  376. void CPAL_I2C_ERR_UserCallback(CPAL_DevTypeDef pDevInstance, uint32_t DeviceError); /*<!This callback is called when an error
  377. occurred on the peripheral while transferring
  378. (If I2C Error interrupt is enabled). Device
  379. instance and error type (DeviceError) are
  380. passed as argument. Device_Error value can be
  381. one of CPAL_I2CErrorTypeDef enumeration */
  382. #endif
  383. #endif /* USE_SINGLE_ERROR_CALLBACK */
  384. #ifdef USE_MULTIPLE_ERROR_CALLBACK
  385. #ifndef CPAL_I2C_BERR_UserCallback
  386. void CPAL_I2C_BERR_UserCallback(CPAL_DevTypeDef pDevInstance); /*<!This callback is called when an Bus ERROR
  387. occurred on the peripheral while transferring
  388. (If I2C Error interrupt is enabled) */
  389. #endif
  390. #ifndef CPAL_I2C_ARLO_UserCallback
  391. void CPAL_I2C_ARLO_UserCallback(CPAL_DevTypeDef pDevInstance); /*<!This callback is called when an Arbitration Lost
  392. ERROR occurred on the peripheral while transferring
  393. (If I2C Error interrupt is enabled) */
  394. #endif
  395. #ifndef CPAL_I2C_OVR_UserCallback
  396. void CPAL_I2C_OVR_UserCallback(CPAL_DevTypeDef pDevInstance); /*<!This callback is called when an Overrun/Underrun
  397. ERROR occurred on the peripheral while transferring
  398. (If I2C Error interrupt is enabled) */
  399. #endif
  400. #ifndef CPAL_I2C_AF_UserCallback
  401. void CPAL_I2C_AF_UserCallback(CPAL_DevTypeDef pDevInstance); /*<!This callback is called when an Not Acknowledge
  402. is received (If I2C NACK interrupt is enabled) */
  403. #endif
  404. #endif /* USE_SINGLE_ERROR_CALLBACK */
  405. #ifdef __cplusplus
  406. }
  407. #endif
  408. #endif /*__STM32F0XX_I2C_CPAL_H */
  409. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/