stm32f0xx_crs.c 14 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_crs.c
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 05-December-2014
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of CRS peripheral applicable only on STM32F042 and
  9. * STM32F072 devices:
  10. * + Configuration of the CRS peripheral
  11. * + Interrupts and flags management
  12. *
  13. *
  14. * @verbatim
  15. ===============================================================================
  16. ##### How to use this driver #####
  17. ===============================================================================
  18. [..]
  19. (+) Enable CRS AHB clock using RCC_APB1eriphClockCmd(RCC_APB1Periph_CRS, ENABLE)
  20. function
  21. @endverbatim
  22. *
  23. ******************************************************************************
  24. * @attention
  25. *
  26. * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  27. *
  28. * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  29. * You may not use this file except in compliance with the License.
  30. * You may obtain a copy of the License at:
  31. *
  32. * http://www.st.com/software_license_agreement_liberty_v2
  33. *
  34. * Unless required by applicable law or agreed to in writing, software
  35. * distributed under the License is distributed on an "AS IS" BASIS,
  36. * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  37. * See the License for the specific language governing permissions and
  38. * limitations under the License.
  39. *
  40. ******************************************************************************
  41. */
  42. /* Includes ------------------------------------------------------------------*/
  43. #include "stm32f0xx_crs.h"
  44. #include "stm32f0xx_rcc.h"
  45. /** @addtogroup STM32F0xx_StdPeriph_Driver
  46. * @{
  47. */
  48. /** @defgroup CRS
  49. * @brief CRS driver modules
  50. * @{
  51. */
  52. /* Private typedef -----------------------------------------------------------*/
  53. /* Private define ------------------------------------------------------------*/
  54. /* CRS Flag Mask */
  55. #define FLAG_MASK ((uint32_t)0x700)
  56. /* Private macro -------------------------------------------------------------*/
  57. /* Private variables ---------------------------------------------------------*/
  58. /* Private function prototypes -----------------------------------------------*/
  59. /* Private functions ---------------------------------------------------------*/
  60. /** @defgroup CRS_Private_Functions
  61. * @{
  62. */
  63. /** @defgroup CRS_Group1 Configuration of the CRS functions
  64. * @brief Configuration of the CRS functions
  65. *
  66. @verbatim
  67. ===============================================================================
  68. ##### CRS configuration functions #####
  69. ===============================================================================
  70. @endverbatim
  71. * @{
  72. */
  73. /**
  74. * @brief Deinitializes CRS peripheral registers to their default reset values.
  75. * @param None
  76. * @retval None
  77. */
  78. void CRS_DeInit(void)
  79. {
  80. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, ENABLE);
  81. RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, DISABLE);
  82. }
  83. /**
  84. * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value.
  85. * @note The calibration is used to compensate for the variations in voltage
  86. * and temperature that influence the frequency of the internal HSI48 RC.
  87. * @note This function can be called only when the AUTOTRIMEN bit is reset.
  88. * @param CRS_HSI48CalibrationValue:
  89. * @retval None
  90. */
  91. void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue)
  92. {
  93. /* Clear TRIM[5:0] bits */
  94. CRS->CR &= ~CRS_CR_TRIM;
  95. /* Set the TRIM[5:0] bits according to CRS_HSI48CalibrationValue value */
  96. CRS->CR |= (uint32_t)((uint32_t)CRS_HSI48CalibrationValue << 8);
  97. }
  98. /**
  99. * @brief Enables or disables the oscillator clock for frequency error counter.
  100. * @note when the CEN bit is set the CRS_CFGR register becomes write-protected.
  101. * @param NewState: new state of the frequency error counter.
  102. * This parameter can be: ENABLE or DISABLE.
  103. * @retval None
  104. */
  105. void CRS_FrequencyErrorCounterCmd(FunctionalState NewState)
  106. {
  107. assert_param(IS_FUNCTIONAL_STATE(NewState));
  108. if (NewState != DISABLE)
  109. {
  110. CRS->CR |= CRS_CR_CEN;
  111. }
  112. else
  113. {
  114. CRS->CR &= ~CRS_CR_CEN;
  115. }
  116. }
  117. /**
  118. * @brief Enables or disables the automatic hardware adjustement of TRIM bits.
  119. * @note When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected.
  120. * @param NewState: new state of the automatic trimming.
  121. * This parameter can be: ENABLE or DISABLE.
  122. * @retval None
  123. */
  124. void CRS_AutomaticCalibrationCmd(FunctionalState NewState)
  125. {
  126. assert_param(IS_FUNCTIONAL_STATE(NewState));
  127. if (NewState != DISABLE)
  128. {
  129. CRS->CR |= CRS_CR_AUTOTRIMEN;
  130. }
  131. else
  132. {
  133. CRS->CR &= ~CRS_CR_AUTOTRIMEN;
  134. }
  135. }
  136. /**
  137. * @brief Generate the software synchronization event
  138. * @param None
  139. * @retval None
  140. */
  141. void CRS_SoftwareSynchronizationGenerate(void)
  142. {
  143. CRS->CR |= CRS_CR_SWSYNC;
  144. }
  145. /**
  146. * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value.
  147. * @note The calibration is used to compensate for the variations in voltage
  148. * and temperature that influence the frequency of the internal HSI48 RC.
  149. * @note This function can be called only when the CEN bit is reset.
  150. * @param CRS_ReloadValue: specifies the HSI calibration trimming value.
  151. * This parameter must be a number between 0 and .
  152. * @retval None
  153. */
  154. void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue)
  155. {
  156. /* Clear RELOAD[15:0] bits */
  157. CRS->CFGR &= ~CRS_CFGR_RELOAD;
  158. /* Set the RELOAD[15:0] bits according to CRS_ReloadValue value */
  159. CRS->CFGR |= (uint32_t)CRS_ReloadValue;
  160. }
  161. /**
  162. * @brief
  163. * @note This function can be called only when the CEN bit is reset.
  164. * @param CRS_ErrorLimitValue: specifies the HSI calibration trimming value.
  165. * This parameter must be a number between 0 and .
  166. * @retval None
  167. */
  168. void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue)
  169. {
  170. /* Clear FELIM[7:0] bits */
  171. CRS->CFGR &= ~CRS_CFGR_FELIM;
  172. /* Set the FELIM[7:0] bits according to CRS_ErrorLimitValue value */
  173. CRS->CFGR |= (uint32_t)CRS_ErrorLimitValue;
  174. }
  175. /**
  176. * @brief
  177. * @note This function can be called only when the CEN bit is reset.
  178. * @param CRS_Prescaler: specifies the HSI calibration trimming value.
  179. * This parameter can be one of the following values:
  180. * @arg CRS_SYNC_Div1:
  181. * @arg CRS_SYNC_Div2:
  182. * @arg CRS_SYNC_Div4:
  183. * @arg CRS_SYNC_Div8:
  184. * @arg CRS_SYNC_Div16:
  185. * @arg CRS_SYNC_Div32:
  186. * @arg CRS_SYNC_Div64:
  187. * @arg CRS_SYNC_Div128:
  188. * @retval None
  189. */
  190. void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler)
  191. {
  192. /* Check the parameters */
  193. assert_param(IS_CRS_SYNC_DIV(CRS_Prescaler));
  194. /* Clear SYNCDIV[2:0] bits */
  195. CRS->CFGR &= ~CRS_CFGR_SYNCDIV;
  196. /* Set the CRS_CFGR_SYNCDIV[2:0] bits according to CRS_Prescaler value */
  197. CRS->CFGR |= CRS_Prescaler;
  198. }
  199. /**
  200. * @brief
  201. * @note This function can be called only when the CEN bit is reset.
  202. * @param CRS_Source: .
  203. * This parameter can be one of the following values:
  204. * @arg CRS_SYNCSource_GPIO:
  205. * @arg CRS_SYNCSource_LSE:
  206. * @arg CRS_SYNCSource_USB:
  207. * @retval None
  208. */
  209. void CRS_SynchronizationSourceConfig(uint32_t CRS_Source)
  210. {
  211. /* Check the parameters */
  212. assert_param(IS_CRS_SYNC_SOURCE(CRS_Source));
  213. /* Clear SYNCSRC[1:0] bits */
  214. CRS->CFGR &= ~CRS_CFGR_SYNCSRC;
  215. /* Set the SYNCSRC[1:0] bits according to CRS_Source value */
  216. CRS->CFGR |= CRS_Source;
  217. }
  218. /**
  219. * @brief
  220. * @note This function can be called only when the CEN bit is reset.
  221. * @param CRS_Polarity: .
  222. * This parameter can be one of the following values:
  223. * @arg CRS_SYNCPolarity_Rising:
  224. * @arg CRS_SYNCPolarity_Falling:
  225. * @retval None
  226. */
  227. void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity)
  228. {
  229. /* Check the parameters */
  230. assert_param(IS_CRS_SYNC_POLARITY(CRS_Polarity));
  231. /* Clear SYNCSPOL bit */
  232. CRS->CFGR &= ~CRS_CFGR_SYNCPOL;
  233. /* Set the SYNCSPOL bits according to CRS_Polarity value */
  234. CRS->CFGR |= CRS_Polarity;
  235. }
  236. /**
  237. * @brief Returns the Relaod value.
  238. * @param None
  239. * @retval The reload value
  240. */
  241. uint32_t CRS_GetReloadValue(void)
  242. {
  243. return ((uint32_t)(CRS->CFGR & CRS_CFGR_RELOAD));
  244. }
  245. /**
  246. * @brief Returns the HSI48 Calibration value.
  247. * @param None
  248. * @retval The reload value
  249. */
  250. uint32_t CRS_GetHSI48CalibrationValue(void)
  251. {
  252. return (((uint32_t)(CRS->CR & CRS_CR_TRIM)) >> 8);
  253. }
  254. /**
  255. * @brief Returns the frequency error capture.
  256. * @param None
  257. * @retval The frequency error capture value
  258. */
  259. uint32_t CRS_GetFrequencyErrorValue(void)
  260. {
  261. return ((uint32_t)(CRS->ISR & CRS_ISR_FECAP));
  262. }
  263. /**
  264. * @brief Returns the frequency error direction.
  265. * @param None
  266. * @retval The frequency error direction. The returned value can be one
  267. * of the following values:
  268. * - 0x00: Up counting
  269. * - 0x8000: Down counting
  270. */
  271. uint32_t CRS_GetFrequencyErrorDirection(void)
  272. {
  273. return ((uint32_t)(CRS->ISR & CRS_ISR_FEDIR));
  274. }
  275. /** @defgroup CRS_Group2 Interrupts and flags management functions
  276. * @brief Interrupts and flags management functions
  277. *
  278. @verbatim
  279. ===============================================================================
  280. ##### Interrupts and flags management functions #####
  281. ===============================================================================
  282. @endverbatim
  283. * @{
  284. */
  285. /**
  286. * @brief Enables or disables the specified CRS interrupts.
  287. * @param CRS_IT: specifies the RCC interrupt sources to be enabled or disabled.
  288. * This parameter can be any combination of the following values:
  289. * @arg CRS_IT_SYNCOK:
  290. * @arg CRS_IT_SYNCWARN:
  291. * @arg CRS_IT_ERR:
  292. * @arg CRS_IT_ESYNC:
  293. * @param NewState: new state of the specified CRS interrupts.
  294. * This parameter can be: ENABLE or DISABLE.
  295. * @retval None
  296. */
  297. void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState)
  298. {
  299. /* Check the parameters */
  300. assert_param(IS_CRS_IT(CRS_IT));
  301. assert_param(IS_FUNCTIONAL_STATE(NewState));
  302. if (NewState != DISABLE)
  303. {
  304. CRS->CR |= CRS_IT;
  305. }
  306. else
  307. {
  308. CRS->CR &= ~CRS_IT;
  309. }
  310. }
  311. /**
  312. * @brief Checks whether the specified CRS flag is set or not.
  313. * @param CRS_FLAG: specifies the flag to check.
  314. * This parameter can be one of the following values:
  315. * @arg CRS_FLAG_SYNCOK:
  316. * @arg CRS_FLAG_SYNCWARN:
  317. * @arg CRS_FLAG_ERR:
  318. * @arg CRS_FLAG_ESYNC:
  319. * @arg CRS_FLAG_TRIMOVF:
  320. * @arg CRS_FLAG_SYNCERR:
  321. * @arg CRS_FLAG_SYNCMISS:
  322. * @retval The new state of CRS_FLAG (SET or RESET).
  323. */
  324. FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG)
  325. {
  326. /* Check the parameters */
  327. assert_param(IS_CRS_FLAG(CRS_FLAG));
  328. return ((FlagStatus)(CRS->ISR & CRS_FLAG));
  329. }
  330. /**
  331. * @brief Clears the CRS specified FLAG.
  332. * @param CRS_FLAG: specifies the flag to check.
  333. * This parameter can be one of the following values:
  334. * @arg CRS_FLAG_SYNCOK:
  335. * @arg CRS_FLAG_SYNCWARN:
  336. * @arg CRS_FLAG_ERR:
  337. * @arg CRS_FLAG_ESYNC:
  338. * @arg CRS_FLAG_TRIMOVF:
  339. * @arg CRS_FLAG_SYNCERR:
  340. * @arg CRS_FLAG_SYNCMISS:
  341. * @retval None
  342. */
  343. void CRS_ClearFlag(uint32_t CRS_FLAG)
  344. {
  345. /* Check the parameters */
  346. assert_param(IS_CRS_FLAG(CRS_FLAG));
  347. if ((CRS_FLAG & FLAG_MASK)!= 0)
  348. {
  349. CRS->ICR |= CRS_ICR_ERRC;
  350. }
  351. else
  352. {
  353. CRS->ICR |= CRS_FLAG;
  354. }
  355. }
  356. /**
  357. * @brief Checks whether the specified CRS IT pending bit is set or not.
  358. * @param CRS_IT: specifies the IT pending bit to check.
  359. * This parameter can be one of the following values:
  360. * @arg CRS_IT_SYNCOK:
  361. * @arg CRS_IT_SYNCWARN:
  362. * @arg CRS_IT_ERR:
  363. * @arg CRS_IT_ESYNC:
  364. * @arg CRS_IT_TRIMOVF:
  365. * @arg CRS_IT_SYNCERR:
  366. * @arg CRS_IT_SYNCMISS:
  367. * @retval The new state of CRS_IT (SET or RESET).
  368. */
  369. ITStatus CRS_GetITStatus(uint32_t CRS_IT)
  370. {
  371. /* Check the parameters */
  372. assert_param(IS_CRS_GET_IT(CRS_IT));
  373. return ((ITStatus)(CRS->ISR & CRS_IT));
  374. }
  375. /**
  376. * @brief Clears the CRS specified IT pending bi.
  377. * @param CRS_FLAG: specifies the IT pending bi to clear.
  378. * This parameter can be one of the following values:
  379. * @arg CRS_IT_SYNCOK:
  380. * @arg CRS_IT_SYNCWARN:
  381. * @arg CRS_IT_ERR:
  382. * @arg CRS_IT_ESYNC:
  383. * @arg CRS_IT_TRIMOVF:
  384. * @arg CRS_IT_SYNCERR:
  385. * @arg CRS_IT_SYNCMISS:
  386. * @retval None
  387. */
  388. void CRS_ClearITPendingBit(uint32_t CRS_IT)
  389. {
  390. /* Check the parameters */
  391. assert_param(IS_CRS_CLEAR_IT(CRS_IT));
  392. if ((CRS_IT & FLAG_MASK)!= 0)
  393. {
  394. CRS->ICR |= CRS_ICR_ERRC;
  395. }
  396. else
  397. {
  398. CRS->ICR |= CRS_IT;
  399. }
  400. }
  401. /**
  402. * @}
  403. */
  404. /**
  405. * @}
  406. */
  407. /**
  408. * @}
  409. */
  410. /**
  411. * @}
  412. */
  413. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/