startup_stm32f0xx.s 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344
  1. /**
  2. ******************************************************************************
  3. * @file startup_stm32f10x_ld.s
  4. * @author MCD Application Team
  5. * @version V3.5.0
  6. * @date 11-March-2011
  7. * @brief STM32F10x Low Density Devices vector table for RIDE7 toolchain.
  8. * This module performs:
  9. * - Set the initial SP
  10. * - Set the initial PC == Reset_Handler,
  11. * - Set the vector table entries with the exceptions ISR address
  12. * - Configure the clock system
  13. * - Branches to main in the C library (which eventually
  14. * calls main()).
  15. * After Reset the Cortex-M3 processor is in Thread mode,
  16. * priority is Privileged, and the Stack is set to Main.
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  21. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  22. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  23. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  24. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  25. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  26. *
  27. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  28. ******************************************************************************
  29. */
  30. .syntax unified
  31. .cpu cortex-m3
  32. .fpu softvfp
  33. .thumb
  34. .global g_pfnVectors
  35. .global Default_Handler
  36. /* start address for the initialization values of the .data section.
  37. defined in linker script */
  38. .word _sidata
  39. /* start address for the .data section. defined in linker script */
  40. .word _sdata
  41. /* end address for the .data section. defined in linker script */
  42. .word _edata
  43. /* start address for the .bss section. defined in linker script */
  44. .word _sbss
  45. /* end address for the .bss section. defined in linker script */
  46. .word _ebss
  47. .equ BootRAM, 0xF108F85F
  48. /**
  49. * @brief This is the code that gets called when the processor first
  50. * starts execution following a reset event. Only the absolutely
  51. * necessary set is performed, after which the application
  52. * supplied main() routine is called.
  53. * @param None
  54. * @retval : None
  55. */
  56. .section .text.Reset_Handler
  57. .weak Reset_Handler
  58. .type Reset_Handler, %function
  59. Reset_Handler:
  60. /* Copy the data segment initializers from flash to SRAM */
  61. movs r1, #0
  62. b LoopCopyDataInit
  63. CopyDataInit:
  64. ldr r3, =_sidata
  65. ldr r3, [r3, r1]
  66. str r3, [r0, r1]
  67. adds r1, r1, #4
  68. LoopCopyDataInit:
  69. ldr r0, =_sdata
  70. ldr r3, =_edata
  71. adds r2, r0, r1
  72. cmp r2, r3
  73. bcc CopyDataInit
  74. ldr r2, =_sbss
  75. b LoopFillZerobss
  76. /* Zero fill the bss segment. */
  77. FillZerobss:
  78. movs r3, #0
  79. str r3, [r2], #4
  80. LoopFillZerobss:
  81. ldr r3, = _ebss
  82. cmp r2, r3
  83. bcc FillZerobss
  84. /* Call the clock system intitialization function.*/
  85. bl SystemInit
  86. /* Call the application's entry point.*/
  87. bl main
  88. bx lr
  89. .size Reset_Handler, .-Reset_Handler
  90. /**
  91. * @brief This is the code that gets called when the processor receives an
  92. * unexpected interrupt. This simply enters an infinite loop, preserving
  93. * the system state for examination by a debugger.
  94. * @param None
  95. * @retval None
  96. */
  97. .section .text.Default_Handler,"ax",%progbits
  98. Default_Handler:
  99. Infinite_Loop:
  100. b Infinite_Loop
  101. .size Default_Handler, .-Default_Handler
  102. /******************************************************************************
  103. *
  104. * The minimal vector table for a Cortex M3. Note that the proper constructs
  105. * must be placed on this to ensure that it ends up at physical address
  106. * 0x0000.0000.
  107. *
  108. ******************************************************************************/
  109. .section .isr_vector,"a",%progbits
  110. .type g_pfnVectors, %object
  111. .size g_pfnVectors, .-g_pfnVectors
  112. g_pfnVectors:
  113. .word _estack
  114. .word Reset_Handler
  115. .word NMI_Handler
  116. .word HardFault_Handler
  117. .word MemManage_Handler
  118. .word BusFault_Handler
  119. .word UsageFault_Handler
  120. .word 0
  121. .word 0
  122. .word 0
  123. .word 0
  124. .word SVC_Handler
  125. .word DebugMon_Handler
  126. .word 0
  127. .word PendSV_Handler
  128. .word SysTick_Handler
  129. .word WWDG_IRQHandler
  130. .word PVD_IRQHandler
  131. .word TAMPER_IRQHandler
  132. .word RTC_IRQHandler
  133. .word FLASH_IRQHandler
  134. .word RCC_IRQHandler
  135. .word EXTI0_IRQHandler
  136. .word EXTI1_IRQHandler
  137. .word EXTI2_IRQHandler
  138. .word EXTI3_IRQHandler
  139. .word EXTI4_IRQHandler
  140. .word DMA1_Channel1_IRQHandler
  141. .word DMA1_Channel2_IRQHandler
  142. .word DMA1_Channel3_IRQHandler
  143. .word DMA1_Channel4_IRQHandler
  144. .word DMA1_Channel5_IRQHandler
  145. .word DMA1_Channel6_IRQHandler
  146. .word DMA1_Channel7_IRQHandler
  147. .word ADC1_2_IRQHandler
  148. .word USB_HP_CAN1_TX_IRQHandler
  149. .word USB_LP_CAN1_RX0_IRQHandler
  150. .word CAN1_RX1_IRQHandler
  151. .word CAN1_SCE_IRQHandler
  152. .word EXTI9_5_IRQHandler
  153. .word TIM1_BRK_IRQHandler
  154. .word TIM1_UP_IRQHandler
  155. .word TIM1_TRG_COM_IRQHandler
  156. .word TIM1_CC_IRQHandler
  157. .word TIM2_IRQHandler
  158. .word TIM3_IRQHandler
  159. .word 0
  160. .word I2C1_EV_IRQHandler
  161. .word I2C1_ER_IRQHandler
  162. .word 0
  163. .word 0
  164. .word SPI1_IRQHandler
  165. .word 0
  166. .word USART1_IRQHandler
  167. .word USART2_IRQHandler
  168. .word 0
  169. .word EXTI15_10_IRQHandler
  170. .word RTCAlarm_IRQHandler
  171. .word USBWakeUp_IRQHandler
  172. .word 0
  173. .word 0
  174. .word 0
  175. .word 0
  176. .word 0
  177. .word 0
  178. .word 0
  179. .word BootRAM /* @0x108. This is for boot in RAM mode for
  180. STM32F10x Low Density devices.*/
  181. /*******************************************************************************
  182. *
  183. * Provide weak aliases for each Exception handler to the Default_Handler.
  184. * As they are weak aliases, any function with the same name will override
  185. * this definition.
  186. *
  187. *******************************************************************************/
  188. .weak NMI_Handler
  189. .thumb_set NMI_Handler,Default_Handler
  190. .weak HardFault_Handler
  191. .thumb_set HardFault_Handler,Default_Handler
  192. .weak MemManage_Handler
  193. .thumb_set MemManage_Handler,Default_Handler
  194. .weak BusFault_Handler
  195. .thumb_set BusFault_Handler,Default_Handler
  196. .weak UsageFault_Handler
  197. .thumb_set UsageFault_Handler,Default_Handler
  198. .weak SVC_Handler
  199. .thumb_set SVC_Handler,Default_Handler
  200. .weak DebugMon_Handler
  201. .thumb_set DebugMon_Handler,Default_Handler
  202. .weak PendSV_Handler
  203. .thumb_set PendSV_Handler,Default_Handler
  204. .weak SysTick_Handler
  205. .thumb_set SysTick_Handler,Default_Handler
  206. .weak WWDG_IRQHandler
  207. .thumb_set WWDG_IRQHandler,Default_Handler
  208. .weak PVD_IRQHandler
  209. .thumb_set PVD_IRQHandler,Default_Handler
  210. .weak TAMPER_IRQHandler
  211. .thumb_set TAMPER_IRQHandler,Default_Handler
  212. .weak RTC_IRQHandler
  213. .thumb_set RTC_IRQHandler,Default_Handler
  214. .weak FLASH_IRQHandler
  215. .thumb_set FLASH_IRQHandler,Default_Handler
  216. .weak RCC_IRQHandler
  217. .thumb_set RCC_IRQHandler,Default_Handler
  218. .weak EXTI0_IRQHandler
  219. .thumb_set EXTI0_IRQHandler,Default_Handler
  220. .weak EXTI1_IRQHandler
  221. .thumb_set EXTI1_IRQHandler,Default_Handler
  222. .weak EXTI2_IRQHandler
  223. .thumb_set EXTI2_IRQHandler,Default_Handler
  224. .weak EXTI3_IRQHandler
  225. .thumb_set EXTI3_IRQHandler,Default_Handler
  226. .weak EXTI4_IRQHandler
  227. .thumb_set EXTI4_IRQHandler,Default_Handler
  228. .weak DMA1_Channel1_IRQHandler
  229. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  230. .weak DMA1_Channel2_IRQHandler
  231. .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
  232. .weak DMA1_Channel3_IRQHandler
  233. .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
  234. .weak DMA1_Channel4_IRQHandler
  235. .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
  236. .weak DMA1_Channel5_IRQHandler
  237. .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
  238. .weak DMA1_Channel6_IRQHandler
  239. .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
  240. .weak DMA1_Channel7_IRQHandler
  241. .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
  242. .weak ADC1_2_IRQHandler
  243. .thumb_set ADC1_2_IRQHandler,Default_Handler
  244. .weak USB_HP_CAN1_TX_IRQHandler
  245. .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
  246. .weak USB_LP_CAN1_RX0_IRQHandler
  247. .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
  248. .weak CAN1_RX1_IRQHandler
  249. .thumb_set CAN1_RX1_IRQHandler,Default_Handler
  250. .weak CAN1_SCE_IRQHandler
  251. .thumb_set CAN1_SCE_IRQHandler,Default_Handler
  252. .weak EXTI9_5_IRQHandler
  253. .thumb_set EXTI9_5_IRQHandler,Default_Handler
  254. .weak TIM1_BRK_IRQHandler
  255. .thumb_set TIM1_BRK_IRQHandler,Default_Handler
  256. .weak TIM1_UP_IRQHandler
  257. .thumb_set TIM1_UP_IRQHandler,Default_Handler
  258. .weak TIM1_TRG_COM_IRQHandler
  259. .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
  260. .weak TIM1_CC_IRQHandler
  261. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  262. .weak TIM2_IRQHandler
  263. .thumb_set TIM2_IRQHandler,Default_Handler
  264. .weak TIM3_IRQHandler
  265. .thumb_set TIM3_IRQHandler,Default_Handler
  266. .weak I2C1_EV_IRQHandler
  267. .thumb_set I2C1_EV_IRQHandler,Default_Handler
  268. .weak I2C1_ER_IRQHandler
  269. .thumb_set I2C1_ER_IRQHandler,Default_Handler
  270. .weak SPI1_IRQHandler
  271. .thumb_set SPI1_IRQHandler,Default_Handler
  272. .weak USART1_IRQHandler
  273. .thumb_set USART1_IRQHandler,Default_Handler
  274. .weak USART2_IRQHandler
  275. .thumb_set USART2_IRQHandler,Default_Handler
  276. .weak EXTI15_10_IRQHandler
  277. .thumb_set EXTI15_10_IRQHandler,Default_Handler
  278. .weak RTCAlarm_IRQHandler
  279. .thumb_set RTCAlarm_IRQHandler,Default_Handler
  280. .weak USBWakeUp_IRQHandler
  281. .thumb_set USBWakeUp_IRQHandler,Default_Handler
  282. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/