comments added, good version

Core/Src/RFDAproto.c

@@ -18,46 +18,46 @@ uint8_t i;
 void RFDA_init(void){
 
 	//GPIO CFG
-	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S);
+	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S); //SET LE
 
 	//TIM CFG
-	WRITE_REG(RFDA_TIM->ARR,RFDA_TIM_ARR);
-	WRITE_REG(RFDA_TIM->CCR1,RFDA_TIM_CCR1);
+	WRITE_REG(RFDA_TIM->ARR,RFDA_TIM_ARR); //SET autoreload value
+	WRITE_REG(RFDA_TIM->CCR1,RFDA_TIM_CCR1);//SET capture-compare value
 
 	SET_BIT(RFDA_TIM->BDTR,TIM_BDTR_MOE);//OUTPUT ENABLE
 	SET_BIT(RFDA_TIM->DIER,TIM_DIER_UDE); //UDE: Update DMA request enable
 	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //Capture/Compare 1 output enable
 
 	//DMA CFG
-	CLEAR_BIT(DMA_CH->CCR, DMA_CCR_EN); //disable channel
+	CLEAR_BIT(DMA_CH->CCR, DMA_CCR_EN); //disable DMA channel
 	/////////////////////////////////////
-	WRITE_REG(DMA_CH->CPAR, (uint32_t)(&(LE_AND_DATA_PORT->BSRR))); //peripherial address
-	WRITE_REG(DMA_CH->CMAR, (uint32_t)((buf))); //mem address
+	WRITE_REG(DMA_CH->CPAR, (uint32_t)(&(LE_AND_DATA_PORT->BSRR))); //peripherial address (to)
+	WRITE_REG(DMA_CH->CMAR, (uint32_t)((buf))); //mem address (from)
 	SET_BIT(DMA_CH->CCR, DMA_CCR_TCIE); //TCIE: Transfer complete interrupt enable
-	NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+	NVIC_EnableIRQ(DMA1_Channel5_IRQn); //ENABLE end of transfer IRQ
 	SET_BIT(DMA1->IFCR, DMA_IFCR_CTCIF5); //CTCIFx: Channel x transfer complete flag clear (x = 1 ..7)
 	//////////////////////////////////////
-	SET_BIT(DMA_CH->CCR,DMA_CCR_EN); //enable channel
+	SET_BIT(DMA_CH->CCR,DMA_CCR_EN); //enable DMA channel
 }
 void RFDA(uint8_t k){
 	if(k!=7U){
-		for(i=0;i<BUF_LEN-1-k;i++) buf[i] = DATA_S;
-		buf[BUF_LEN-1-k] = DATA_R;
-		for(i=BUF_LEN-k;i<BUF_LEN-1;i++) buf[i] = DATA_S;
+		for(i=0;i<BUF_LEN-1-k;i++) buf[i] = DATA_S; //1...1
+		buf[BUF_LEN-1-k] = DATA_R; //0
+		for(i=BUF_LEN-k;i<BUF_LEN-1;i++) buf[i] = DATA_S; //1...1
 	}
 	else{
-		for(i=0;i<BUF_LEN;i++) buf[i]= DATA_R;
+		for(i=0;i<BUF_LEN;i++) buf[i]= DATA_R; //0...0
 	}
 	//DMA CFG
 	CLEAR_BIT(DMA_CH->CCR,DMA_CCR_EN); //disable channel
 	MODIFY_REG(DMA_CH->CNDTR, DMA_CNDTR_NDT, BUF_LEN);
 	SET_BIT(DMA_CH->CCR,DMA_CCR_EN); //enable channel
 
-	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_R); //LE RESET
-	WRITE_REG(RFDA_TIM->CNT,0U);
-	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E);
-	SET_BIT(RFDA_TIM->CR1,TIM_CR1_CEN);
-	SET_BIT(RFDA_TIM->EGR,TIM_EGR_UG);
+	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_R); //LE RESET at start of transfer
+	WRITE_REG(RFDA_TIM->CNT,0U); //Set TIM counter to zero
+	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //enable data OUTPUT
+	SET_BIT(RFDA_TIM->CR1,TIM_CR1_CEN); //enable counter
+	SET_BIT(RFDA_TIM->EGR,TIM_EGR_UG); //generate update at start (first dma transfer)
 }
 
 /**
@@ -66,9 +66,9 @@ void RFDA(uint8_t k){
 void DMA1_Channel5_IRQHandler(void)
 {
   /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
-	CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN);
-	CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E);
-	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S); //LE SET
+	CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN); //turn off counter
+	CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //disable data channel
+	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S|DATA_R); //LE SET and DATA RESET at the END of transfer
 	SET_BIT(DMA1->IFCR, DMA_IFCR_CTCIF5); //CTCIFx: Channel x transfer complete flag clear (x = 1 ..7)
   /* USER CODE END DMA1_Channel2_IRQn 0 */
 

build/RFDA4005.map

@@ -896,7 +896,7 @@ LOAD /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
                 0x0000000008000000                g_pfnVectors
                 0x000000000800010c                . = ALIGN (0x4)
 
-.text           0x000000000800010c     0x3de8
+.text           0x000000000800010c     0x3dec
                 0x000000000800010c                . = ALIGN (0x4)
  *(.text)
  .text          0x000000000800010c       0x40 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
@@ -907,578 +907,578 @@ LOAD /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
  .text.RFDA     0x00000000080001bc       0xcc build/RFDAproto.o
                 0x00000000080001bc                RFDA
  .text.DMA1_Channel5_IRQHandler
-                0x0000000008000288       0x30 build/RFDAproto.o
+                0x0000000008000288       0x34 build/RFDAproto.o
                 0x0000000008000288                DMA1_Channel5_IRQHandler
  .text.LL_ADC_INJ_SetSequencerRanks
-                0x00000000080002b8       0x30 build/main.o
+                0x00000000080002bc       0x30 build/main.o
  .text.MX_DMA_Init
-                0x00000000080002e8       0x38 build/main.o
+                0x00000000080002ec       0x38 build/main.o
  .text.MX_GPIO_Init
-                0x0000000008000320       0x90 build/main.o
+                0x0000000008000324       0x90 build/main.o
  .text.LL_ADC_SetChannelSamplingTime
-                0x00000000080003b0       0x52 build/main.o
- *fill*         0x0000000008000402        0x2 
+                0x00000000080003b4       0x52 build/main.o
+ *fill*         0x0000000008000406        0x2 
  .text.MX_ADC1_Init
-                0x0000000008000404      0x138 build/main.o
+                0x0000000008000408      0x138 build/main.o
  .text.MX_TIM1_Init
-                0x000000000800053c      0x15c build/main.o
+                0x0000000008000540      0x15c build/main.o
  .text.Error_Handler
-                0x0000000008000698        0x4 build/main.o
-                0x0000000008000698                Error_Handler
+                0x000000000800069c        0x4 build/main.o
+                0x000000000800069c                Error_Handler
  .text.SystemClock_Config
-                0x000000000800069c       0xbc build/main.o
-                0x000000000800069c                SystemClock_Config
- .text.main     0x0000000008000758       0x34 build/main.o
-                0x0000000008000758                main
+                0x00000000080006a0       0xbc build/main.o
+                0x00000000080006a0                SystemClock_Config
+ .text.main     0x000000000800075c       0x34 build/main.o
+                0x000000000800075c                main
  .text.NMI_Handler
-                0x000000000800078c        0x2 build/stm32f1xx_it.o
-                0x000000000800078c                NMI_Handler
+                0x0000000008000790        0x2 build/stm32f1xx_it.o
+                0x0000000008000790                NMI_Handler
  .text.HardFault_Handler
-                0x000000000800078e        0x2 build/stm32f1xx_it.o
-                0x000000000800078e                HardFault_Handler
+                0x0000000008000792        0x2 build/stm32f1xx_it.o
+                0x0000000008000792                HardFault_Handler
  .text.MemManage_Handler
-                0x0000000008000790        0x2 build/stm32f1xx_it.o
-                0x0000000008000790                MemManage_Handler
+                0x0000000008000794        0x2 build/stm32f1xx_it.o
+                0x0000000008000794                MemManage_Handler
  .text.BusFault_Handler
-                0x0000000008000792        0x2 build/stm32f1xx_it.o
-                0x0000000008000792                BusFault_Handler
+                0x0000000008000796        0x2 build/stm32f1xx_it.o
+                0x0000000008000796                BusFault_Handler
  .text.UsageFault_Handler
-                0x0000000008000794        0x2 build/stm32f1xx_it.o
-                0x0000000008000794                UsageFault_Handler
+                0x0000000008000798        0x2 build/stm32f1xx_it.o
+                0x0000000008000798                UsageFault_Handler
  .text.SVC_Handler
-                0x0000000008000796        0x2 build/stm32f1xx_it.o
-                0x0000000008000796                SVC_Handler
+                0x000000000800079a        0x2 build/stm32f1xx_it.o
+                0x000000000800079a                SVC_Handler
  .text.DebugMon_Handler
-                0x0000000008000798        0x2 build/stm32f1xx_it.o
-                0x0000000008000798                DebugMon_Handler
+                0x000000000800079c        0x2 build/stm32f1xx_it.o
+                0x000000000800079c                DebugMon_Handler
  .text.PendSV_Handler
-                0x000000000800079a        0x2 build/stm32f1xx_it.o
-                0x000000000800079a                PendSV_Handler
+                0x000000000800079e        0x2 build/stm32f1xx_it.o
+                0x000000000800079e                PendSV_Handler
  .text.SysTick_Handler
-                0x000000000800079c        0x8 build/stm32f1xx_it.o
-                0x000000000800079c                SysTick_Handler
+                0x00000000080007a0        0x8 build/stm32f1xx_it.o
+                0x00000000080007a0                SysTick_Handler
  .text.USB_LP_CAN1_RX0_IRQHandler
-                0x00000000080007a4       0x10 build/stm32f1xx_it.o
-                0x00000000080007a4                USB_LP_CAN1_RX0_IRQHandler
+                0x00000000080007a8       0x10 build/stm32f1xx_it.o
+                0x00000000080007a8                USB_LP_CAN1_RX0_IRQHandler
  .text.HAL_MspInit
-                0x00000000080007b4       0x44 build/stm32f1xx_hal_msp.o
-                0x00000000080007b4                HAL_MspInit
+                0x00000000080007b8       0x44 build/stm32f1xx_hal_msp.o
+                0x00000000080007b8                HAL_MspInit
  .text.MX_USB_DEVICE_Init
-                0x00000000080007f8       0x54 build/usb_device.o
-                0x00000000080007f8                MX_USB_DEVICE_Init
+                0x00000000080007fc       0x54 build/usb_device.o
+                0x00000000080007fc                MX_USB_DEVICE_Init
  .text.USBD_FS_DeviceDescriptor
-                0x000000000800084c        0xc build/usbd_desc.o
-                0x000000000800084c                USBD_FS_DeviceDescriptor
+                0x0000000008000850        0xc build/usbd_desc.o
+                0x0000000008000850                USBD_FS_DeviceDescriptor
  .text.USBD_FS_LangIDStrDescriptor
-                0x0000000008000858        0xc build/usbd_desc.o
-                0x0000000008000858                USBD_FS_LangIDStrDescriptor
+                0x000000000800085c        0xc build/usbd_desc.o
+                0x000000000800085c                USBD_FS_LangIDStrDescriptor
  .text.IntToUnicode
-                0x0000000008000864       0x46 build/usbd_desc.o
- *fill*         0x00000000080008aa        0x2 
+                0x0000000008000868       0x46 build/usbd_desc.o
+ *fill*         0x00000000080008ae        0x2 
  .text.Get_SerialNum
-                0x00000000080008ac       0x38 build/usbd_desc.o
+                0x00000000080008b0       0x38 build/usbd_desc.o
  .text.USBD_FS_SerialStrDescriptor
-                0x00000000080008e4       0x14 build/usbd_desc.o
-                0x00000000080008e4                USBD_FS_SerialStrDescriptor
+                0x00000000080008e8       0x14 build/usbd_desc.o
+                0x00000000080008e8                USBD_FS_SerialStrDescriptor
  .text.USBD_FS_ProductStrDescriptor
-                0x00000000080008f8       0x24 build/usbd_desc.o
-                0x00000000080008f8                USBD_FS_ProductStrDescriptor
+                0x00000000080008fc       0x24 build/usbd_desc.o
+                0x00000000080008fc                USBD_FS_ProductStrDescriptor
  .text.USBD_FS_ManufacturerStrDescriptor
-                0x000000000800091c       0x1c build/usbd_desc.o
-                0x000000000800091c                USBD_FS_ManufacturerStrDescriptor
+                0x0000000008000920       0x1c build/usbd_desc.o
+                0x0000000008000920                USBD_FS_ManufacturerStrDescriptor
  .text.USBD_FS_ConfigStrDescriptor
-                0x0000000008000938       0x24 build/usbd_desc.o
-                0x0000000008000938                USBD_FS_ConfigStrDescriptor
+                0x000000000800093c       0x24 build/usbd_desc.o
+                0x000000000800093c                USBD_FS_ConfigStrDescriptor
  .text.USBD_FS_InterfaceStrDescriptor
-                0x000000000800095c       0x24 build/usbd_desc.o
-                0x000000000800095c                USBD_FS_InterfaceStrDescriptor
+                0x0000000008000960       0x24 build/usbd_desc.o
+                0x0000000008000960                USBD_FS_InterfaceStrDescriptor
  .text.CDC_DeInit_FS
-                0x0000000008000980        0x4 build/usbd_cdc_if.o
- .text.CDC_Control_FS
                 0x0000000008000984        0x4 build/usbd_cdc_if.o
+ .text.CDC_Control_FS
+                0x0000000008000988        0x4 build/usbd_cdc_if.o
  .text.CDC_Receive_FS
-                0x0000000008000988       0x24 build/usbd_cdc_if.o
+                0x000000000800098c       0x24 build/usbd_cdc_if.o
  .text.CDC_Init_FS
-                0x00000000080009ac       0x28 build/usbd_cdc_if.o
+                0x00000000080009b0       0x28 build/usbd_cdc_if.o
  .text.USBD_Get_USB_Status
-                0x00000000080009d4       0x14 build/usbd_conf.o
+                0x00000000080009d8       0x14 build/usbd_conf.o
  .text.HAL_PCD_MspInit
-                0x00000000080009e8       0x40 build/usbd_conf.o
-                0x00000000080009e8                HAL_PCD_MspInit
+                0x00000000080009ec       0x40 build/usbd_conf.o
+                0x00000000080009ec                HAL_PCD_MspInit
  .text.HAL_PCD_SetupStageCallback
-                0x0000000008000a28       0x10 build/usbd_conf.o
-                0x0000000008000a28                HAL_PCD_SetupStageCallback
+                0x0000000008000a2c       0x10 build/usbd_conf.o
+                0x0000000008000a2c                HAL_PCD_SetupStageCallback
  .text.HAL_PCD_DataOutStageCallback
-                0x0000000008000a38       0x18 build/usbd_conf.o
-                0x0000000008000a38                HAL_PCD_DataOutStageCallback
+                0x0000000008000a3c       0x18 build/usbd_conf.o
+                0x0000000008000a3c                HAL_PCD_DataOutStageCallback
  .text.HAL_PCD_DataInStageCallback
-                0x0000000008000a50       0x16 build/usbd_conf.o
-                0x0000000008000a50                HAL_PCD_DataInStageCallback
+                0x0000000008000a54       0x16 build/usbd_conf.o
+                0x0000000008000a54                HAL_PCD_DataInStageCallback
  .text.HAL_PCD_SOFCallback
-                0x0000000008000a66        0xc build/usbd_conf.o
-                0x0000000008000a66                HAL_PCD_SOFCallback
+                0x0000000008000a6a        0xc build/usbd_conf.o
+                0x0000000008000a6a                HAL_PCD_SOFCallback
  .text.HAL_PCD_ResetCallback
-                0x0000000008000a72       0x24 build/usbd_conf.o
-                0x0000000008000a72                HAL_PCD_ResetCallback
- *fill*         0x0000000008000a96        0x2 
+                0x0000000008000a76       0x24 build/usbd_conf.o
+                0x0000000008000a76                HAL_PCD_ResetCallback
+ *fill*         0x0000000008000a9a        0x2 
  .text.HAL_PCD_SuspendCallback
-                0x0000000008000a98       0x20 build/usbd_conf.o
-                0x0000000008000a98                HAL_PCD_SuspendCallback
+                0x0000000008000a9c       0x20 build/usbd_conf.o
+                0x0000000008000a9c                HAL_PCD_SuspendCallback
  .text.HAL_PCD_ResumeCallback
-                0x0000000008000ab8        0xc build/usbd_conf.o
-                0x0000000008000ab8                HAL_PCD_ResumeCallback
+                0x0000000008000abc        0xc build/usbd_conf.o
+                0x0000000008000abc                HAL_PCD_ResumeCallback
  .text.USBD_LL_Init
-                0x0000000008000ac4       0x84 build/usbd_conf.o
-                0x0000000008000ac4                USBD_LL_Init
+                0x0000000008000ac8       0x84 build/usbd_conf.o
+                0x0000000008000ac8                USBD_LL_Init
  .text.USBD_LL_Start
-                0x0000000008000b48       0x10 build/usbd_conf.o
-                0x0000000008000b48                USBD_LL_Start
+                0x0000000008000b4c       0x10 build/usbd_conf.o
+                0x0000000008000b4c                USBD_LL_Start
  .text.USBD_LL_OpenEP
-                0x0000000008000b58       0x16 build/usbd_conf.o
-                0x0000000008000b58                USBD_LL_OpenEP
+                0x0000000008000b5c       0x16 build/usbd_conf.o
+                0x0000000008000b5c                USBD_LL_OpenEP
  .text.USBD_LL_CloseEP
-                0x0000000008000b6e       0x10 build/usbd_conf.o
-                0x0000000008000b6e                USBD_LL_CloseEP
+                0x0000000008000b72       0x10 build/usbd_conf.o
+                0x0000000008000b72                USBD_LL_CloseEP
  .text.USBD_LL_StallEP
-                0x0000000008000b7e       0x10 build/usbd_conf.o
-                0x0000000008000b7e                USBD_LL_StallEP
+                0x0000000008000b82       0x10 build/usbd_conf.o
+                0x0000000008000b82                USBD_LL_StallEP
  .text.USBD_LL_ClearStallEP
-                0x0000000008000b8e       0x10 build/usbd_conf.o
-                0x0000000008000b8e                USBD_LL_ClearStallEP
+                0x0000000008000b92       0x10 build/usbd_conf.o
+                0x0000000008000b92                USBD_LL_ClearStallEP
  .text.USBD_LL_IsStallEP
-                0x0000000008000b9e       0x2e build/usbd_conf.o
-                0x0000000008000b9e                USBD_LL_IsStallEP
+                0x0000000008000ba2       0x2e build/usbd_conf.o
+                0x0000000008000ba2                USBD_LL_IsStallEP
  .text.USBD_LL_SetUSBAddress
-                0x0000000008000bcc       0x10 build/usbd_conf.o
-                0x0000000008000bcc                USBD_LL_SetUSBAddress
+                0x0000000008000bd0       0x10 build/usbd_conf.o
+                0x0000000008000bd0                USBD_LL_SetUSBAddress
  .text.USBD_LL_Transmit
-                0x0000000008000bdc       0x10 build/usbd_conf.o
-                0x0000000008000bdc                USBD_LL_Transmit
+                0x0000000008000be0       0x10 build/usbd_conf.o
+                0x0000000008000be0                USBD_LL_Transmit
  .text.USBD_LL_PrepareReceive
-                0x0000000008000bec       0x10 build/usbd_conf.o
-                0x0000000008000bec                USBD_LL_PrepareReceive
+                0x0000000008000bf0       0x10 build/usbd_conf.o
+                0x0000000008000bf0                USBD_LL_PrepareReceive
  .text.USBD_LL_GetRxDataSize
-                0x0000000008000bfc        0xc build/usbd_conf.o
-                0x0000000008000bfc                USBD_LL_GetRxDataSize
+                0x0000000008000c00        0xc build/usbd_conf.o
+                0x0000000008000c00                USBD_LL_GetRxDataSize
  .text.USBD_static_malloc
-                0x0000000008000c08        0x8 build/usbd_conf.o
-                0x0000000008000c08                USBD_static_malloc
+                0x0000000008000c0c        0x8 build/usbd_conf.o
+                0x0000000008000c0c                USBD_static_malloc
  .text.USBD_static_free
-                0x0000000008000c10        0x2 build/usbd_conf.o
-                0x0000000008000c10                USBD_static_free
+                0x0000000008000c14        0x2 build/usbd_conf.o
+                0x0000000008000c14                USBD_static_free
  .text.HAL_PCDEx_SetConnectionState
-                0x0000000008000c12        0x2 build/usbd_conf.o
-                0x0000000008000c12                HAL_PCDEx_SetConnectionState
+                0x0000000008000c16        0x2 build/usbd_conf.o
+                0x0000000008000c16                HAL_PCDEx_SetConnectionState
  .text.LL_GPIO_Init
-                0x0000000008000c14      0x116 build/stm32f1xx_ll_gpio.o
-                0x0000000008000c14                LL_GPIO_Init
+                0x0000000008000c18      0x116 build/stm32f1xx_ll_gpio.o
+                0x0000000008000c18                LL_GPIO_Init
  .text.HAL_PCD_EP_DB_Receive
-                0x0000000008000d2a      0x11c build/stm32f1xx_hal_pcd.o
+                0x0000000008000d2e      0x11c build/stm32f1xx_hal_pcd.o
  .text.HAL_PCD_Init
-                0x0000000008000e46      0x110 build/stm32f1xx_hal_pcd.o
-                0x0000000008000e46                HAL_PCD_Init
+                0x0000000008000e4a      0x110 build/stm32f1xx_hal_pcd.o
+                0x0000000008000e4a                HAL_PCD_Init
  .text.HAL_PCD_Start
-                0x0000000008000f56       0x32 build/stm32f1xx_hal_pcd.o
-                0x0000000008000f56                HAL_PCD_Start
+                0x0000000008000f5a       0x32 build/stm32f1xx_hal_pcd.o
+                0x0000000008000f5a                HAL_PCD_Start
  .text.HAL_PCD_EP_DB_Transmit
-                0x0000000008000f88      0x424 build/stm32f1xx_hal_pcd.o
+                0x0000000008000f8c      0x424 build/stm32f1xx_hal_pcd.o
  .text.PCD_EP_ISR_Handler
-                0x00000000080013ac      0x536 build/stm32f1xx_hal_pcd.o
+                0x00000000080013b0      0x536 build/stm32f1xx_hal_pcd.o
  .text.HAL_PCD_SetAddress
-                0x00000000080018e2       0x28 build/stm32f1xx_hal_pcd.o
-                0x00000000080018e2                HAL_PCD_SetAddress
+                0x00000000080018e6       0x28 build/stm32f1xx_hal_pcd.o
+                0x00000000080018e6                HAL_PCD_SetAddress
  .text.HAL_PCD_IRQHandler
-                0x000000000800190a      0x1b0 build/stm32f1xx_hal_pcd.o
-                0x000000000800190a                HAL_PCD_IRQHandler
+                0x000000000800190e      0x1b0 build/stm32f1xx_hal_pcd.o
+                0x000000000800190e                HAL_PCD_IRQHandler
  .text.HAL_PCD_EP_Open
-                0x0000000008001aba       0x7c build/stm32f1xx_hal_pcd.o
-                0x0000000008001aba                HAL_PCD_EP_Open
+                0x0000000008001abe       0x7c build/stm32f1xx_hal_pcd.o
+                0x0000000008001abe                HAL_PCD_EP_Open
  .text.HAL_PCD_EP_Close
-                0x0000000008001b36       0x64 build/stm32f1xx_hal_pcd.o
-                0x0000000008001b36                HAL_PCD_EP_Close
+                0x0000000008001b3a       0x64 build/stm32f1xx_hal_pcd.o
+                0x0000000008001b3a                HAL_PCD_EP_Close
  .text.HAL_PCD_EP_Receive
-                0x0000000008001b9a       0x3a build/stm32f1xx_hal_pcd.o
-                0x0000000008001b9a                HAL_PCD_EP_Receive
+                0x0000000008001b9e       0x3a build/stm32f1xx_hal_pcd.o
+                0x0000000008001b9e                HAL_PCD_EP_Receive
  .text.HAL_PCD_EP_GetRxCount
-                0x0000000008001bd4       0x12 build/stm32f1xx_hal_pcd.o
-                0x0000000008001bd4                HAL_PCD_EP_GetRxCount
+                0x0000000008001bd8       0x12 build/stm32f1xx_hal_pcd.o
+                0x0000000008001bd8                HAL_PCD_EP_GetRxCount
  .text.HAL_PCD_EP_Transmit
-                0x0000000008001be6       0x44 build/stm32f1xx_hal_pcd.o
-                0x0000000008001be6                HAL_PCD_EP_Transmit
+                0x0000000008001bea       0x44 build/stm32f1xx_hal_pcd.o
+                0x0000000008001bea                HAL_PCD_EP_Transmit
  .text.HAL_PCD_EP_SetStall
-                0x0000000008001c2a       0x78 build/stm32f1xx_hal_pcd.o
-                0x0000000008001c2a                HAL_PCD_EP_SetStall
+                0x0000000008001c2e       0x78 build/stm32f1xx_hal_pcd.o
+                0x0000000008001c2e                HAL_PCD_EP_SetStall
  .text.HAL_PCD_EP_ClrStall
-                0x0000000008001ca2       0x76 build/stm32f1xx_hal_pcd.o
-                0x0000000008001ca2                HAL_PCD_EP_ClrStall
+                0x0000000008001ca6       0x76 build/stm32f1xx_hal_pcd.o
+                0x0000000008001ca6                HAL_PCD_EP_ClrStall
  .text.HAL_PCDEx_PMAConfig
-                0x0000000008001d18       0x38 build/stm32f1xx_hal_pcd_ex.o
-                0x0000000008001d18                HAL_PCDEx_PMAConfig
+                0x0000000008001d1c       0x38 build/stm32f1xx_hal_pcd_ex.o
+                0x0000000008001d1c                HAL_PCDEx_PMAConfig
  .text.USB_CoreInit
-                0x0000000008001d50        0xe build/stm32f1xx_ll_usb.o
-                0x0000000008001d50                USB_CoreInit
+                0x0000000008001d54        0xe build/stm32f1xx_ll_usb.o
+                0x0000000008001d54                USB_CoreInit
  .text.USB_EnableGlobalInt
-                0x0000000008001d5e       0x12 build/stm32f1xx_ll_usb.o
-                0x0000000008001d5e                USB_EnableGlobalInt
+                0x0000000008001d62       0x12 build/stm32f1xx_ll_usb.o
+                0x0000000008001d62                USB_EnableGlobalInt
  .text.USB_DisableGlobalInt
-                0x0000000008001d70       0x14 build/stm32f1xx_ll_usb.o
-                0x0000000008001d70                USB_DisableGlobalInt
+                0x0000000008001d74       0x14 build/stm32f1xx_ll_usb.o
+                0x0000000008001d74                USB_DisableGlobalInt
  .text.USB_SetCurrentMode
-                0x0000000008001d84        0x4 build/stm32f1xx_ll_usb.o
-                0x0000000008001d84                USB_SetCurrentMode
+                0x0000000008001d88        0x4 build/stm32f1xx_ll_usb.o
+                0x0000000008001d88                USB_SetCurrentMode
  .text.USB_DevInit
-                0x0000000008001d88       0x22 build/stm32f1xx_ll_usb.o
-                0x0000000008001d88                USB_DevInit
+                0x0000000008001d8c       0x22 build/stm32f1xx_ll_usb.o
+                0x0000000008001d8c                USB_DevInit
  .text.USB_ActivateEndpoint
-                0x0000000008001daa      0x3ca build/stm32f1xx_ll_usb.o
-                0x0000000008001daa                USB_ActivateEndpoint
+                0x0000000008001dae      0x3ca build/stm32f1xx_ll_usb.o
+                0x0000000008001dae                USB_ActivateEndpoint
  .text.USB_DeactivateEndpoint
-                0x0000000008002174      0x1d6 build/stm32f1xx_ll_usb.o
-                0x0000000008002174                USB_DeactivateEndpoint
+                0x0000000008002178      0x1d6 build/stm32f1xx_ll_usb.o
+                0x0000000008002178                USB_DeactivateEndpoint
  .text.USB_EPSetStall
-                0x000000000800234a       0x4a build/stm32f1xx_ll_usb.o
-                0x000000000800234a                USB_EPSetStall
+                0x000000000800234e       0x4a build/stm32f1xx_ll_usb.o
+                0x000000000800234e                USB_EPSetStall
  .text.USB_EPClearStall
-                0x0000000008002394       0xa2 build/stm32f1xx_ll_usb.o
-                0x0000000008002394                USB_EPClearStall
+                0x0000000008002398       0xa2 build/stm32f1xx_ll_usb.o
+                0x0000000008002398                USB_EPClearStall
  .text.USB_SetDevAddress
-                0x0000000008002436        0xc build/stm32f1xx_ll_usb.o
-                0x0000000008002436                USB_SetDevAddress
+                0x000000000800243a        0xc build/stm32f1xx_ll_usb.o
+                0x000000000800243a                USB_SetDevAddress
  .text.USB_DevConnect
-                0x0000000008002442        0x4 build/stm32f1xx_ll_usb.o
-                0x0000000008002442                USB_DevConnect
- .text.USB_DevDisconnect
                 0x0000000008002446        0x4 build/stm32f1xx_ll_usb.o
-                0x0000000008002446                USB_DevDisconnect
+                0x0000000008002446                USB_DevConnect
+ .text.USB_DevDisconnect
+                0x000000000800244a        0x4 build/stm32f1xx_ll_usb.o
+                0x000000000800244a                USB_DevDisconnect
  .text.USB_ReadInterrupts
-                0x000000000800244a        0x8 build/stm32f1xx_ll_usb.o
-                0x000000000800244a                USB_ReadInterrupts
+                0x000000000800244e        0x8 build/stm32f1xx_ll_usb.o
+                0x000000000800244e                USB_ReadInterrupts
  .text.USB_EP0_OutStart
-                0x0000000008002452        0x4 build/stm32f1xx_ll_usb.o
-                0x0000000008002452                USB_EP0_OutStart
+                0x0000000008002456        0x4 build/stm32f1xx_ll_usb.o
+                0x0000000008002456                USB_EP0_OutStart
  .text.USB_WritePMA
-                0x0000000008002456       0x28 build/stm32f1xx_ll_usb.o
-                0x0000000008002456                USB_WritePMA
+                0x000000000800245a       0x28 build/stm32f1xx_ll_usb.o
+                0x000000000800245a                USB_WritePMA
  .text.USB_EPStartXfer
-                0x000000000800247e      0x7ce build/stm32f1xx_ll_usb.o
-                0x000000000800247e                USB_EPStartXfer
+                0x0000000008002482      0x7ce build/stm32f1xx_ll_usb.o
+                0x0000000008002482                USB_EPStartXfer
  .text.USB_ReadPMA
-                0x0000000008002c4c       0x30 build/stm32f1xx_ll_usb.o
-                0x0000000008002c4c                USB_ReadPMA
+                0x0000000008002c50       0x30 build/stm32f1xx_ll_usb.o
+                0x0000000008002c50                USB_ReadPMA
  .text.LL_mDelay
-                0x0000000008002c7c       0x2a build/stm32f1xx_ll_utils.o
-                0x0000000008002c7c                LL_mDelay
- *fill*         0x0000000008002ca6        0x2 
+                0x0000000008002c80       0x2a build/stm32f1xx_ll_utils.o
+                0x0000000008002c80                LL_mDelay
+ *fill*         0x0000000008002caa        0x2 
  .text.LL_SetSystemCoreClock
-                0x0000000008002ca8        0xc build/stm32f1xx_ll_utils.o
-                0x0000000008002ca8                LL_SetSystemCoreClock
+                0x0000000008002cac        0xc build/stm32f1xx_ll_utils.o
+                0x0000000008002cac                LL_SetSystemCoreClock
  .text.HAL_InitTick
-                0x0000000008002cb4       0x4c build/stm32f1xx_hal.o
-                0x0000000008002cb4                HAL_InitTick
+                0x0000000008002cb8       0x4c build/stm32f1xx_hal.o
+                0x0000000008002cb8                HAL_InitTick
  .text.HAL_Init
-                0x0000000008002d00       0x24 build/stm32f1xx_hal.o
-                0x0000000008002d00                HAL_Init
+                0x0000000008002d04       0x24 build/stm32f1xx_hal.o
+                0x0000000008002d04                HAL_Init
  .text.HAL_IncTick
-                0x0000000008002d24       0x18 build/stm32f1xx_hal.o
-                0x0000000008002d24                HAL_IncTick
+                0x0000000008002d28       0x18 build/stm32f1xx_hal.o
+                0x0000000008002d28                HAL_IncTick
  .text.HAL_NVIC_SetPriorityGrouping
-                0x0000000008002d3c       0x24 build/stm32f1xx_hal_cortex.o
-                0x0000000008002d3c                HAL_NVIC_SetPriorityGrouping
+                0x0000000008002d40       0x24 build/stm32f1xx_hal_cortex.o
+                0x0000000008002d40                HAL_NVIC_SetPriorityGrouping
  .text.HAL_NVIC_SetPriority
-                0x0000000008002d60       0x70 build/stm32f1xx_hal_cortex.o
-                0x0000000008002d60                HAL_NVIC_SetPriority
+                0x0000000008002d64       0x70 build/stm32f1xx_hal_cortex.o
+                0x0000000008002d64                HAL_NVIC_SetPriority
  .text.HAL_NVIC_EnableIRQ
-                0x0000000008002dd0       0x1c build/stm32f1xx_hal_cortex.o
-                0x0000000008002dd0                HAL_NVIC_EnableIRQ
+                0x0000000008002dd4       0x1c build/stm32f1xx_hal_cortex.o
+                0x0000000008002dd4                HAL_NVIC_EnableIRQ
  .text.HAL_SYSTICK_Config
-                0x0000000008002dec       0x28 build/stm32f1xx_hal_cortex.o
-                0x0000000008002dec                HAL_SYSTICK_Config
+                0x0000000008002df0       0x28 build/stm32f1xx_hal_cortex.o
+                0x0000000008002df0                HAL_SYSTICK_Config
  .text.LL_ADC_CommonInit
-                0x0000000008002e14       0x38 build/stm32f1xx_ll_adc.o
-                0x0000000008002e14                LL_ADC_CommonInit
+                0x0000000008002e18       0x38 build/stm32f1xx_ll_adc.o
+                0x0000000008002e18                LL_ADC_CommonInit
  .text.LL_ADC_Init
-                0x0000000008002e4c       0x28 build/stm32f1xx_ll_adc.o
-                0x0000000008002e4c                LL_ADC_Init
+                0x0000000008002e50       0x28 build/stm32f1xx_ll_adc.o
+                0x0000000008002e50                LL_ADC_Init
  .text.LL_ADC_REG_Init
-                0x0000000008002e74       0x56 build/stm32f1xx_ll_adc.o
-                0x0000000008002e74                LL_ADC_REG_Init
+                0x0000000008002e78       0x56 build/stm32f1xx_ll_adc.o
+                0x0000000008002e78                LL_ADC_REG_Init
  .text.LL_ADC_INJ_Init
-                0x0000000008002eca       0x4e build/stm32f1xx_ll_adc.o
-                0x0000000008002eca                LL_ADC_INJ_Init
+                0x0000000008002ece       0x4e build/stm32f1xx_ll_adc.o
+                0x0000000008002ece                LL_ADC_INJ_Init
  .text.SystemInit
-                0x0000000008002f18        0x2 build/system_stm32f1xx.o
-                0x0000000008002f18                SystemInit
+                0x0000000008002f1c        0x2 build/system_stm32f1xx.o
+                0x0000000008002f1c                SystemInit
  .text.USBD_Init
-                0x0000000008002f1a       0x2e build/usbd_core.o
-                0x0000000008002f1a                USBD_Init
+                0x0000000008002f1e       0x2e build/usbd_core.o
+                0x0000000008002f1e                USBD_Init
  .text.USBD_RegisterClass
-                0x0000000008002f48        0xe build/usbd_core.o
-                0x0000000008002f48                USBD_RegisterClass
+                0x0000000008002f4c        0xe build/usbd_core.o
+                0x0000000008002f4c                USBD_RegisterClass
  .text.USBD_Start
-                0x0000000008002f56        0xa build/usbd_core.o
-                0x0000000008002f56                USBD_Start
+                0x0000000008002f5a        0xa build/usbd_core.o
+                0x0000000008002f5a                USBD_Start
  .text.USBD_SetClassConfig
-                0x0000000008002f60       0x18 build/usbd_core.o
-                0x0000000008002f60                USBD_SetClassConfig
+                0x0000000008002f64       0x18 build/usbd_core.o
+                0x0000000008002f64                USBD_SetClassConfig
  .text.USBD_ClrClassConfig
-                0x0000000008002f78        0xe build/usbd_core.o
-                0x0000000008002f78                USBD_ClrClassConfig
+                0x0000000008002f7c        0xe build/usbd_core.o
+                0x0000000008002f7c                USBD_ClrClassConfig
  .text.USBD_LL_SetupStage
-                0x0000000008002f86       0x5a build/usbd_core.o
-                0x0000000008002f86                USBD_LL_SetupStage
+                0x0000000008002f8a       0x5a build/usbd_core.o
+                0x0000000008002f8a                USBD_LL_SetupStage
  .text.USBD_LL_DataOutStage
-                0x0000000008002fe0       0x8c build/usbd_core.o
-                0x0000000008002fe0                USBD_LL_DataOutStage
+                0x0000000008002fe4       0x8c build/usbd_core.o
+                0x0000000008002fe4                USBD_LL_DataOutStage
  .text.USBD_LL_DataInStage
-                0x000000000800306c       0xd0 build/usbd_core.o
-                0x000000000800306c                USBD_LL_DataInStage
+                0x0000000008003070       0xd0 build/usbd_core.o
+                0x0000000008003070                USBD_LL_DataInStage
  .text.USBD_LL_Reset
-                0x000000000800313c       0x50 build/usbd_core.o
-                0x000000000800313c                USBD_LL_Reset
+                0x0000000008003140       0x50 build/usbd_core.o
+                0x0000000008003140                USBD_LL_Reset
  .text.USBD_LL_SetSpeed
-                0x000000000800318c        0x6 build/usbd_core.o
-                0x000000000800318c                USBD_LL_SetSpeed
+                0x0000000008003190        0x6 build/usbd_core.o
+                0x0000000008003190                USBD_LL_SetSpeed
  .text.USBD_LL_Suspend
-                0x0000000008003192       0x12 build/usbd_core.o
-                0x0000000008003192                USBD_LL_Suspend
+                0x0000000008003196       0x12 build/usbd_core.o
+                0x0000000008003196                USBD_LL_Suspend
  .text.USBD_LL_Resume
-                0x00000000080031a4       0x16 build/usbd_core.o
-                0x00000000080031a4                USBD_LL_Resume
+                0x00000000080031a8       0x16 build/usbd_core.o
+                0x00000000080031a8                USBD_LL_Resume
  .text.USBD_LL_SOF
-                0x00000000080031ba       0x1c build/usbd_core.o
-                0x00000000080031ba                USBD_LL_SOF
+                0x00000000080031be       0x1c build/usbd_core.o
+                0x00000000080031be                USBD_LL_SOF
  .text.USBD_GetLen
-                0x00000000080031d6       0x14 build/usbd_ctlreq.o
+                0x00000000080031da       0x14 build/usbd_ctlreq.o
  .text.USBD_SetFeature
-                0x00000000080031ea       0x14 build/usbd_ctlreq.o
+                0x00000000080031ee       0x14 build/usbd_ctlreq.o
  .text.USBD_ParseSetupRequest
-                0x00000000080031fe       0x28 build/usbd_ctlreq.o
-                0x00000000080031fe                USBD_ParseSetupRequest
+                0x0000000008003202       0x28 build/usbd_ctlreq.o
+                0x0000000008003202                USBD_ParseSetupRequest
  .text.USBD_CtlError
-                0x0000000008003226       0x14 build/usbd_ctlreq.o
-                0x0000000008003226                USBD_CtlError
+                0x000000000800322a       0x14 build/usbd_ctlreq.o
+                0x000000000800322a                USBD_CtlError
  .text.USBD_GetDescriptor
-                0x000000000800323a      0x186 build/usbd_ctlreq.o
+                0x000000000800323e      0x186 build/usbd_ctlreq.o
  .text.USBD_SetAddress
-                0x00000000080033c0       0x4e build/usbd_ctlreq.o
- *fill*         0x000000000800340e        0x2 
+                0x00000000080033c4       0x4e build/usbd_ctlreq.o
+ *fill*         0x0000000008003412        0x2 
  .text.USBD_SetConfig
-                0x0000000008003410       0xb0 build/usbd_ctlreq.o
+                0x0000000008003414       0xb0 build/usbd_ctlreq.o
  .text.USBD_GetConfig
-                0x00000000080034c0       0x3e build/usbd_ctlreq.o
+                0x00000000080034c4       0x3e build/usbd_ctlreq.o
  .text.USBD_GetStatus
-                0x00000000080034fe       0x38 build/usbd_ctlreq.o
+                0x0000000008003502       0x38 build/usbd_ctlreq.o
  .text.USBD_ClrFeature
-                0x0000000008003536       0x26 build/usbd_ctlreq.o
+                0x000000000800353a       0x26 build/usbd_ctlreq.o
  .text.USBD_StdDevReq
-                0x000000000800355c       0x68 build/usbd_ctlreq.o
-                0x000000000800355c                USBD_StdDevReq
+                0x0000000008003560       0x68 build/usbd_ctlreq.o
+                0x0000000008003560                USBD_StdDevReq
  .text.USBD_StdItfReq
-                0x00000000080035c4       0x60 build/usbd_ctlreq.o
-                0x00000000080035c4                USBD_StdItfReq
+                0x00000000080035c8       0x60 build/usbd_ctlreq.o
+                0x00000000080035c8                USBD_StdItfReq
  .text.USBD_StdEPReq
-                0x0000000008003624      0x1e2 build/usbd_ctlreq.o
-                0x0000000008003624                USBD_StdEPReq
+                0x0000000008003628      0x1e2 build/usbd_ctlreq.o
+                0x0000000008003628                USBD_StdEPReq
  .text.USBD_GetString
-                0x0000000008003806       0x3a build/usbd_ctlreq.o
-                0x0000000008003806                USBD_GetString
+                0x000000000800380a       0x3a build/usbd_ctlreq.o
+                0x000000000800380a                USBD_GetString
  .text.USBD_CtlSendData
-                0x0000000008003840       0x1a build/usbd_ioreq.o
-                0x0000000008003840                USBD_CtlSendData
+                0x0000000008003844       0x1a build/usbd_ioreq.o
+                0x0000000008003844                USBD_CtlSendData
  .text.USBD_CtlContinueSendData
-                0x000000000800385a       0x10 build/usbd_ioreq.o
-                0x000000000800385a                USBD_CtlContinueSendData
+                0x000000000800385e       0x10 build/usbd_ioreq.o
+                0x000000000800385e                USBD_CtlContinueSendData
  .text.USBD_CtlPrepareRx
-                0x000000000800386a       0x1e build/usbd_ioreq.o
-                0x000000000800386a                USBD_CtlPrepareRx
+                0x000000000800386e       0x1e build/usbd_ioreq.o
+                0x000000000800386e                USBD_CtlPrepareRx
  .text.USBD_CtlContinueRx
-                0x0000000008003888       0x10 build/usbd_ioreq.o
-                0x0000000008003888                USBD_CtlContinueRx
+                0x000000000800388c       0x10 build/usbd_ioreq.o
+                0x000000000800388c                USBD_CtlContinueRx
  .text.USBD_CtlSendStatus
-                0x0000000008003898       0x16 build/usbd_ioreq.o
-                0x0000000008003898                USBD_CtlSendStatus
+                0x000000000800389c       0x16 build/usbd_ioreq.o
+                0x000000000800389c                USBD_CtlSendStatus
  .text.USBD_CtlReceiveStatus
-                0x00000000080038ae       0x16 build/usbd_ioreq.o
-                0x00000000080038ae                USBD_CtlReceiveStatus
+                0x00000000080038b2       0x16 build/usbd_ioreq.o
+                0x00000000080038b2                USBD_CtlReceiveStatus
  .text.USBD_CDC_EP0_RxReady
-                0x00000000080038c4       0x28 build/usbd_cdc.o
+                0x00000000080038c8       0x28 build/usbd_cdc.o
  .text.USBD_CDC_GetFSCfgDesc
-                0x00000000080038ec        0xc build/usbd_cdc.o
+                0x00000000080038f0        0xc build/usbd_cdc.o
  .text.USBD_CDC_GetHSCfgDesc
-                0x00000000080038f8        0xc build/usbd_cdc.o
+                0x00000000080038fc        0xc build/usbd_cdc.o
  .text.USBD_CDC_GetOtherSpeedCfgDesc
-                0x0000000008003904        0xc build/usbd_cdc.o
+                0x0000000008003908        0xc build/usbd_cdc.o
  .text.USBD_CDC_GetDeviceQualifierDescriptor
-                0x0000000008003910        0xc build/usbd_cdc.o
-                0x0000000008003910                USBD_CDC_GetDeviceQualifierDescriptor
+                0x0000000008003914        0xc build/usbd_cdc.o
+                0x0000000008003914                USBD_CDC_GetDeviceQualifierDescriptor
  .text.USBD_CDC_DataOut
-                0x000000000800391c       0x2e build/usbd_cdc.o
+                0x0000000008003920       0x2e build/usbd_cdc.o
  .text.USBD_CDC_DataIn
-                0x000000000800394a       0x4e build/usbd_cdc.o
+                0x000000000800394e       0x4e build/usbd_cdc.o
  .text.USBD_CDC_Setup
-                0x0000000008003998       0xd6 build/usbd_cdc.o
+                0x000000000800399c       0xd6 build/usbd_cdc.o
  .text.USBD_CDC_DeInit
-                0x0000000008003a6e       0x42 build/usbd_cdc.o
+                0x0000000008003a72       0x42 build/usbd_cdc.o
  .text.USBD_CDC_Init
-                0x0000000008003ab0       0xaa build/usbd_cdc.o
+                0x0000000008003ab4       0xaa build/usbd_cdc.o
  .text.USBD_CDC_RegisterInterface
-                0x0000000008003b5a        0xe build/usbd_cdc.o
-                0x0000000008003b5a                USBD_CDC_RegisterInterface
+                0x0000000008003b5e        0xe build/usbd_cdc.o
+                0x0000000008003b5e                USBD_CDC_RegisterInterface
  .text.USBD_CDC_SetTxBuffer
-                0x0000000008003b68       0x10 build/usbd_cdc.o
-                0x0000000008003b68                USBD_CDC_SetTxBuffer
+                0x0000000008003b6c       0x10 build/usbd_cdc.o
+                0x0000000008003b6c                USBD_CDC_SetTxBuffer
  .text.USBD_CDC_SetRxBuffer
-                0x0000000008003b78        0xc build/usbd_cdc.o
-                0x0000000008003b78                USBD_CDC_SetRxBuffer
+                0x0000000008003b7c        0xc build/usbd_cdc.o
+                0x0000000008003b7c                USBD_CDC_SetRxBuffer
  .text.USBD_CDC_ReceivePacket
-                0x0000000008003b84       0x30 build/usbd_cdc.o
-                0x0000000008003b84                USBD_CDC_ReceivePacket
+                0x0000000008003b88       0x30 build/usbd_cdc.o
+                0x0000000008003b88                USBD_CDC_ReceivePacket
  .text.OC1Config
-                0x0000000008003bb4       0x6c build/stm32f1xx_ll_tim.o
+                0x0000000008003bb8       0x6c build/stm32f1xx_ll_tim.o
  .text.OC2Config
-                0x0000000008003c20       0x74 build/stm32f1xx_ll_tim.o
+                0x0000000008003c24       0x74 build/stm32f1xx_ll_tim.o
  .text.OC3Config
-                0x0000000008003c94       0x70 build/stm32f1xx_ll_tim.o
+                0x0000000008003c98       0x70 build/stm32f1xx_ll_tim.o
  .text.OC4Config
-                0x0000000008003d04       0x54 build/stm32f1xx_ll_tim.o
+                0x0000000008003d08       0x54 build/stm32f1xx_ll_tim.o
  .text.LL_TIM_Init
-                0x0000000008003d58       0x70 build/stm32f1xx_ll_tim.o
-                0x0000000008003d58                LL_TIM_Init
+                0x0000000008003d5c       0x70 build/stm32f1xx_ll_tim.o
+                0x0000000008003d5c                LL_TIM_Init
  .text.LL_TIM_OC_Init
-                0x0000000008003dc8       0x3c build/stm32f1xx_ll_tim.o
-                0x0000000008003dc8                LL_TIM_OC_Init
+                0x0000000008003dcc       0x3c build/stm32f1xx_ll_tim.o
+                0x0000000008003dcc                LL_TIM_OC_Init
  .text.LL_TIM_BDTR_Init
-                0x0000000008003e04       0x34 build/stm32f1xx_ll_tim.o
-                0x0000000008003e04                LL_TIM_BDTR_Init
+                0x0000000008003e08       0x34 build/stm32f1xx_ll_tim.o
+                0x0000000008003e08                LL_TIM_BDTR_Init
  .text.Reset_Handler
-                0x0000000008003e38       0x48 build/startup_stm32f103xb.o
-                0x0000000008003e38                Reset_Handler
+                0x0000000008003e3c       0x48 build/startup_stm32f103xb.o
+                0x0000000008003e3c                Reset_Handler
  .text.Default_Handler
-                0x0000000008003e80        0x2 build/startup_stm32f103xb.o
-                0x0000000008003e80                RTC_Alarm_IRQHandler
-                0x0000000008003e80                EXTI2_IRQHandler
-                0x0000000008003e80                TIM1_CC_IRQHandler
-                0x0000000008003e80                PVD_IRQHandler
-                0x0000000008003e80                EXTI3_IRQHandler
-                0x0000000008003e80                EXTI0_IRQHandler
-                0x0000000008003e80                I2C2_EV_IRQHandler
-                0x0000000008003e80                ADC1_2_IRQHandler
-                0x0000000008003e80                SPI1_IRQHandler
-                0x0000000008003e80                TAMPER_IRQHandler
-                0x0000000008003e80                DMA1_Channel4_IRQHandler
-                0x0000000008003e80                USART3_IRQHandler
-                0x0000000008003e80                RTC_IRQHandler
-                0x0000000008003e80                DMA1_Channel7_IRQHandler
-                0x0000000008003e80                CAN1_RX1_IRQHandler
-                0x0000000008003e80                TIM4_IRQHandler
-                0x0000000008003e80                I2C1_EV_IRQHandler
-                0x0000000008003e80                DMA1_Channel6_IRQHandler
-                0x0000000008003e80                TIM3_IRQHandler
-                0x0000000008003e80                RCC_IRQHandler
-                0x0000000008003e80                TIM1_TRG_COM_IRQHandler
-                0x0000000008003e80                DMA1_Channel1_IRQHandler
-                0x0000000008003e80                Default_Handler
-                0x0000000008003e80                EXTI15_10_IRQHandler
-                0x0000000008003e80                EXTI9_5_IRQHandler
-                0x0000000008003e80                SPI2_IRQHandler
-                0x0000000008003e80                EXTI4_IRQHandler
-                0x0000000008003e80                USB_HP_CAN1_TX_IRQHandler
-                0x0000000008003e80                DMA1_Channel3_IRQHandler
-                0x0000000008003e80                TIM1_UP_IRQHandler
-                0x0000000008003e80                WWDG_IRQHandler
-                0x0000000008003e80                TIM2_IRQHandler
-                0x0000000008003e80                TIM1_BRK_IRQHandler
-                0x0000000008003e80                EXTI1_IRQHandler
-                0x0000000008003e80                USART2_IRQHandler
-                0x0000000008003e80                I2C2_ER_IRQHandler
-                0x0000000008003e80                DMA1_Channel2_IRQHandler
-                0x0000000008003e80                CAN1_SCE_IRQHandler
-                0x0000000008003e80                FLASH_IRQHandler
-                0x0000000008003e80                USART1_IRQHandler
-                0x0000000008003e80                I2C1_ER_IRQHandler
-                0x0000000008003e80                USBWakeUp_IRQHandler
- *fill*         0x0000000008003e82        0x2 
+                0x0000000008003e84        0x2 build/startup_stm32f103xb.o
+                0x0000000008003e84                RTC_Alarm_IRQHandler
+                0x0000000008003e84                EXTI2_IRQHandler
+                0x0000000008003e84                TIM1_CC_IRQHandler
+                0x0000000008003e84                PVD_IRQHandler
+                0x0000000008003e84                EXTI3_IRQHandler
+                0x0000000008003e84                EXTI0_IRQHandler
+                0x0000000008003e84                I2C2_EV_IRQHandler
+                0x0000000008003e84                ADC1_2_IRQHandler
+                0x0000000008003e84                SPI1_IRQHandler
+                0x0000000008003e84                TAMPER_IRQHandler
+                0x0000000008003e84                DMA1_Channel4_IRQHandler
+                0x0000000008003e84                USART3_IRQHandler
+                0x0000000008003e84                RTC_IRQHandler
+                0x0000000008003e84                DMA1_Channel7_IRQHandler
+                0x0000000008003e84                CAN1_RX1_IRQHandler
+                0x0000000008003e84                TIM4_IRQHandler
+                0x0000000008003e84                I2C1_EV_IRQHandler
+                0x0000000008003e84                DMA1_Channel6_IRQHandler
+                0x0000000008003e84                TIM3_IRQHandler
+                0x0000000008003e84                RCC_IRQHandler
+                0x0000000008003e84                TIM1_TRG_COM_IRQHandler
+                0x0000000008003e84                DMA1_Channel1_IRQHandler
+                0x0000000008003e84                Default_Handler
+                0x0000000008003e84                EXTI15_10_IRQHandler
+                0x0000000008003e84                EXTI9_5_IRQHandler
+                0x0000000008003e84                SPI2_IRQHandler
+                0x0000000008003e84                EXTI4_IRQHandler
+                0x0000000008003e84                USB_HP_CAN1_TX_IRQHandler
+                0x0000000008003e84                DMA1_Channel3_IRQHandler
+                0x0000000008003e84                TIM1_UP_IRQHandler
+                0x0000000008003e84                WWDG_IRQHandler
+                0x0000000008003e84                TIM2_IRQHandler
+                0x0000000008003e84                TIM1_BRK_IRQHandler
+                0x0000000008003e84                EXTI1_IRQHandler
+                0x0000000008003e84                USART2_IRQHandler
+                0x0000000008003e84                I2C2_ER_IRQHandler
+                0x0000000008003e84                DMA1_Channel2_IRQHandler
+                0x0000000008003e84                CAN1_SCE_IRQHandler
+                0x0000000008003e84                FLASH_IRQHandler
+                0x0000000008003e84                USART1_IRQHandler
+                0x0000000008003e84                I2C1_ER_IRQHandler
+                0x0000000008003e84                USBWakeUp_IRQHandler
+ *fill*         0x0000000008003e86        0x2 
  .text.__libc_init_array
-                0x0000000008003e84       0x48 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(lib_a-init.o)
-                0x0000000008003e84                __libc_init_array
- .text.memset   0x0000000008003ecc       0x10 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(lib_a-memset.o)
-                0x0000000008003ecc                memset
+                0x0000000008003e88       0x48 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(lib_a-init.o)
+                0x0000000008003e88                __libc_init_array
+ .text.memset   0x0000000008003ed0       0x10 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/lib/thumb/v7-m/nofp/libc_nano.a(lib_a-memset.o)
+                0x0000000008003ed0                memset
  *(.glue_7)
- .glue_7        0x0000000008003edc        0x0 linker stubs
+ .glue_7        0x0000000008003ee0        0x0 linker stubs
  *(.glue_7t)
- .glue_7t       0x0000000008003edc        0x0 linker stubs
+ .glue_7t       0x0000000008003ee0        0x0 linker stubs
  *(.eh_frame)
- .eh_frame      0x0000000008003edc        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
+ .eh_frame      0x0000000008003ee0        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
  *(.init)
- .init          0x0000000008003edc        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crti.o
-                0x0000000008003edc                _init
- .init          0x0000000008003ee0        0x8 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
+ .init          0x0000000008003ee0        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crti.o
+                0x0000000008003ee0                _init
+ .init          0x0000000008003ee4        0x8 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
  *(.fini)
- .fini          0x0000000008003ee8        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crti.o
-                0x0000000008003ee8                _fini
- .fini          0x0000000008003eec        0x8 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
-                0x0000000008003ef4                . = ALIGN (0x4)
-                0x0000000008003ef4                _etext = .
+ .fini          0x0000000008003eec        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crti.o
+                0x0000000008003eec                _fini
+ .fini          0x0000000008003ef0        0x8 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
+                0x0000000008003ef8                . = ALIGN (0x4)
+                0x0000000008003ef8                _etext = .
 
-.vfp11_veneer   0x0000000008003ef4        0x0
- .vfp11_veneer  0x0000000008003ef4        0x0 linker stubs
+.vfp11_veneer   0x0000000008003ef8        0x0
+ .vfp11_veneer  0x0000000008003ef8        0x0 linker stubs
 
-.v4_bx          0x0000000008003ef4        0x0
- .v4_bx         0x0000000008003ef4        0x0 linker stubs
+.v4_bx          0x0000000008003ef8        0x0
+ .v4_bx         0x0000000008003ef8        0x0 linker stubs
 
-.iplt           0x0000000008003ef4        0x0
- .iplt          0x0000000008003ef4        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
+.iplt           0x0000000008003ef8        0x0
+ .iplt          0x0000000008003ef8        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
 
-.rodata         0x0000000008003ef4       0x48
-                0x0000000008003ef4                . = ALIGN (0x4)
+.rodata         0x0000000008003ef8       0x48
+                0x0000000008003ef8                . = ALIGN (0x4)
  *(.rodata)
  *(.rodata*)
  .rodata.USBD_FS_ProductStrDescriptor.str1.4
-                0x0000000008003ef4       0x16 build/usbd_desc.o
- *fill*         0x0000000008003f0a        0x2 
+                0x0000000008003ef8       0x16 build/usbd_desc.o
+ *fill*         0x0000000008003f0e        0x2 
  .rodata.USBD_FS_ManufacturerStrDescriptor.str1.4
-                0x0000000008003f0c       0x13 build/usbd_desc.o
- *fill*         0x0000000008003f1f        0x1 
+                0x0000000008003f10       0x13 build/usbd_desc.o
+ *fill*         0x0000000008003f23        0x1 
  .rodata.USBD_FS_ConfigStrDescriptor.str1.4
-                0x0000000008003f20        0xb build/usbd_desc.o
- *fill*         0x0000000008003f2b        0x1 
+                0x0000000008003f24        0xb build/usbd_desc.o
+ *fill*         0x0000000008003f2f        0x1 
  .rodata.USBD_FS_InterfaceStrDescriptor.str1.4
-                0x0000000008003f2c        0xe build/usbd_desc.o
-                0x0000000008003f3c                . = ALIGN (0x4)
- *fill*         0x0000000008003f3a        0x2 
+                0x0000000008003f30        0xe build/usbd_desc.o
+                0x0000000008003f40                . = ALIGN (0x4)
+ *fill*         0x0000000008003f3e        0x2 
 
-.rel.dyn        0x0000000008003f3c        0x0
- .rel.iplt      0x0000000008003f3c        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
+.rel.dyn        0x0000000008003f40        0x0
+ .rel.iplt      0x0000000008003f40        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
 
 .ARM.extab
  *(.ARM.extab* .gnu.linkonce.armextab.*)
 
-.ARM            0x0000000008003f3c        0x0
-                0x0000000008003f3c                __exidx_start = .
+.ARM            0x0000000008003f40        0x0
+                0x0000000008003f40                __exidx_start = .
  *(.ARM.exidx*)
-                0x0000000008003f3c                __exidx_end = .
+                0x0000000008003f40                __exidx_end = .
 
-.preinit_array  0x0000000008003f3c        0x0
-                0x0000000008003f3c                PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0000000008003f40        0x0
+                0x0000000008003f40                PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x0000000008003f3c                PROVIDE (__preinit_array_end = .)
+                0x0000000008003f40                PROVIDE (__preinit_array_end = .)
 
-.init_array     0x0000000008003f3c        0x4
-                0x0000000008003f3c                PROVIDE (__init_array_start = .)
+.init_array     0x0000000008003f40        0x4
+                0x0000000008003f40                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x0000000008003f3c        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
-                0x0000000008003f40                PROVIDE (__init_array_end = .)
+ .init_array    0x0000000008003f40        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
+                0x0000000008003f44                PROVIDE (__init_array_end = .)
 
-.fini_array     0x0000000008003f40        0x4
+.fini_array     0x0000000008003f44        0x4
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0000000008003f40        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
+ .fini_array    0x0000000008003f44        0x4 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x0000000008003f44                _sidata = LOADADDR (.data)
+                0x0000000008003f48                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000      0x17c load address 0x0000000008003f44
+.data           0x0000000020000000      0x17c load address 0x0000000008003f48
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -1530,11 +1530,11 @@ LOAD /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
  *fill*         0x000000002000017b        0x1 
                 0x000000002000017c                _edata = .
 
-.igot.plt       0x000000002000017c        0x0 load address 0x00000000080040c0
+.igot.plt       0x000000002000017c        0x0 load address 0x00000000080040c4
  .igot.plt      0x000000002000017c        0x0 /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtbegin.o
                 0x000000002000017c                . = ALIGN (0x4)
 
-.bss            0x000000002000017c     0x1218 load address 0x00000000080040c0
+.bss            0x000000002000017c     0x1218 load address 0x00000000080040c4
                 0x000000002000017c                _sbss = .
                 0x000000002000017c                __bss_start__ = _sbss
  *(.bss)
@@ -1571,7 +1571,7 @@ LOAD /opt/gcc-arm/bin/../lib/gcc/arm-none-eabi/10.3.1/thumb/v7-m/nofp/crtn.o
                 0x0000000020001394                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020001394      0x604 load address 0x00000000080040c0
+                0x0000000020001394      0x604 load address 0x00000000080040c4
                 0x0000000020001398                . = ALIGN (0x8)
  *fill*         0x0000000020001394        0x4 
                 [!provide]                        PROVIDE (end = .)

build/RFDAproto.lst

@@ -1,4 +1,4 @@
-ARM GAS  /tmp/ccfpIi5r.s 			page 1
+ARM GAS  /tmp/ccB6GxpN.s 			page 1
 
 
    1              		.cpu cortex-m3
@@ -51,22 +51,22 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   31              		@ link register save eliminated.
   19:Core/Src/RFDAproto.c **** 
   20:Core/Src/RFDAproto.c **** 	//GPIO CFG
-  21:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S);
+  21:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S); //SET LE
   32              		.loc 1 21 2 view .LVU1
   33 0000 174B     		ldr	r3, .L2
   34 0002 0222     		movs	r2, #2
   35 0004 1A61     		str	r2, [r3, #16]
   22:Core/Src/RFDAproto.c **** 
   23:Core/Src/RFDAproto.c **** 	//TIM CFG
-ARM GAS  /tmp/ccfpIi5r.s 			page 2
+ARM GAS  /tmp/ccB6GxpN.s 			page 2
 
 
-  24:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->ARR,RFDA_TIM_ARR);
+  24:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->ARR,RFDA_TIM_ARR); //SET autoreload value
   36              		.loc 1 24 2 view .LVU2
   37 0006 03F51053 		add	r3, r3, #9216
   38 000a 0A22     		movs	r2, #10
   39 000c DA62     		str	r2, [r3, #44]
-  25:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CCR1,RFDA_TIM_CCR1);
+  25:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CCR1,RFDA_TIM_CCR1);//SET capture-compare value
   40              		.loc 1 25 2 view .LVU3
   41 000e 0722     		movs	r2, #7
   42 0010 5A63     		str	r2, [r3, #52]
@@ -88,18 +88,18 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   54 0028 1A62     		str	r2, [r3, #32]
   30:Core/Src/RFDAproto.c **** 
   31:Core/Src/RFDAproto.c **** 	//DMA CFG
-  32:Core/Src/RFDAproto.c **** 	CLEAR_BIT(DMA_CH->CCR, DMA_CCR_EN); //disable channel
+  32:Core/Src/RFDAproto.c **** 	CLEAR_BIT(DMA_CH->CCR, DMA_CCR_EN); //disable DMA channel
   55              		.loc 1 32 2 view .LVU7
   56 002a 03F55443 		add	r3, r3, #54272
   57 002e 9A6D     		ldr	r2, [r3, #88]
   58 0030 22F00102 		bic	r2, r2, #1
   59 0034 9A65     		str	r2, [r3, #88]
   33:Core/Src/RFDAproto.c **** 	/////////////////////////////////////
-  34:Core/Src/RFDAproto.c **** 	WRITE_REG(DMA_CH->CPAR, (uint32_t)(&(LE_AND_DATA_PORT->BSRR))); //peripherial address
+  34:Core/Src/RFDAproto.c **** 	WRITE_REG(DMA_CH->CPAR, (uint32_t)(&(LE_AND_DATA_PORT->BSRR))); //peripherial address (to)
   60              		.loc 1 34 2 view .LVU8
   61 0036 0B4A     		ldr	r2, .L2+4
   62 0038 1A66     		str	r2, [r3, #96]
-  35:Core/Src/RFDAproto.c **** 	WRITE_REG(DMA_CH->CMAR, (uint32_t)((buf))); //mem address
+  35:Core/Src/RFDAproto.c **** 	WRITE_REG(DMA_CH->CMAR, (uint32_t)((buf))); //mem address (from)
   63              		.loc 1 35 2 view .LVU9
   64 003a 0B4A     		ldr	r2, .L2+8
   65 003c 5A66     		str	r2, [r3, #100]
@@ -108,7 +108,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   67 003e 9A6D     		ldr	r2, [r3, #88]
   68 0040 42F00202 		orr	r2, r2, #2
   69 0044 9A65     		str	r2, [r3, #88]
-  37:Core/Src/RFDAproto.c **** 	NVIC_EnableIRQ(DMA1_Channel5_IRQn);
+  37:Core/Src/RFDAproto.c **** 	NVIC_EnableIRQ(DMA1_Channel5_IRQn); //ENABLE end of transfer IRQ
   70              		.loc 1 37 2 view .LVU11
   71              	.LVL0:
   72              	.LBB4:
@@ -118,7 +118,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
    2:Drivers/CMSIS/Include/core_cm3.h ****  * @file     core_cm3.h
    3:Drivers/CMSIS/Include/core_cm3.h ****  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
    4:Drivers/CMSIS/Include/core_cm3.h ****  * @version  V5.0.8
-ARM GAS  /tmp/ccfpIi5r.s 			page 3
+ARM GAS  /tmp/ccB6GxpN.s 			page 3
 
 
    5:Drivers/CMSIS/Include/core_cm3.h ****  * @date     04. June 2018
@@ -178,7 +178,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   59:Drivers/CMSIS/Include/core_cm3.h ****   \ingroup Cortex_M3
   60:Drivers/CMSIS/Include/core_cm3.h ****   @{
   61:Drivers/CMSIS/Include/core_cm3.h ****  */
-ARM GAS  /tmp/ccfpIi5r.s 			page 4
+ARM GAS  /tmp/ccB6GxpN.s 			page 4
 
 
   62:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -238,7 +238,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  116:Drivers/CMSIS/Include/core_cm3.h **** 
  117:Drivers/CMSIS/Include/core_cm3.h **** 
  118:Drivers/CMSIS/Include/core_cm3.h **** #ifdef __cplusplus
-ARM GAS  /tmp/ccfpIi5r.s 			page 5
+ARM GAS  /tmp/ccB6GxpN.s 			page 5
 
 
  119:Drivers/CMSIS/Include/core_cm3.h **** }
@@ -298,7 +298,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  173:Drivers/CMSIS/Include/core_cm3.h **** #define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
  174:Drivers/CMSIS/Include/core_cm3.h **** #define     __OM     volatile            /*! Defines 'write only' structure member permissions */
  175:Drivers/CMSIS/Include/core_cm3.h **** #define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-ARM GAS  /tmp/ccfpIi5r.s 			page 6
+ARM GAS  /tmp/ccB6GxpN.s 			page 6
 
 
  176:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -358,7 +358,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  230:Drivers/CMSIS/Include/core_cm3.h **** #define APSR_V_Pos                         28U                                            /*!< APSR
  231:Drivers/CMSIS/Include/core_cm3.h **** #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR
  232:Drivers/CMSIS/Include/core_cm3.h **** 
-ARM GAS  /tmp/ccfpIi5r.s 			page 7
+ARM GAS  /tmp/ccB6GxpN.s 			page 7
 
 
  233:Drivers/CMSIS/Include/core_cm3.h **** #define APSR_Q_Pos                         27U                                            /*!< APSR
@@ -418,7 +418,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  287:Drivers/CMSIS/Include/core_cm3.h **** #define xPSR_V_Pos                         28U                                            /*!< xPSR
  288:Drivers/CMSIS/Include/core_cm3.h **** #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR
  289:Drivers/CMSIS/Include/core_cm3.h **** 
-ARM GAS  /tmp/ccfpIi5r.s 			page 8
+ARM GAS  /tmp/ccB6GxpN.s 			page 8
 
 
  290:Drivers/CMSIS/Include/core_cm3.h **** #define xPSR_Q_Pos                         27U                                            /*!< xPSR
@@ -478,7 +478,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  344:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register 
  345:Drivers/CMSIS/Include/core_cm3.h ****         uint32_t RSERVED1[24U];
  346:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register *
-ARM GAS  /tmp/ccfpIi5r.s 			page 9
+ARM GAS  /tmp/ccB6GxpN.s 			page 9
 
 
  347:Drivers/CMSIS/Include/core_cm3.h ****         uint32_t RESERVED2[24U];
@@ -538,7 +538,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  401:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB 
  402:Drivers/CMSIS/Include/core_cm3.h **** 
  403:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB 
-ARM GAS  /tmp/ccfpIi5r.s 			page 10
+ARM GAS  /tmp/ccB6GxpN.s 			page 10
 
 
  404:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB 
@@ -598,7 +598,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  458:Drivers/CMSIS/Include/core_cm3.h **** /* SCB Application Interrupt and Reset Control Register Definitions */
  459:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB 
  460:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB 
-ARM GAS  /tmp/ccfpIi5r.s 			page 11
+ARM GAS  /tmp/ccB6GxpN.s 			page 11
 
 
  461:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -658,7 +658,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  515:Drivers/CMSIS/Include/core_cm3.h **** 
  516:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB 
  517:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB 
-ARM GAS  /tmp/ccfpIi5r.s 			page 12
+ARM GAS  /tmp/ccB6GxpN.s 			page 12
 
 
  518:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -718,7 +718,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  572:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB 
  573:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB 
  574:Drivers/CMSIS/Include/core_cm3.h **** 
-ARM GAS  /tmp/ccfpIi5r.s 			page 13
+ARM GAS  /tmp/ccB6GxpN.s 			page 13
 
 
  575:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB 
@@ -778,7 +778,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  629:Drivers/CMSIS/Include/core_cm3.h **** 
  630:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB 
  631:Drivers/CMSIS/Include/core_cm3.h **** #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB 
-ARM GAS  /tmp/ccfpIi5r.s 			page 14
+ARM GAS  /tmp/ccB6GxpN.s 			page 14
 
 
  632:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -838,7 +838,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  686:Drivers/CMSIS/Include/core_cm3.h ****   \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
  687:Drivers/CMSIS/Include/core_cm3.h ****   \brief    Type definitions for the System Timer Registers.
  688:Drivers/CMSIS/Include/core_cm3.h ****   @{
-ARM GAS  /tmp/ccfpIi5r.s 			page 15
+ARM GAS  /tmp/ccB6GxpN.s 			page 15
 
 
  689:Drivers/CMSIS/Include/core_cm3.h ****  */
@@ -898,7 +898,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  743:Drivers/CMSIS/Include/core_cm3.h **** /**
  744:Drivers/CMSIS/Include/core_cm3.h ****   \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
  745:Drivers/CMSIS/Include/core_cm3.h ****  */
-ARM GAS  /tmp/ccfpIi5r.s 			page 16
+ARM GAS  /tmp/ccB6GxpN.s 			page 16
 
 
  746:Drivers/CMSIS/Include/core_cm3.h **** typedef struct
@@ -958,7 +958,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  800:Drivers/CMSIS/Include/core_cm3.h **** #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM 
  801:Drivers/CMSIS/Include/core_cm3.h **** 
  802:Drivers/CMSIS/Include/core_cm3.h **** #define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM 
-ARM GAS  /tmp/ccfpIi5r.s 			page 17
+ARM GAS  /tmp/ccB6GxpN.s 			page 17
 
 
  803:Drivers/CMSIS/Include/core_cm3.h **** #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM 
@@ -1018,7 +1018,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  857:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Registe
  858:Drivers/CMSIS/Include/core_cm3.h ****   __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register 
  859:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-ARM GAS  /tmp/ccfpIi5r.s 			page 18
+ARM GAS  /tmp/ccB6GxpN.s 			page 18
 
 
  860:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
@@ -1078,7 +1078,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  914:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTR
  915:Drivers/CMSIS/Include/core_cm3.h **** 
  916:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTR
-ARM GAS  /tmp/ccfpIi5r.s 			page 19
+ARM GAS  /tmp/ccB6GxpN.s 			page 19
 
 
  917:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTR
@@ -1138,7 +1138,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  971:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUN
  972:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUN
  973:Drivers/CMSIS/Include/core_cm3.h **** 
-ARM GAS  /tmp/ccfpIi5r.s 			page 20
+ARM GAS  /tmp/ccB6GxpN.s 			page 20
 
 
  974:Drivers/CMSIS/Include/core_cm3.h **** #define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUN
@@ -1198,7 +1198,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1028:Drivers/CMSIS/Include/core_cm3.h **** /* TPI Selected Pin Protocol Register Definitions */
 1029:Drivers/CMSIS/Include/core_cm3.h **** #define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPP
 1030:Drivers/CMSIS/Include/core_cm3.h **** #define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPP
-ARM GAS  /tmp/ccfpIi5r.s 			page 21
+ARM GAS  /tmp/ccB6GxpN.s 			page 21
 
 
 1031:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -1258,7 +1258,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1085:Drivers/CMSIS/Include/core_cm3.h **** /* TPI Integration ITM Data Register Definitions (FIFO1) */
 1086:Drivers/CMSIS/Include/core_cm3.h **** #define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIF
 1087:Drivers/CMSIS/Include/core_cm3.h **** #define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIF
-ARM GAS  /tmp/ccfpIi5r.s 			page 22
+ARM GAS  /tmp/ccB6GxpN.s 			page 22
 
 
 1088:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -1318,7 +1318,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1142:Drivers/CMSIS/Include/core_cm3.h **** #define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEV
 1143:Drivers/CMSIS/Include/core_cm3.h **** 
 1144:Drivers/CMSIS/Include/core_cm3.h **** /*@}*/ /* end of group CMSIS_TPI */
-ARM GAS  /tmp/ccfpIi5r.s 			page 23
+ARM GAS  /tmp/ccB6GxpN.s 			page 23
 
 
 1145:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -1378,7 +1378,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1199:Drivers/CMSIS/Include/core_cm3.h **** /* MPU Region Base Address Register Definitions */
 1200:Drivers/CMSIS/Include/core_cm3.h **** #define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU 
 1201:Drivers/CMSIS/Include/core_cm3.h **** #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU 
-ARM GAS  /tmp/ccfpIi5r.s 			page 24
+ARM GAS  /tmp/ccB6GxpN.s 			page 24
 
 
 1202:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -1438,7 +1438,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1256:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status
 1257:Drivers/CMSIS/Include/core_cm3.h ****   __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Reg
 1258:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Registe
-ARM GAS  /tmp/ccfpIi5r.s 			page 25
+ARM GAS  /tmp/ccB6GxpN.s 			page 25
 
 
 1259:Drivers/CMSIS/Include/core_cm3.h ****   __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Cont
@@ -1498,7 +1498,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1313:Drivers/CMSIS/Include/core_cm3.h **** #define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< Core
 1314:Drivers/CMSIS/Include/core_cm3.h **** #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< Core
 1315:Drivers/CMSIS/Include/core_cm3.h **** 
-ARM GAS  /tmp/ccfpIi5r.s 			page 26
+ARM GAS  /tmp/ccB6GxpN.s 			page 26
 
 
 1316:Drivers/CMSIS/Include/core_cm3.h **** #define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< Core
@@ -1558,7 +1558,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1370:Drivers/CMSIS/Include/core_cm3.h **** #define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
 1371:Drivers/CMSIS/Include/core_cm3.h **** 
 1372:Drivers/CMSIS/Include/core_cm3.h **** /*@} end of group CMSIS_core_bitfield */
-ARM GAS  /tmp/ccfpIi5r.s 			page 27
+ARM GAS  /tmp/ccB6GxpN.s 			page 27
 
 
 1373:Drivers/CMSIS/Include/core_cm3.h **** 
@@ -1618,7 +1618,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1427:Drivers/CMSIS/Include/core_cm3.h ****   \defgroup CMSIS_Core_NVICFunctions NVIC Functions
 1428:Drivers/CMSIS/Include/core_cm3.h ****   \brief    Functions that manage interrupts and exceptions via the NVIC.
 1429:Drivers/CMSIS/Include/core_cm3.h ****   @{
-ARM GAS  /tmp/ccfpIi5r.s 			page 28
+ARM GAS  /tmp/ccB6GxpN.s 			page 28
 
 
 1430:Drivers/CMSIS/Include/core_cm3.h ****  */
@@ -1678,7 +1678,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
 1484:Drivers/CMSIS/Include/core_cm3.h **** 
 1485:Drivers/CMSIS/Include/core_cm3.h ****   reg_value  =  SCB->AIRCR;                                                   /* read old register 
 1486:Drivers/CMSIS/Include/core_cm3.h ****   reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to chan
-ARM GAS  /tmp/ccfpIi5r.s 			page 29
+ARM GAS  /tmp/ccB6GxpN.s 			page 29
 
 
 1487:Drivers/CMSIS/Include/core_cm3.h ****   reg_value  =  (reg_value                                   |
@@ -1728,7 +1728,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   89 0050 42F40032 		orr	r2, r2, #131072
   90 0054 5A60     		str	r2, [r3, #4]
   39:Core/Src/RFDAproto.c **** 	//////////////////////////////////////
-  40:Core/Src/RFDAproto.c **** 	SET_BIT(DMA_CH->CCR,DMA_CCR_EN); //enable channel
+  40:Core/Src/RFDAproto.c **** 	SET_BIT(DMA_CH->CCR,DMA_CCR_EN); //enable DMA channel
   91              		.loc 1 40 2 view .LVU18
   92 0056 9A6D     		ldr	r2, [r3, #88]
   93 0058 42F00102 		orr	r2, r2, #1
@@ -1738,7 +1738,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
   96 005e 7047     		bx	lr
   97              	.L3:
   98              		.align	2
-ARM GAS  /tmp/ccfpIi5r.s 			page 30
+ARM GAS  /tmp/ccB6GxpN.s 			page 30
 
 
   99              	.L2:
@@ -1768,7 +1768,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  123              		.loc 1 43 4 is_stmt 0 view .LVU22
  124 0000 0728     		cmp	r0, #7
  125 0002 49D0     		beq	.L5
-  44:Core/Src/RFDAproto.c **** 		for(i=0;i<BUF_LEN-1-k;i++) buf[i] = DATA_S;
+  44:Core/Src/RFDAproto.c **** 		for(i=0;i<BUF_LEN-1-k;i++) buf[i] = DATA_S; //1...1
  126              		.loc 1 44 3 is_stmt 1 view .LVU23
  127              		.loc 1 44 8 is_stmt 0 view .LVU24
  128 0004 2D4B     		ldr	r3, .L13
@@ -1797,8 +1797,8 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  151              		.loc 1 44 3 discriminator 1 view .LVU33
  152 0022 9342     		cmp	r3, r2
  153 0024 F2D3     		bcc	.L7
-  45:Core/Src/RFDAproto.c **** 		buf[BUF_LEN-1-k] = DATA_R;
-ARM GAS  /tmp/ccfpIi5r.s 			page 31
+  45:Core/Src/RFDAproto.c **** 		buf[BUF_LEN-1-k] = DATA_R; //0
+ARM GAS  /tmp/ccB6GxpN.s 			page 31
 
 
  154              		.loc 1 45 3 is_stmt 1 view .LVU34
@@ -1806,7 +1806,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  156 0026 264B     		ldr	r3, .L13+4
  157 0028 4FF48021 		mov	r1, #262144
  158 002c 43F82210 		str	r1, [r3, r2, lsl #2]
-  46:Core/Src/RFDAproto.c **** 		for(i=BUF_LEN-k;i<BUF_LEN-1;i++) buf[i] = DATA_S;
+  46:Core/Src/RFDAproto.c **** 		for(i=BUF_LEN-k;i<BUF_LEN-1;i++) buf[i] = DATA_S; //1...1
  159              		.loc 1 46 3 is_stmt 1 view .LVU36
  160              		.loc 1 46 16 is_stmt 0 view .LVU37
  161 0030 C0F10700 		rsb	r0, r0, #7
@@ -1838,7 +1838,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  187              	.L10:
   47:Core/Src/RFDAproto.c **** 	}
   48:Core/Src/RFDAproto.c **** 	else{
-  49:Core/Src/RFDAproto.c **** 		for(i=0;i<BUF_LEN;i++) buf[i]= DATA_R;
+  49:Core/Src/RFDAproto.c **** 		for(i=0;i<BUF_LEN;i++) buf[i]= DATA_R; //0...0
   50:Core/Src/RFDAproto.c **** 	}
   51:Core/Src/RFDAproto.c **** 	//DMA CFG
   52:Core/Src/RFDAproto.c **** 	CLEAR_BIT(DMA_CH->CCR,DMA_CCR_EN); //disable channel
@@ -1858,32 +1858,32 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  199              		.loc 1 54 2 view .LVU49
  200 0066 936D     		ldr	r3, [r2, #88]
  201 0068 43F00103 		orr	r3, r3, #1
-ARM GAS  /tmp/ccfpIi5r.s 			page 32
+ARM GAS  /tmp/ccB6GxpN.s 			page 32
 
 
  202 006c 9365     		str	r3, [r2, #88]
   55:Core/Src/RFDAproto.c **** 
-  56:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_R); //LE RESET
+  56:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_R); //LE RESET at start of transfer
  203              		.loc 1 56 2 view .LVU50
  204 006e 164B     		ldr	r3, .L13+12
  205 0070 4FF40032 		mov	r2, #131072
  206 0074 1A61     		str	r2, [r3, #16]
-  57:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CNT,0U);
+  57:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CNT,0U); //Set TIM counter to zero
  207              		.loc 1 57 2 view .LVU51
  208 0076 03F51053 		add	r3, r3, #9216
  209 007a 0022     		movs	r2, #0
  210 007c 5A62     		str	r2, [r3, #36]
-  58:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E);
+  58:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //enable data OUTPUT
  211              		.loc 1 58 2 view .LVU52
  212 007e 1A6A     		ldr	r2, [r3, #32]
  213 0080 42F00102 		orr	r2, r2, #1
  214 0084 1A62     		str	r2, [r3, #32]
-  59:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CR1,TIM_CR1_CEN);
+  59:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CR1,TIM_CR1_CEN); //enable counter
  215              		.loc 1 59 2 view .LVU53
  216 0086 1A68     		ldr	r2, [r3]
  217 0088 42F00102 		orr	r2, r2, #1
  218 008c 1A60     		str	r2, [r3]
-  60:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->EGR,TIM_EGR_UG);
+  60:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->EGR,TIM_EGR_UG); //generate update at start (first dma transfer)
  219              		.loc 1 60 2 view .LVU54
  220 008e 5A69     		ldr	r2, [r3, #20]
  221 0090 42F00102 		orr	r2, r2, #1
@@ -1918,7 +1918,7 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  242 00aa 0133     		adds	r3, r3, #1
  243 00ac 034A     		ldr	r2, .L13
  244 00ae 1370     		strb	r3, [r2]
-ARM GAS  /tmp/ccfpIi5r.s 			page 33
+ARM GAS  /tmp/ccB6GxpN.s 			page 33
 
 
  245              	.L11:
@@ -1962,28 +1962,28 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  276              		@ frame_needed = 0, uses_anonymous_args = 0
  277              		@ link register save eliminated.
   68:Core/Src/RFDAproto.c ****   /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
-  69:Core/Src/RFDAproto.c **** 	CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN);
+  69:Core/Src/RFDAproto.c **** 	CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN); //turn off counter
  278              		.loc 1 69 2 view .LVU67
  279 0000 094B     		ldr	r3, .L16
  280 0002 1A68     		ldr	r2, [r3]
  281 0004 22F00102 		bic	r2, r2, #1
  282 0008 1A60     		str	r2, [r3]
-  70:Core/Src/RFDAproto.c **** 	CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E);
+  70:Core/Src/RFDAproto.c **** 	CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //disable data channel
  283              		.loc 1 70 2 view .LVU68
  284 000a 1A6A     		ldr	r2, [r3, #32]
  285 000c 22F00102 		bic	r2, r2, #1
  286 0010 1A62     		str	r2, [r3, #32]
-  71:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S); //LE SET
+  71:Core/Src/RFDAproto.c **** 	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S|DATA_R); //LE SET and DATA RESET at the END of transfer
  287              		.loc 1 71 2 view .LVU69
  288 0012 A3F51053 		sub	r3, r3, #9216
- 289 0016 0222     		movs	r2, #2
+ 289 0016 054A     		ldr	r2, .L16+4
  290 0018 1A61     		str	r2, [r3, #16]
-ARM GAS  /tmp/ccfpIi5r.s 			page 34
+ARM GAS  /tmp/ccB6GxpN.s 			page 34
 
 
   72:Core/Src/RFDAproto.c **** 	SET_BIT(DMA1->IFCR, DMA_IFCR_CTCIF5); //CTCIFx: Channel x transfer complete flag clear (x = 1 ..7)
  291              		.loc 1 72 2 view .LVU70
- 292 001a 044A     		ldr	r2, .L16+4
+ 292 001a 054A     		ldr	r2, .L16+8
  293 001c 5368     		ldr	r3, [r2, #4]
  294 001e 43F40033 		orr	r3, r3, #131072
  295 0022 5360     		str	r3, [r2, #4]
@@ -1999,48 +1999,49 @@ ARM GAS  /tmp/ccfpIi5r.s 			page 1
  299 0026 00BF     		.align	2
  300              	.L16:
  301 0028 002C0140 		.word	1073818624
- 302 002c 00000240 		.word	1073872896
- 303              		.cfi_endproc
- 304              	.LFE657:
- 306              		.global	i
- 307              		.global	buf
- 308              		.section	.bss.buf,"aw",%nobits
- 309              		.align	2
- 310              		.set	.LANCHOR0,. + 0
- 313              	buf:
- 314 0000 00000000 		.space	28
- 314      00000000 
- 314      00000000 
- 314      00000000 
- 314      00000000 
- 315              		.section	.bss.i,"aw",%nobits
- 316              		.set	.LANCHOR1,. + 0
- 319              	i:
- 320 0000 00       		.space	1
- 321              		.text
- 322              	.Letext0:
- 323              		.file 3 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
- 324              		.file 4 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
- 325              		.file 5 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
- 326              		.file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h"
- 327              		.file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h"
-ARM GAS  /tmp/ccfpIi5r.s 			page 35
+ 302 002c 02000400 		.word	262146
+ 303 0030 00000240 		.word	1073872896
+ 304              		.cfi_endproc
+ 305              	.LFE657:
+ 307              		.global	i
+ 308              		.global	buf
+ 309              		.section	.bss.buf,"aw",%nobits
+ 310              		.align	2
+ 311              		.set	.LANCHOR0,. + 0
+ 314              	buf:
+ 315 0000 00000000 		.space	28
+ 315      00000000 
+ 315      00000000 
+ 315      00000000 
+ 315      00000000 
+ 316              		.section	.bss.i,"aw",%nobits
+ 317              		.set	.LANCHOR1,. + 0
+ 320              	i:
+ 321 0000 00       		.space	1
+ 322              		.text
+ 323              	.Letext0:
+ 324              		.file 3 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
+ 325              		.file 4 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
+ 326              		.file 5 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
+ 327              		.file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h"
+ 328              		.file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h"
+ARM GAS  /tmp/ccB6GxpN.s 			page 35
 
 
 DEFINED SYMBOLS
                             *ABS*:0000000000000000 RFDAproto.c
-     /tmp/ccfpIi5r.s:18     .text.RFDA_init:0000000000000000 $t
-     /tmp/ccfpIi5r.s:24     .text.RFDA_init:0000000000000000 RFDA_init
-     /tmp/ccfpIi5r.s:100    .text.RFDA_init:0000000000000060 $d
-     /tmp/ccfpIi5r.s:108    .text.RFDA:0000000000000000 $t
-     /tmp/ccfpIi5r.s:114    .text.RFDA:0000000000000000 RFDA
-     /tmp/ccfpIi5r.s:257    .text.RFDA:00000000000000bc $d
-     /tmp/ccfpIi5r.s:265    .text.DMA1_Channel5_IRQHandler:0000000000000000 $t
-     /tmp/ccfpIi5r.s:271    .text.DMA1_Channel5_IRQHandler:0000000000000000 DMA1_Channel5_IRQHandler
-     /tmp/ccfpIi5r.s:301    .text.DMA1_Channel5_IRQHandler:0000000000000028 $d
-     /tmp/ccfpIi5r.s:319    .bss.i:0000000000000000 i
-     /tmp/ccfpIi5r.s:313    .bss.buf:0000000000000000 buf
-     /tmp/ccfpIi5r.s:309    .bss.buf:0000000000000000 $d
-     /tmp/ccfpIi5r.s:320    .bss.i:0000000000000000 $d
+     /tmp/ccB6GxpN.s:18     .text.RFDA_init:0000000000000000 $t
+     /tmp/ccB6GxpN.s:24     .text.RFDA_init:0000000000000000 RFDA_init
+     /tmp/ccB6GxpN.s:100    .text.RFDA_init:0000000000000060 $d
+     /tmp/ccB6GxpN.s:108    .text.RFDA:0000000000000000 $t
+     /tmp/ccB6GxpN.s:114    .text.RFDA:0000000000000000 RFDA
+     /tmp/ccB6GxpN.s:257    .text.RFDA:00000000000000bc $d
+     /tmp/ccB6GxpN.s:265    .text.DMA1_Channel5_IRQHandler:0000000000000000 $t
+     /tmp/ccB6GxpN.s:271    .text.DMA1_Channel5_IRQHandler:0000000000000000 DMA1_Channel5_IRQHandler
+     /tmp/ccB6GxpN.s:301    .text.DMA1_Channel5_IRQHandler:0000000000000028 $d
+     /tmp/ccB6GxpN.s:320    .bss.i:0000000000000000 i
+     /tmp/ccB6GxpN.s:314    .bss.buf:0000000000000000 buf
+     /tmp/ccB6GxpN.s:310    .bss.buf:0000000000000000 $d
+     /tmp/ccB6GxpN.s:321    .bss.i:0000000000000000 $d
 
 NO UNDEFINED SYMBOLS