ARM GAS /tmp/cc0P3ody.s page 1 1 .cpu cortex-m3 2 .arch armv7-m 3 .fpu softvfp 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f1xx_hal_rcc_ex.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits 18 .align 1 19 .global HAL_RCCEx_PeriphCLKConfig 20 .syntax unified 21 .thumb 22 .thumb_func 24 HAL_RCCEx_PeriphCLKConfig: 25 .LVL0: 26 .LFB65: 27 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c" 1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @file stm32f1xx_hal_rcc_ex.c 4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. 6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: 8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions 9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** ****************************************************************************** 11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @attention 12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * Copyright (c) 2016 STMicroelectronics. 14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * All rights reserved. 15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in 17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * the root directory of this software component. 18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** ****************************************************************************** 20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ 23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #include "stm32f1xx_hal.h" 24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @addtogroup STM32F1xx_HAL_Driver 26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED 30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx ARM GAS /tmp/cc0P3ody.s page 2 32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. 33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ 37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ 38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants 39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @} 43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ 46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros 47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @} 51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ 54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ 55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ 56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions 58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Peripheral Control functions 62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions 63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @verbatim 65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** =============================================================================== 66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### 67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** =============================================================================== 68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** [..] 69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks 70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequencies. 71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** [..] 72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to 73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in 74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including 75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. 76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endverbatim 78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @{ 79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified parameters i 83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * RCC_PeriphCLKInitTypeDef. 84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that 85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks(RTC clock). 86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select 88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in ARM GAS /tmp/cc0P3ody.s page 3 89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including 90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * the backup registers) are set to their reset values. 91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @note In case of STM32F105xC or STM32F107xC devices, PLLI2S will be enabled if requested on 93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * one of 2 I2S interfaces. When PLLI2S is enabled, you need to call HAL_RCCEx_DisablePLLI 94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * manually disable it. 95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * 96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @retval HAL status 97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) 99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 28 .loc 1 99 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 8 31 @ frame_needed = 0, uses_anonymous_args = 0 32 .loc 1 99 1 is_stmt 0 view .LVU1 33 0000 70B5 push {r4, r5, r6, lr} 34 .LCFI0: 35 .cfi_def_cfa_offset 16 36 .cfi_offset 4, -16 37 .cfi_offset 5, -12 38 .cfi_offset 6, -8 39 .cfi_offset 14, -4 40 0002 82B0 sub sp, sp, #8 41 .LCFI1: 42 .cfi_def_cfa_offset 24 43 0004 0446 mov r4, r0 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t tickstart = 0U, temp_reg = 0U; 44 .loc 1 100 3 is_stmt 1 view .LVU2 45 .LVL1: 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t pllactive = 0U; 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC */ 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); 46 .loc 1 106 3 view .LVU3 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------- RTC/LCD Configuration ------------------------*/ 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) 47 .loc 1 109 3 view .LVU4 48 .loc 1 109 23 is_stmt 0 view .LVU5 49 0006 0368 ldr r3, [r0] 50 .loc 1 109 6 view .LVU6 51 0008 13F0010F tst r3, #1 52 000c 36D0 beq .L2 53 .LBB2: 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; 54 .loc 1 111 5 is_stmt 1 view .LVU7 55 .LVL2: 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); 56 .loc 1 114 5 view .LVU8 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the ARM GAS /tmp/cc0P3ody.s page 4 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** power domain is done. */ 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 57 .loc 1 119 5 view .LVU9 58 .loc 1 119 9 is_stmt 0 view .LVU10 59 000e 3F4B ldr r3, .L20 60 0010 DB69 ldr r3, [r3, #28] 61 .loc 1 119 8 view .LVU11 62 0012 13F0805F tst r3, #268435456 63 0016 49D1 bne .L12 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); 64 .loc 1 121 7 is_stmt 1 view .LVU12 65 .LBB3: 66 .loc 1 121 7 view .LVU13 67 .loc 1 121 7 view .LVU14 68 0018 3C4B ldr r3, .L20 69 001a DA69 ldr r2, [r3, #28] 70 001c 42F08052 orr r2, r2, #268435456 71 0020 DA61 str r2, [r3, #28] 72 .loc 1 121 7 view .LVU15 73 0022 DB69 ldr r3, [r3, #28] 74 0024 03F08053 and r3, r3, #268435456 75 0028 0193 str r3, [sp, #4] 76 .loc 1 121 7 view .LVU16 77 002a 019B ldr r3, [sp, #4] 78 .LBE3: 79 .loc 1 121 7 view .LVU17 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pwrclkchanged = SET; 80 .loc 1 122 7 view .LVU18 81 .LVL3: 82 .loc 1 122 21 is_stmt 0 view .LVU19 83 002c 0125 movs r5, #1 84 .LVL4: 85 .L3: 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 86 .loc 1 125 5 is_stmt 1 view .LVU20 87 .loc 1 125 9 is_stmt 0 view .LVU21 88 002e 384B ldr r3, .L20+4 89 0030 1B68 ldr r3, [r3] 90 .loc 1 125 8 view .LVU22 91 0032 13F4807F tst r3, #256 92 0036 3BD0 beq .L17 93 .LVL5: 94 .L4: 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) ARM GAS /tmp/cc0P3ody.s page 5 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_TIMEOUT; 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); 95 .loc 1 143 5 is_stmt 1 view .LVU23 96 .loc 1 143 20 is_stmt 0 view .LVU24 97 0038 344B ldr r3, .L20 98 003a 1B6A ldr r3, [r3, #32] 99 .LVL6: 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCS 100 .loc 1 144 5 is_stmt 1 view .LVU25 101 .loc 1 144 8 is_stmt 0 view .LVU26 102 003c 13F44073 ands r3, r3, #768 103 .LVL7: 104 .loc 1 144 8 view .LVU27 105 0040 13D0 beq .L8 106 .loc 1 144 65 discriminator 1 view .LVU28 107 0042 6268 ldr r2, [r4, #4] 108 .loc 1 144 85 discriminator 1 view .LVU29 109 0044 02F44072 and r2, r2, #768 110 .loc 1 144 35 discriminator 1 view .LVU30 111 0048 9A42 cmp r2, r3 112 004a 0ED0 beq .L8 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 113 .loc 1 147 7 is_stmt 1 view .LVU31 114 .loc 1 147 22 is_stmt 0 view .LVU32 115 004c 2F4A ldr r2, .L20 116 004e 136A ldr r3, [r2, #32] 117 .LVL8: 118 .loc 1 147 16 view .LVU33 119 0050 23F44070 bic r0, r3, #768 120 .LVL9: 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); 121 .loc 1 149 7 is_stmt 1 view .LVU34 122 0054 2F49 ldr r1, .L20+8 123 0056 0126 movs r6, #1 124 0058 C1F84064 str r6, [r1, #1088] 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); 125 .loc 1 150 7 view .LVU35 126 005c 0026 movs r6, #0 127 005e C1F84064 str r6, [r1, #1088] 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; 128 .loc 1 152 7 view .LVU36 129 .loc 1 152 17 is_stmt 0 view .LVU37 130 0062 1062 str r0, [r2, #32] 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) 131 .loc 1 155 7 is_stmt 1 view .LVU38 ARM GAS /tmp/cc0P3ody.s page 6 132 .loc 1 155 10 is_stmt 0 view .LVU39 133 0064 13F0010F tst r3, #1 134 0068 36D1 bne .L18 135 .LVL10: 136 .L8: 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get Start Tick */ 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_TIMEOUT; 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 137 .loc 1 170 5 is_stmt 1 view .LVU40 138 006a 284A ldr r2, .L20 139 006c 136A ldr r3, [r2, #32] 140 006e 23F44073 bic r3, r3, #768 141 0072 6168 ldr r1, [r4, #4] 142 0074 0B43 orrs r3, r3, r1 143 0076 1362 str r3, [r2, #32] 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (pwrclkchanged == SET) 144 .loc 1 173 5 view .LVU41 145 .loc 1 173 8 is_stmt 0 view .LVU42 146 0078 002D cmp r5, #0 147 007a 3ED1 bne .L19 148 .LVL11: 149 .L2: 150 .loc 1 173 8 view .LVU43 151 .LBE2: 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------ ADC clock Configuration ------------------*/ 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) 152 .loc 1 180 3 is_stmt 1 view .LVU44 153 .loc 1 180 22 is_stmt 0 view .LVU45 154 007c 2368 ldr r3, [r4] 155 .loc 1 180 6 view .LVU46 156 007e 13F0020F tst r3, #2 157 0082 06D0 beq .L11 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection)); 158 .loc 1 183 5 is_stmt 1 view .LVU47 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the ADC clock source */ ARM GAS /tmp/cc0P3ody.s page 7 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); 159 .loc 1 186 5 view .LVU48 160 0084 214A ldr r2, .L20 161 0086 5368 ldr r3, [r2, #4] 162 0088 23F44043 bic r3, r3, #49152 163 008c A168 ldr r1, [r4, #8] 164 008e 0B43 orrs r3, r3, r1 165 0090 5360 str r3, [r2, #4] 166 .L11: 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------ I2S2 Configuration ------------------------*/ 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S2) == RCC_PERIPHCLK_I2S2) 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2S2CLKSOURCE(PeriphClkInit->I2s2ClockSelection)); 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the I2S2 clock source */ 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_I2S2_CONFIG(PeriphClkInit->I2s2ClockSelection); 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------ I2S3 Configuration ------------------------*/ 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S3) == RCC_PERIPHCLK_I2S3) 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2S3CLKSOURCE(PeriphClkInit->I2s3ClockSelection)); 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the I2S3 clock source */ 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_I2S3_CONFIG(PeriphClkInit->I2s3ClockSelection); 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------ PLL I2S Configuration ----------------------*/ 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check that PLLI2S need to be enabled */ 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S2SRC) || HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_I2S3SRC 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Update flag to indicate that PLL I2S should be active */ 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllactive = 1; 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if PLL I2S need to be enabled */ 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (pllactive == 1) 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Enable PLL I2S only if not active */ 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_CLR(RCC->CR, RCC_CR_PLL3ON)) 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_PLLI2S_MUL(PeriphClkInit->PLLI2S.PLLI2SMUL)); 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_HSE_PREDIV2(PeriphClkInit->PLLI2S.HSEPrediv2Value)); 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Prediv2 can be written only when the PLL2 is disabled. */ 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Return an error only if new value is different from the programmed value */ 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL2ON) && \ 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** (__HAL_RCC_HSE_GET_PREDIV2() != PeriphClkInit->PLLI2S.HSEPrediv2Value)) 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_ERROR; 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } ARM GAS /tmp/cc0P3ody.s page 8 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the HSE prediv2 factor --------------------------------*/ 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_HSE_PREDIV2_CONFIG(PeriphClkInit->PLLI2S.HSEPrediv2Value); 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the main PLLI2S multiplication factors. */ 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SMUL); 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Enable the main PLLI2S. */ 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_ENABLE(); 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get Start Tick*/ 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Wait till PLLI2S is ready */ 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_TIMEOUT; 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Return an error only if user wants to change the PLLI2SMUL whereas PLLI2S is active */ 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL) != PeriphClkInit->PLLI2S.PLLI2SMUL) 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_ERROR; 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC */ 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F105xC) || defined(STM32F107xC) 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /*------------------------------ USB clock Configuration ------------------*/ 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) 167 .loc 1 272 3 view .LVU49 168 .loc 1 272 22 is_stmt 0 view .LVU50 169 0092 2368 ldr r3, [r4] 170 .loc 1 272 6 view .LVU51 171 0094 13F0100F tst r3, #16 172 0098 34D0 beq .L15 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection)); 173 .loc 1 275 5 is_stmt 1 view .LVU52 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Configure the USB clock source */ 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); 174 .loc 1 278 5 view .LVU53 175 009a 1C4A ldr r2, .L20 176 009c 5368 ldr r3, [r2, #4] 177 009e 23F48003 bic r3, r3, #4194304 178 00a2 E168 ldr r1, [r4, #12] 179 00a4 0B43 orrs r3, r3, r1 ARM GAS /tmp/cc0P3ody.s page 9 180 00a6 5360 str r3, [r2, #4] 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return HAL_OK; 181 .loc 1 282 10 is_stmt 0 view .LVU54 182 00a8 0020 movs r0, #0 183 00aa 2CE0 b .L6 184 .LVL12: 185 .L12: 186 .LBB4: 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 187 .loc 1 111 16 view .LVU55 188 00ac 0025 movs r5, #0 189 00ae BEE7 b .L3 190 .LVL13: 191 .L17: 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 192 .loc 1 128 7 is_stmt 1 view .LVU56 193 00b0 174A ldr r2, .L20+4 194 00b2 1368 ldr r3, [r2] 195 00b4 43F48073 orr r3, r3, #256 196 00b8 1360 str r3, [r2] 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 197 .loc 1 131 7 view .LVU57 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 198 .loc 1 131 19 is_stmt 0 view .LVU58 199 00ba FFF7FEFF bl HAL_GetTick 200 .LVL14: 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 201 .loc 1 131 19 view .LVU59 202 00be 0646 mov r6, r0 203 .LVL15: 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 204 .loc 1 133 7 is_stmt 1 view .LVU60 205 .L5: 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 206 .loc 1 133 13 view .LVU61 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 207 .loc 1 133 14 is_stmt 0 view .LVU62 208 00c0 134B ldr r3, .L20+4 209 00c2 1B68 ldr r3, [r3] 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 210 .loc 1 133 13 view .LVU63 211 00c4 13F4807F tst r3, #256 212 00c8 B6D1 bne .L4 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 213 .loc 1 135 9 is_stmt 1 view .LVU64 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 214 .loc 1 135 14 is_stmt 0 view .LVU65 215 00ca FFF7FEFF bl HAL_GetTick 216 .LVL16: 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 217 .loc 1 135 28 view .LVU66 218 00ce 801B subs r0, r0, r6 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 219 .loc 1 135 12 view .LVU67 ARM GAS /tmp/cc0P3ody.s page 10 220 00d0 6428 cmp r0, #100 221 00d2 F5D9 bls .L5 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 222 .loc 1 137 18 view .LVU68 223 00d4 0320 movs r0, #3 224 00d6 16E0 b .L6 225 .LVL17: 226 .L18: 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 227 .loc 1 158 9 is_stmt 1 view .LVU69 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 228 .loc 1 158 21 is_stmt 0 view .LVU70 229 00d8 FFF7FEFF bl HAL_GetTick 230 .LVL18: 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 231 .loc 1 158 21 view .LVU71 232 00dc 0646 mov r6, r0 233 .LVL19: 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 234 .loc 1 161 9 is_stmt 1 view .LVU72 235 .L9: 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 236 .loc 1 161 15 view .LVU73 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 237 .loc 1 161 16 is_stmt 0 view .LVU74 238 00de 0B4B ldr r3, .L20 239 00e0 1B6A ldr r3, [r3, #32] 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 240 .loc 1 161 15 view .LVU75 241 00e2 13F0020F tst r3, #2 242 00e6 C0D1 bne .L8 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 243 .loc 1 163 11 is_stmt 1 view .LVU76 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 244 .loc 1 163 16 is_stmt 0 view .LVU77 245 00e8 FFF7FEFF bl HAL_GetTick 246 .LVL20: 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 247 .loc 1 163 30 view .LVU78 248 00ec 801B subs r0, r0, r6 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 249 .loc 1 163 14 view .LVU79 250 00ee 41F28833 movw r3, #5000 251 00f2 9842 cmp r0, r3 252 00f4 F3D9 bls .L9 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 253 .loc 1 165 20 view .LVU80 254 00f6 0320 movs r0, #3 255 00f8 05E0 b .L6 256 .LVL21: 257 .L19: 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 258 .loc 1 175 7 is_stmt 1 view .LVU81 259 00fa D369 ldr r3, [r2, #28] 260 00fc 23F08053 bic r3, r3, #268435456 261 0100 D361 str r3, [r2, #28] 262 0102 BBE7 b .L2 ARM GAS /tmp/cc0P3ody.s page 11 263 .LVL22: 264 .L15: 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 265 .loc 1 175 7 is_stmt 0 view .LVU82 266 .LBE4: 267 .loc 1 282 10 view .LVU83 268 0104 0020 movs r0, #0 269 .L6: 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 270 .loc 1 283 1 view .LVU84 271 0106 02B0 add sp, sp, #8 272 .LCFI2: 273 .cfi_def_cfa_offset 16 274 @ sp needed 275 0108 70BD pop {r4, r5, r6, pc} 276 .LVL23: 277 .L21: 278 .loc 1 283 1 view .LVU85 279 010a 00BF .align 2 280 .L20: 281 010c 00100240 .word 1073876992 282 0110 00700040 .word 1073770496 283 0114 00004242 .word 1111621632 284 .cfi_endproc 285 .LFE65: 287 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits 288 .align 1 289 .global HAL_RCCEx_GetPeriphCLKConfig 290 .syntax unified 291 .thumb 292 .thumb_func 294 HAL_RCCEx_GetPeriphCLKConfig: 295 .LVL24: 296 .LFB66: 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief Get the PeriphClkInit according to the internal 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * RCC configuration registers. 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks(RTC, I2S, ADC 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @retval None 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 297 .loc 1 293 1 is_stmt 1 view -0 298 .cfi_startproc 299 @ args = 0, pretend = 0, frame = 0 300 @ frame_needed = 0, uses_anonymous_args = 0 301 @ link register save eliminated. 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; 302 .loc 1 294 3 view .LVU87 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_RTC; 303 .loc 1 297 3 view .LVU88 304 .loc 1 297 39 is_stmt 0 view .LVU89 305 0000 0123 movs r3, #1 ARM GAS /tmp/cc0P3ody.s page 12 306 0002 0360 str r3, [r0] 298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the RTC configuration -----------------------------------------------*/ 300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); 307 .loc 1 300 3 is_stmt 1 view .LVU90 308 .loc 1 300 12 is_stmt 0 view .LVU91 309 0004 084B ldr r3, .L23 310 0006 1A6A ldr r2, [r3, #32] 311 .loc 1 300 10 view .LVU92 312 0008 02F44072 and r2, r2, #768 313 .LVL25: 301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Source clock is LSE or LSI*/ 302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = srcclk; 314 .loc 1 302 3 is_stmt 1 view .LVU93 315 .loc 1 302 36 is_stmt 0 view .LVU94 316 000c 4260 str r2, [r0, #4] 303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the ADC clock configuration -----------------------------------------*/ 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_ADC; 317 .loc 1 305 3 is_stmt 1 view .LVU95 318 .loc 1 305 39 is_stmt 0 view .LVU96 319 000e 0322 movs r2, #3 320 .LVL26: 321 .loc 1 305 39 view .LVU97 322 0010 0260 str r2, [r0] 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->AdcClockSelection = __HAL_RCC_GET_ADC_SOURCE(); 323 .loc 1 306 3 is_stmt 1 view .LVU98 324 .loc 1 306 38 is_stmt 0 view .LVU99 325 0012 5A68 ldr r2, [r3, #4] 326 0014 02F44042 and r2, r2, #49152 327 .loc 1 306 36 view .LVU100 328 0018 8260 str r2, [r0, #8] 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the I2S2 clock configuration -----------------------------------------*/ 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S2; 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->I2s2ClockSelection = __HAL_RCC_GET_I2S2_SOURCE(); 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the I2S3 clock configuration -----------------------------------------*/ 314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S3; 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->I2s3ClockSelection = __HAL_RCC_GET_I2S3_SOURCE(); 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC */ 318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F103xE) || defined(STM32F103xG) 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the I2S2 clock configuration -----------------------------------------*/ 321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S2; 322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->I2s2ClockSelection = RCC_I2S2CLKSOURCE_SYSCLK; 323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the I2S3 clock configuration -----------------------------------------*/ 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_I2S3; 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->I2s3ClockSelection = RCC_I2S3CLKSOURCE_SYSCLK; 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F103xE || STM32F103xG */ 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ ARM GAS /tmp/cc0P3ody.s page 13 332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F105xC) || defined(STM32F107xC) 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get the USB clock configuration -----------------------------------------*/ 334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; 329 .loc 1 334 3 is_stmt 1 view .LVU101 330 .loc 1 334 39 is_stmt 0 view .LVU102 331 001a 1322 movs r2, #19 332 001c 0260 str r2, [r0] 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); 333 .loc 1 335 3 is_stmt 1 view .LVU103 334 .loc 1 335 38 is_stmt 0 view .LVU104 335 001e 5B68 ldr r3, [r3, #4] 336 0020 03F48003 and r3, r3, #4194304 337 .loc 1 335 36 view .LVU105 338 0024 C360 str r3, [r0, #12] 336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || 337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 339 .loc 1 337 1 view .LVU106 340 0026 7047 bx lr 341 .L24: 342 .align 2 343 .L23: 344 0028 00100240 .word 1073876992 345 .cfi_endproc 346 .LFE66: 348 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits 349 .align 1 350 .global HAL_RCCEx_GetPeriphCLKFreq 351 .syntax unified 352 .thumb 353 .thumb_func 355 HAL_RCCEx_GetPeriphCLKFreq: 356 .LVL27: 357 .LFB67: 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /** 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown 342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * This parameter can be one of the following values: 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock 345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F103xE 347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F103xG 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F105xC 358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock ARM GAS /tmp/cc0P3ody.s page 14 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F107xC 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S3 I2S3 peripheral clock 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2S2 I2S2 peripheral clock 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F102xx 378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @if STM32F103xx 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** @endif 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** */ 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 358 .loc 1 386 1 is_stmt 1 view -0 359 .cfi_startproc 360 @ args = 0, pretend = 0, frame = 0 361 @ frame_needed = 0, uses_anonymous_args = 0 362 .loc 1 386 1 is_stmt 0 view .LVU108 363 0000 08B5 push {r3, lr} 364 .LCFI3: 365 .cfi_def_cfa_offset 8 366 .cfi_offset 3, -8 367 .cfi_offset 14, -4 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** static const uint8_t aPLLMULFactorTable[14U] = {0, 0, 4, 5, 6, 7, 8, 9, 0, 0, 0, 0, 0, 13}; 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** static const uint8_t aPredivFactorTable[16U] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t pll2mul = 0U, pll3mul = 0U, prediv2 = 0U; 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC */ 394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) || \ 395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) 396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** static const uint8_t aPLLMULFactorTable[16U] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 1 368 .loc 1 396 3 is_stmt 1 view .LVU109 397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** static const uint8_t aPredivFactorTable[2U] = {1, 2}; 369 .loc 1 397 3 view .LVU110 398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t prediv1 = 0U, pllclk = 0U, pllmul = 0U; 370 .loc 1 399 3 view .LVU111 371 .LVL28: 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG */ 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U, frequency = 0U; 372 .loc 1 401 3 view .LVU112 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check the parameters */ ARM GAS /tmp/cc0P3ody.s page 15 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); 373 .loc 1 404 3 view .LVU113 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** switch (PeriphClk) 374 .loc 1 406 3 view .LVU114 375 0002 0228 cmp r0, #2 376 0004 4ED0 beq .L26 377 0006 1028 cmp r0, #16 378 0008 03D0 beq .L27 379 000a 0128 cmp r0, #1 380 000c 28D0 beq .L28 381 000e 0020 movs r0, #0 382 .LVL29: 383 .L25: 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\ 409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\ 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F105xC) || defined(STM32F107xC) 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: 412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get RCC configuration ------------------------------------------------------*/ 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** temp_reg = RCC->CFGR; 415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if PLL is enabled */ 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLON)) 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllmul = aPLLMULFactorTable[(uint32_t)(temp_reg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) || defined(STM32F100xB)\ 423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** || defined(STM32F100xE) 424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PRED 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #else 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** prediv1 = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTP 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC)) 431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* PLL2 selected as Prediv1 source */ 433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* PLLCLK = PLL2CLK / PREDIV1 * PLLMUL with PLL2CLK = HSE/PREDIV2 * PLL2MUL */ 434:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 435:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pll2mul = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> RCC_CFGR2_PLL2MUL_Pos) + 2; 436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllclk = (uint32_t)((((HSE_VALUE / prediv2) * pll2mul) / prediv1) * pllmul); 437:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 443:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 444:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* If PLLMUL was set to 13 means that it was to cover the case PLLMUL 6.5 (avoid using fl 445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* In this case need to divide pllclk by 2 */ 446:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (pllmul == aPLLMULFactorTable[(uint32_t)(RCC_CFGR_PLLMULL6_5) >> RCC_CFGR_PLLMULL_Pos] 447:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllclk = pllclk / 2; 449:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } ARM GAS /tmp/cc0P3ody.s page 16 450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #else 451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 453:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */ 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllclk = (uint32_t)((HSE_VALUE / prediv1) * pllmul); 455:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 456:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC */ 457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 458:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul); 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 463:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 464:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Calcul of the USB frequency*/ 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F105xC) || defined(STM32F107xC) 466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* USBCLK = PLLVCO = (2 x PLLCLK) / USB prescaler */ 467:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL_DIV2) 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Prescaler of 2 selected for USB */ 470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = pllclk; 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 473:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Prescaler of 3 selected for USB */ 475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = (2 * pllclk) / 3; 476:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 477:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #else 478:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* USBCLK = PLLCLK / USB prescaler */ 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (__HAL_RCC_GET_USB_SOURCE() == RCC_USBCLKSOURCE_PLL) 480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* No prescaler selected for USB */ 482:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = pllclk; 483:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 484:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 486:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Prescaler of 1.5 selected for USB */ 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = (pllclk * 2) / 3; 488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 489:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif 490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F103xE) || defined(STM32F103xG) || defined(STM32F105xC) || defined(STM32F107xC) 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S2: 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F103xE) || defined(STM32F103xG) 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* SYSCLK used as source clock for I2S2 */ 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #else 501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (__HAL_RCC_GET_I2S2_SOURCE() == RCC_I2S2CLKSOURCE_SYSCLK) 502:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* SYSCLK used as source clock for I2S2 */ 504:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); 505:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 506:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else ARM GAS /tmp/cc0P3ody.s page 17 507:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if PLLI2S is enabled */ 509:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 510:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* PLLI2SVCO = 2 * PLLI2SCLK = 2 * (HSE/PREDIV2 * PLL3MUL) */ 512:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 517:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F103xE || STM32F103xG */ 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2S3: 521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #if defined(STM32F103xE) || defined(STM32F103xG) 523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* SYSCLK used as source clock for I2S3 */ 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); 525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #else 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (__HAL_RCC_GET_I2S3_SOURCE() == RCC_I2S3CLKSOURCE_SYSCLK) 527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 528:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* SYSCLK used as source clock for I2S3 */ 529:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 531:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 532:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if PLLI2S is enabled */ 534:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLL3ON)) 535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* PLLI2SVCO = 2 * PLLI2SCLK = 2 * (HSE/PREDIV2 * PLL3MUL) */ 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** prediv2 = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> RCC_CFGR2_PREDIV2_Pos) + 1; 538:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** pll3mul = ((RCC->CFGR2 & RCC_CFGR2_PLL3MUL) >> RCC_CFGR2_PLL3MUL_Pos) + 2; 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = (uint32_t)(2 * ((HSE_VALUE / prediv2) * pll3mul)); 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F103xE || STM32F103xG */ 543:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 544:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Get RCC BDCR configuration ------------------------------------------------------*/ 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** temp_reg = RCC->BDCR; 550:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if LSE is ready if RTC clock selection is LSE */ 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(temp_reg, RCC_B 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = LSE_VALUE; 555:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 556:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Check if LSI is ready if RTC clock selection is LSI */ 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, 558:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = LSI_VALUE; 560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else if (((temp_reg & RCC_BDCR_RTCSEL) == RCC_RTCCLKSOURCE_HSE_DIV128) && (HAL_IS_BIT_SET(RCC 562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 128U; ARM GAS /tmp/cc0P3ody.s page 18 564:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* Clock not enabled for RTC*/ 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** else 567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 568:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** /* nothing to do: frequency already initialized to 0U */ 569:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 570:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 571:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 572:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_ADC: 573:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK2Freq() / (((__HAL_RCC_GET_ADC_SOURCE() >> RCC_CFGR_ADCPRE_Pos) + 575:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 576:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 577:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** default: 578:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 580:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** return (frequency); 583:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 384 .loc 1 583 1 is_stmt 0 view .LVU115 385 0010 08BD pop {r3, pc} 386 .LVL30: 387 .L27: 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 388 .loc 1 414 7 is_stmt 1 view .LVU116 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 389 .loc 1 414 16 is_stmt 0 view .LVU117 390 0012 2B4B ldr r3, .L40 391 0014 5A68 ldr r2, [r3, #4] 392 .LVL31: 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 393 .loc 1 417 7 is_stmt 1 view .LVU118 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 394 .loc 1 417 11 is_stmt 0 view .LVU119 395 0016 1868 ldr r0, [r3] 396 .LVL32: 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 397 .loc 1 417 10 view .LVU120 398 0018 10F08070 ands r0, r0, #16777216 399 001c F8D0 beq .L25 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 400 .loc 1 419 9 is_stmt 1 view .LVU121 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 401 .loc 1 419 77 is_stmt 0 view .LVU122 402 001e C2F38343 ubfx r3, r2, #18, #4 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** if ((temp_reg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2) 403 .loc 1 419 36 view .LVU123 404 0022 2849 ldr r1, .L40+4 405 0024 C85C ldrb r0, [r1, r3] @ zero_extendqisi2 406 .LVL33: 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 407 .loc 1 420 9 is_stmt 1 view .LVU124 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 408 .loc 1 420 12 is_stmt 0 view .LVU125 409 0026 12F4803F tst r2, #65536 410 002a 15D0 beq .L30 ARM GAS /tmp/cc0P3ody.s page 19 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 411 .loc 1 426 11 is_stmt 1 view .LVU126 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 412 .loc 1 426 54 is_stmt 0 view .LVU127 413 002c 244B ldr r3, .L40 414 002e 5B68 ldr r3, [r3, #4] 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 415 .loc 1 426 82 view .LVU128 416 0030 C3F34043 ubfx r3, r3, #17, #1 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 417 .loc 1 426 39 view .LVU129 418 0034 244A ldr r2, .L40+8 419 .LVL34: 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** #endif /* STM32F105xC || STM32F107xC || STM32F100xB || STM32F100xE */ 420 .loc 1 426 39 view .LVU130 421 0036 D25C ldrb r2, [r2, r3] @ zero_extendqisi2 422 .LVL35: 451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 423 .loc 1 451 11 is_stmt 1 view .LVU131 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 424 .loc 1 454 13 view .LVU132 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 425 .loc 1 454 44 is_stmt 0 view .LVU133 426 0038 244B ldr r3, .L40+12 427 003a B3FBF2F3 udiv r3, r3, r2 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 428 .loc 1 454 20 view .LVU134 429 003e 03FB00F0 mul r0, r3, r0 430 .LVL36: 431 .L31: 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 432 .loc 1 479 9 is_stmt 1 view .LVU135 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 433 .loc 1 479 13 is_stmt 0 view .LVU136 434 0042 1F4B ldr r3, .L40 435 0044 5B68 ldr r3, [r3, #4] 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 436 .loc 1 479 12 view .LVU137 437 0046 13F4800F tst r3, #4194304 438 004a E1D1 bne .L25 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 439 .loc 1 487 11 is_stmt 1 view .LVU138 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 440 .loc 1 487 31 is_stmt 0 view .LVU139 441 004c 4000 lsls r0, r0, #1 442 .LVL37: 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 443 .loc 1 487 21 view .LVU140 444 004e 204B ldr r3, .L40+16 445 0050 A3FB0030 umull r3, r0, r3, r0 446 0054 4008 lsrs r0, r0, #1 447 .LVL38: 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 448 .loc 1 487 21 view .LVU141 449 0056 DBE7 b .L25 450 .LVL39: 451 .L30: ARM GAS /tmp/cc0P3ody.s page 20 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 452 .loc 1 461 11 is_stmt 1 view .LVU142 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 453 .loc 1 461 18 is_stmt 0 view .LVU143 454 0058 1E4B ldr r3, .L40+20 455 005a 03FB00F0 mul r0, r3, r0 456 .LVL40: 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 457 .loc 1 461 18 view .LVU144 458 005e F0E7 b .L31 459 .LVL41: 460 .L28: 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 461 .loc 1 549 7 is_stmt 1 view .LVU145 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 462 .loc 1 549 16 is_stmt 0 view .LVU146 463 0060 174B ldr r3, .L40 464 0062 1B6A ldr r3, [r3, #32] 465 .LVL42: 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 466 .loc 1 552 7 is_stmt 1 view .LVU147 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 467 .loc 1 552 66 is_stmt 0 view .LVU148 468 0064 40F20232 movw r2, #770 469 0068 1A40 ands r2, r2, r3 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 470 .loc 1 552 10 view .LVU149 471 006a B2F5817F cmp r2, #258 472 006e 24D0 beq .L33 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 473 .loc 1 557 12 is_stmt 1 view .LVU150 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 474 .loc 1 557 27 is_stmt 0 view .LVU151 475 0070 03F44073 and r3, r3, #768 476 .LVL43: 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 477 .loc 1 557 15 view .LVU152 478 0074 B3F5007F cmp r3, #512 479 0078 04D0 beq .L38 480 .L32: 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 481 .loc 1 561 12 is_stmt 1 view .LVU153 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 482 .loc 1 561 15 is_stmt 0 view .LVU154 483 007a B3F5407F cmp r3, #768 484 007e 09D0 beq .L39 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 485 .loc 1 401 27 view .LVU155 486 0080 0020 movs r0, #0 487 .LVL44: 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** 488 .loc 1 401 27 view .LVU156 489 0082 C5E7 b .L25 490 .LVL45: 491 .L38: 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 492 .loc 1 557 75 discriminator 1 view .LVU157 ARM GAS /tmp/cc0P3ody.s page 21 493 0084 0E4A ldr r2, .L40 494 0086 526A ldr r2, [r2, #36] 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 495 .loc 1 557 71 discriminator 1 view .LVU158 496 0088 12F0020F tst r2, #2 497 008c F5D0 beq .L32 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 498 .loc 1 559 19 view .LVU159 499 008e 49F64040 movw r0, #40000 500 .LVL46: 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 501 .loc 1 559 19 view .LVU160 502 0092 BDE7 b .L25 503 .LVL47: 504 .L39: 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 505 .loc 1 561 82 discriminator 1 view .LVU161 506 0094 0A4B ldr r3, .L40 507 0096 1868 ldr r0, [r3] 508 .LVL48: 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** { 509 .loc 1 561 78 discriminator 1 view .LVU162 510 0098 10F40030 ands r0, r0, #131072 511 009c B8D0 beq .L25 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 512 .loc 1 563 19 view .LVU163 513 009e 4FF22440 movw r0, #62500 514 .LVL49: 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 515 .loc 1 582 3 is_stmt 1 view .LVU164 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 516 .loc 1 582 10 is_stmt 0 view .LVU165 517 00a2 B5E7 b .L25 518 .LVL50: 519 .L26: 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 520 .loc 1 574 7 is_stmt 1 view .LVU166 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 521 .loc 1 574 19 is_stmt 0 view .LVU167 522 00a4 FFF7FEFF bl HAL_RCC_GetPCLK2Freq 523 .LVL51: 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 524 .loc 1 574 47 view .LVU168 525 00a8 054B ldr r3, .L40 526 00aa 5B68 ldr r3, [r3, #4] 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 527 .loc 1 574 74 view .LVU169 528 00ac C3F38133 ubfx r3, r3, #14, #2 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 529 .loc 1 574 98 view .LVU170 530 00b0 0133 adds r3, r3, #1 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 531 .loc 1 574 103 view .LVU171 532 00b2 5B00 lsls r3, r3, #1 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** break; 533 .loc 1 574 17 view .LVU172 534 00b4 B0FBF3F0 udiv r0, r0, r3 ARM GAS /tmp/cc0P3ody.s page 22 535 .LVL52: 575:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 536 .loc 1 575 7 is_stmt 1 view .LVU173 537 00b8 AAE7 b .L25 538 .LVL53: 539 .L33: 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 540 .loc 1 554 19 is_stmt 0 view .LVU174 541 00ba 4FF40040 mov r0, #32768 542 .LVL54: 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c **** } 543 .loc 1 554 19 view .LVU175 544 00be A7E7 b .L25 545 .L41: 546 .align 2 547 .L40: 548 00c0 00100240 .word 1073876992 549 00c4 00000000 .word .LANCHOR0 550 00c8 00000000 .word .LANCHOR1 551 00cc 00127A00 .word 8000000 552 00d0 ABAAAAAA .word -1431655765 553 00d4 00093D00 .word 4000000 554 .cfi_endproc 555 .LFE67: 557 .section .rodata.aPLLMULFactorTable.1,"a" 558 .align 2 559 .set .LANCHOR0,. + 0 562 aPLLMULFactorTable.1: 563 0000 02030405 .ascii "\002\003\004\005\006\007\010\011\012\013\014\015\016" 563 06070809 563 0A0B0C0D 563 0E 564 000d 0F1010 .ascii "\017\020\020" 565 .section .rodata.aPredivFactorTable.0,"a" 566 .align 2 567 .set .LANCHOR1,. + 0 570 aPredivFactorTable.0: 571 0000 0102 .ascii "\001\002" 572 .text 573 .Letext0: 574 .file 2 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h" 575 .file 3 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h" 576 .file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h" 577 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h" 578 .file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h" 579 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h" 580 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h" 581 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h" ARM GAS /tmp/cc0P3ody.s page 23 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f1xx_hal_rcc_ex.c /tmp/cc0P3ody.s:18 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 $t /tmp/cc0P3ody.s:24 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 HAL_RCCEx_PeriphCLKConfig /tmp/cc0P3ody.s:281 .text.HAL_RCCEx_PeriphCLKConfig:000000000000010c $d /tmp/cc0P3ody.s:288 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 $t /tmp/cc0P3ody.s:294 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 HAL_RCCEx_GetPeriphCLKConfig /tmp/cc0P3ody.s:344 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000028 $d /tmp/cc0P3ody.s:349 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 $t /tmp/cc0P3ody.s:355 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 HAL_RCCEx_GetPeriphCLKFreq /tmp/cc0P3ody.s:548 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000000000c0 $d /tmp/cc0P3ody.s:558 .rodata.aPLLMULFactorTable.1:0000000000000000 $d /tmp/cc0P3ody.s:562 .rodata.aPLLMULFactorTable.1:0000000000000000 aPLLMULFactorTable.1 /tmp/cc0P3ody.s:566 .rodata.aPredivFactorTable.0:0000000000000000 $d /tmp/cc0P3ody.s:570 .rodata.aPredivFactorTable.0:0000000000000000 aPredivFactorTable.0 UNDEFINED SYMBOLS HAL_GetTick HAL_RCC_GetPCLK2Freq