ARM GAS /tmp/ccpMNREg.s page 1 1 .cpu cortex-m3 2 .arch armv7-m 3 .fpu softvfp 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f1xx_ll_dma.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.LL_DMA_DeInit,"ax",%progbits 18 .align 1 19 .global LL_DMA_DeInit 20 .syntax unified 21 .thumb 22 .thumb_func 24 LL_DMA_DeInit: 25 .LVL0: 26 .LFB172: 27 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c" 1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** 2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @file stm32f1xx_ll_dma.c 4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @brief DMA LL module driver. 6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ****************************************************************************** 7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @attention 8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * 9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * Copyright (c) 2016 STMicroelectronics. 10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * All rights reserved. 11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * 12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * This software is licensed under terms that can be found in the LICENSE file in 13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * the root directory of this software component. 14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * 16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ****************************************************************************** 17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #if defined(USE_FULL_LL_DRIVER) 20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Includes ------------------------------------------------------------------*/ 22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #include "stm32f1xx_ll_dma.h" 23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #include "stm32f1xx_ll_bus.h" 24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #ifdef USE_FULL_ASSERT 25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #include "stm32_assert.h" 26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #else 27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define assert_param(expr) ((void)0U) 28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #endif 29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** @addtogroup STM32F1xx_LL_Driver 31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @{ ARM GAS /tmp/ccpMNREg.s page 2 32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #if defined (DMA1) || defined (DMA2) 35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** @defgroup DMA_LL DMA 37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @{ 38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Private constants ---------------------------------------------------------*/ 43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Private macros ------------------------------------------------------------*/ 44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** @addtogroup DMA_LL_Private_Macros 45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @{ 46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_DIRECTION(__VALUE__) (((__VALUE__) == LL_DMA_DIRECTION_PERIPH_TO_MEMORY) 48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) 49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_DIRECTION_MEMORY_TO_MEMORY) 50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_MODE(__VALUE__) (((__VALUE__) == LL_DMA_MODE_NORMAL) || \ 52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_MODE_CIRCULAR)) 53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_PERIPHINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_PERIPH_INCREMENT) || \ 55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PERIPH_NOINCREMENT)) 56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_MEMORYINCMODE(__VALUE__) (((__VALUE__) == LL_DMA_MEMORY_INCREMENT) || \ 58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_MEMORY_NOINCREMENT)) 59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_PERIPHDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_PDATAALIGN_BYTE) || \ 61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PDATAALIGN_HALFWORD) || \ 62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PDATAALIGN_WORD)) 63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_MEMORYDATASIZE(__VALUE__) (((__VALUE__) == LL_DMA_MDATAALIGN_BYTE) || \ 65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_MDATAALIGN_HALFWORD) || \ 66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_MDATAALIGN_WORD)) 67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_NBDATA(__VALUE__) ((__VALUE__) <= 0x0000FFFFU) 69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_PRIORITY(__VALUE__) (((__VALUE__) == LL_DMA_PRIORITY_LOW) || \ 71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PRIORITY_MEDIUM) || \ 72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PRIORITY_HIGH) || \ 73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((__VALUE__) == LL_DMA_PRIORITY_VERYHIGH)) 74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #if defined (DMA2) 76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \ 77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** (((CHANNEL) == LL_DMA_CHANNEL_1) || \ 78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_2) || \ 79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_3) || \ 80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_4) || \ 81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_5) || \ 82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_6) || \ 83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_7))) || \ 84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** (((INSTANCE) == DMA2) && \ 85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** (((CHANNEL) == LL_DMA_CHANNEL_1) || \ 86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_2) || \ 87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_3) || \ 88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_4) || \ ARM GAS /tmp/ccpMNREg.s page 3 89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_5)))) 90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #else 91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #define IS_LL_DMA_ALL_CHANNEL_INSTANCE(INSTANCE, CHANNEL) ((((INSTANCE) == DMA1) && \ 92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** (((CHANNEL) == LL_DMA_CHANNEL_1) || \ 93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_2) || \ 94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_3) || \ 95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_4) || \ 96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_5) || \ 97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_6) || \ 98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ((CHANNEL) == LL_DMA_CHANNEL_7)))) 99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** #endif 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @} 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Private function prototypes -----------------------------------------------*/ 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Exported functions --------------------------------------------------------*/ 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** @addtogroup DMA_LL_Exported_Functions 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @{ 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** @addtogroup DMA_LL_EF_Init 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @{ 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @brief De-initialize the DMA registers to their default reset values. 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param DMAx DMAx Instance 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param Channel This parameter can be one of the following values: 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_1 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_2 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_3 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_4 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_5 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_6 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_7 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @retval An ErrorStatus enumeration value: 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - SUCCESS: DMA registers are de-initialized 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - ERROR: DMA registers are not de-initialized 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel) 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 28 .loc 1 130 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 0 31 @ frame_needed = 0, uses_anonymous_args = 0 32 @ link register save eliminated. 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_Channel_TypeDef *tmp = (DMA_Channel_TypeDef *)DMA1_Channel1; 33 .loc 1 131 3 view .LVU1 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** ErrorStatus status = SUCCESS; 34 .loc 1 132 3 view .LVU2 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Check the DMA Instance DMAx and Channel parameters*/ 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel)); 35 .loc 1 135 3 view .LVU3 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** tmp = (DMA_Channel_TypeDef *)(__LL_DMA_GET_CHANNEL_INSTANCE(DMAx, Channel)); ARM GAS /tmp/ccpMNREg.s page 4 36 .loc 1 137 3 view .LVU4 37 .loc 1 137 9 is_stmt 0 view .LVU5 38 0000 334B ldr r3, .L36 39 0002 9842 cmp r0, r3 40 0004 28D0 beq .L23 41 .L2: 42 .loc 1 137 33 discriminator 3 view .LVU6 43 0006 324B ldr r3, .L36 44 0008 9842 cmp r0, r3 45 000a 29D0 beq .L24 46 .L4: 47 .loc 1 137 33 discriminator 7 view .LVU7 48 000c 304B ldr r3, .L36 49 000e 9842 cmp r0, r3 50 0010 2AD0 beq .L25 51 .L5: 52 .loc 1 137 33 discriminator 11 view .LVU8 53 0012 2F4B ldr r3, .L36 54 0014 9842 cmp r0, r3 55 0016 2BD0 beq .L26 56 .L6: 57 .loc 1 137 33 discriminator 15 view .LVU9 58 0018 2D4B ldr r3, .L36 59 001a 9842 cmp r0, r3 60 001c 2CD0 beq .L27 61 .L7: 62 .loc 1 137 33 discriminator 19 view .LVU10 63 001e 2C4B ldr r3, .L36 64 0020 9842 cmp r0, r3 65 0022 2DD0 beq .L28 66 .loc 1 137 33 view .LVU11 67 0024 2B4B ldr r3, .L36+4 68 .L3: 69 .LVL1: 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Disable the selected DMAx_Channely */ 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** CLEAR_BIT(tmp->CCR, DMA_CCR_EN); 70 .loc 1 140 3 is_stmt 1 discriminator 36 view .LVU12 71 0026 1A68 ldr r2, [r3] 72 0028 22F00102 bic r2, r2, #1 73 002c 1A60 str r2, [r3] 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset DMAx_Channely control register */ 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_WriteReg(tmp, CCR, 0U); 74 .loc 1 143 3 discriminator 36 view .LVU13 75 002e 0022 movs r2, #0 76 0030 1A60 str r2, [r3] 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset DMAx_Channely remaining bytes register */ 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_WriteReg(tmp, CNDTR, 0U); 77 .loc 1 146 3 discriminator 36 view .LVU14 78 0032 5A60 str r2, [r3, #4] 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset DMAx_Channely peripheral address register */ 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_WriteReg(tmp, CPAR, 0U); 79 .loc 1 149 3 discriminator 36 view .LVU15 80 0034 9A60 str r2, [r3, #8] ARM GAS /tmp/ccpMNREg.s page 5 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset DMAx_Channely memory address register */ 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_WriteReg(tmp, CMAR, 0U); 81 .loc 1 152 3 discriminator 36 view .LVU16 82 0036 DA60 str r2, [r3, #12] 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** if (Channel == LL_DMA_CHANNEL_1) 83 .loc 1 154 3 discriminator 36 view .LVU17 84 .loc 1 154 6 is_stmt 0 discriminator 36 view .LVU18 85 0038 0129 cmp r1, #1 86 003a 27D0 beq .L29 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel1 */ 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI1(DMAx); 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_2) 87 .loc 1 159 8 is_stmt 1 view .LVU19 88 .loc 1 159 11 is_stmt 0 view .LVU20 89 003c 0229 cmp r1, #2 90 003e 29D0 beq .L30 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel2 */ 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI2(DMAx); 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_3) 91 .loc 1 164 8 is_stmt 1 view .LVU21 92 .loc 1 164 11 is_stmt 0 view .LVU22 93 0040 0329 cmp r1, #3 94 0042 2BD0 beq .L31 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel3 */ 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI3(DMAx); 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_4) 95 .loc 1 169 8 is_stmt 1 view .LVU23 96 .loc 1 169 11 is_stmt 0 view .LVU24 97 0044 0429 cmp r1, #4 98 0046 2ED0 beq .L32 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel4 */ 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI4(DMAx); 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_5) 99 .loc 1 174 8 is_stmt 1 view .LVU25 100 .loc 1 174 11 is_stmt 0 view .LVU26 101 0048 0529 cmp r1, #5 102 004a 31D0 beq .L33 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel5 */ 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI5(DMAx); 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_6) 103 .loc 1 180 8 is_stmt 1 view .LVU27 104 .loc 1 180 11 is_stmt 0 view .LVU28 105 004c 0629 cmp r1, #6 106 004e 34D0 beq .L34 ARM GAS /tmp/ccpMNREg.s page 6 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel6 */ 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI6(DMAx); 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else if (Channel == LL_DMA_CHANNEL_7) 107 .loc 1 185 8 is_stmt 1 view .LVU29 108 .loc 1 185 11 is_stmt 0 view .LVU30 109 0050 0729 cmp r1, #7 110 0052 37D0 beq .L35 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Reset interrupt pending bits for DMAx Channel7 */ 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ClearFlag_GI7(DMAx); 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** else 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** status = ERROR; 111 .loc 1 192 12 view .LVU31 112 0054 0120 movs r0, #1 113 .LVL2: 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** return status; 114 .loc 1 195 3 is_stmt 1 view .LVU32 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 115 .loc 1 196 1 is_stmt 0 view .LVU33 116 0056 7047 bx lr 117 .LVL3: 118 .L23: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 119 .loc 1 137 33 discriminator 2 view .LVU34 120 0058 0129 cmp r1, #1 121 005a D4D1 bne .L2 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 122 .loc 1 137 9 view .LVU35 123 005c 1E4B ldr r3, .L36+8 124 005e E2E7 b .L3 125 .L24: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 126 .loc 1 137 33 discriminator 6 view .LVU36 127 0060 0229 cmp r1, #2 128 0062 D3D1 bne .L4 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 129 .loc 1 137 33 view .LVU37 130 0064 1D4B ldr r3, .L36+12 131 0066 DEE7 b .L3 132 .L25: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 133 .loc 1 137 33 discriminator 10 view .LVU38 134 0068 0329 cmp r1, #3 135 006a D2D1 bne .L5 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 136 .loc 1 137 33 view .LVU39 137 006c 1C4B ldr r3, .L36+16 138 006e DAE7 b .L3 139 .L26: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 140 .loc 1 137 33 discriminator 14 view .LVU40 ARM GAS /tmp/ccpMNREg.s page 7 141 0070 0429 cmp r1, #4 142 0072 D1D1 bne .L6 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 143 .loc 1 137 33 view .LVU41 144 0074 1B4B ldr r3, .L36+20 145 0076 D6E7 b .L3 146 .L27: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 147 .loc 1 137 33 discriminator 18 view .LVU42 148 0078 0529 cmp r1, #5 149 007a D0D1 bne .L7 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 150 .loc 1 137 33 view .LVU43 151 007c 1A4B ldr r3, .L36+24 152 007e D2E7 b .L3 153 .L28: 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 154 .loc 1 137 33 discriminator 21 view .LVU44 155 0080 0629 cmp r1, #6 156 0082 01D0 beq .L21 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 157 .loc 1 137 33 view .LVU45 158 0084 8033 adds r3, r3, #128 159 0086 CEE7 b .L3 160 .L21: 161 0088 184B ldr r3, .L36+28 162 008a CCE7 b .L3 163 .LVL4: 164 .L29: 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 165 .loc 1 157 5 is_stmt 1 view .LVU46 166 .LBB24: 167 .LBI24: 168 .file 2 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h" 1:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 2:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @file stm32f1xx_ll_dma.h 4:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Header file of DMA LL module. 6:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ****************************************************************************** 7:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @attention 8:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * 9:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * Copyright (c) 2016 STMicroelectronics. 10:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * All rights reserved. 11:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * 12:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * This software is licensed under terms that can be found in the LICENSE file in 13:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * the root directory of this software component. 14:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * 16:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ****************************************************************************** 17:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 18:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 19:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #ifndef __STM32F1xx_LL_DMA_H 21:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __STM32F1xx_LL_DMA_H 22:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 23:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #ifdef __cplusplus ARM GAS /tmp/ccpMNREg.s page 8 24:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** extern "C" { 25:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif 26:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 27:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #include "stm32f1xx.h" 29:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 30:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @addtogroup STM32F1xx_LL_Driver 31:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 32:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 33:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 34:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined (DMA1) || defined (DMA2) 35:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 36:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL DMA 37:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 38:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 39:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 40:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Variables DMA Private Variables 43:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 44:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 45:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */ 46:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** static const uint8_t CHANNEL_OFFSET_TAB[] = 47:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 48:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel1_BASE - DMA1_BASE), 49:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE), 50:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel3_BASE - DMA1_BASE), 51:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel4_BASE - DMA1_BASE), 52:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE), 53:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel6_BASE - DMA1_BASE), 54:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE) 55:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** }; 56:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 57:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 58:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 59:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Private constants ---------------------------------------------------------*/ 60:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Private macros ------------------------------------------------------------*/ 61:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) 62:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Macros DMA Private Macros 63:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 64:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 65:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 66:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 67:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 68:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif /*USE_FULL_LL_DRIVER*/ 69:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 70:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Exported types ------------------------------------------------------------*/ 71:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) 72:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_ES_INIT DMA Exported Init structure 73:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 74:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 75:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** typedef struct 76:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 77:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer 78:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** or as Source base address in case of memory to memory trans 79:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 80:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max ARM GAS /tmp/ccpMNREg.s page 9 81:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 82:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer 83:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** or as Destination base address in case of memory to memory 84:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 85:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max 86:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 87:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t Direction; /*!< Specifies if the data will be transferred from memory to pe 88:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** from memory to memory or from peripheral to memory. 89:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_DIRECTION 90:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 91:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 92:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 93:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t Mode; /*!< Specifies the normal or circular operation mode. 94:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MODE 95:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** @note: The circular buffer mode cannot be used if the memor 96:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** data transfer direction is configured on the selecte 97:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 98:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 99:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address 101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** is incremented or not. 102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PERIPH 103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address 107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** is incremented or not. 108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MEMORY 109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data 113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** in case of memory to memory transfer direction. 114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN 115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination dat 119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** in case of memory to memory transfer direction. 120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN 121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit. 125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** The data unit is equal to the source buffer configuration s 126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** or MemorySize parameters depending in the transfer directio 127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max 128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t Priority; /*!< Specifies the channel priority level. 132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PRIORITY 133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } LL_DMA_InitTypeDef; 137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** ARM GAS /tmp/ccpMNREg.s page 10 138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif /*USE_FULL_LL_DRIVER*/ 141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Exported constants --------------------------------------------------------*/ 143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Constants DMA Exported Constants 144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines 147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Flags defines which can be used with LL_DMA_WriteReg function 148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /*!< Channel 1 global flag 151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 /*!< Channel 1 transfer complete fl 152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 /*!< Channel 1 half transfer flag 153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 /*!< Channel 1 transfer error flag 154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 /*!< Channel 2 global flag 155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 /*!< Channel 2 transfer complete fl 156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 /*!< Channel 2 half transfer flag 157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 /*!< Channel 2 transfer error flag 158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 /*!< Channel 3 global flag 159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 /*!< Channel 3 transfer complete fl 160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 /*!< Channel 3 half transfer flag 161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 /*!< Channel 3 transfer error flag 162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 /*!< Channel 4 global flag 163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 /*!< Channel 4 transfer complete fl 164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 /*!< Channel 4 half transfer flag 165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 /*!< Channel 4 transfer error flag 166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 /*!< Channel 5 global flag 167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 /*!< Channel 5 transfer complete fl 168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 /*!< Channel 5 half transfer flag 169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 /*!< Channel 5 transfer error flag 170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 /*!< Channel 6 global flag 171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 /*!< Channel 6 transfer complete fl 172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 /*!< Channel 6 half transfer flag 173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 /*!< Channel 6 transfer error flag 174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 /*!< Channel 7 global flag 175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 /*!< Channel 7 transfer complete fl 176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 /*!< Channel 7 half transfer flag 177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 /*!< Channel 7 transfer error flag 178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines 183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Flags defines which can be used with LL_DMA_ReadReg function 184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 /*!< Channel 1 global flag 187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 /*!< Channel 1 transfer complete fl 188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 /*!< Channel 1 half transfer flag 189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 /*!< Channel 1 transfer error flag 190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 /*!< Channel 2 global flag 191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 /*!< Channel 2 transfer complete fl 192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 /*!< Channel 2 half transfer flag 193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 /*!< Channel 2 transfer error flag 194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 /*!< Channel 3 global flag ARM GAS /tmp/ccpMNREg.s page 11 195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 /*!< Channel 3 transfer complete fl 196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 /*!< Channel 3 half transfer flag 197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 /*!< Channel 3 transfer error flag 198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 /*!< Channel 4 global flag 199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 /*!< Channel 4 transfer complete fl 200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 /*!< Channel 4 half transfer flag 201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 /*!< Channel 4 transfer error flag 202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 /*!< Channel 5 global flag 203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 /*!< Channel 5 transfer complete fl 204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 /*!< Channel 5 half transfer flag 205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 /*!< Channel 5 transfer error flag 206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 /*!< Channel 6 global flag 207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 /*!< Channel 6 transfer complete fl 208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 /*!< Channel 6 half transfer flag 209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 /*!< Channel 6 transfer error flag 210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 /*!< Channel 7 global flag 211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 /*!< Channel 7 transfer complete fl 212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 /*!< Channel 7 half transfer flag 213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 /*!< Channel 7 transfer error flag 214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_IT IT Defines 219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions 220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CCR_TCIE DMA_CCR_TCIE /*!< Transfer complete interrupt */ 223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */ 224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CCR_TEIE DMA_CCR_TEIE /*!< Transfer error interrupt */ 225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CHANNEL CHANNEL 230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_1 0x00000001U /*!< DMA Channel 1 */ 233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_2 0x00000002U /*!< DMA Channel 2 */ 234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_3 0x00000003U /*!< DMA Channel 3 */ 235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_4 0x00000004U /*!< DMA Channel 4 */ 236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_5 0x00000005U /*!< DMA Channel 5 */ 237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_6 0x00000006U /*!< DMA Channel 6 */ 238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_7 0x00000007U /*!< DMA Channel 7 */ 239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined(USE_FULL_LL_DRIVER) 240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_CHANNEL_ALL 0xFFFF0000U /*!< DMA Channel all (used only for function 241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif /*USE_FULL_LL_DRIVER*/ 242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_DIRECTION Transfer Direction 247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory directi 250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /*!< Memory to peripheral directi 251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /*!< Memory to memory direction ARM GAS /tmp/ccpMNREg.s page 12 252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MODE Transfer mode 257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MODE_NORMAL 0x00000000U /*!< Normal Mode 260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /*!< Circular Mode 261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode 266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /*!< Peripheral increment mode En 269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PERIPH_NOINCREMENT 0x00000000U /*!< Peripheral increment mode Di 270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MEMORY Memory increment mode 275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /*!< Memory increment mode Enable 278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MEMORY_NOINCREMENT 0x00000000U /*!< Memory increment mode Disabl 279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment 284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_BYTE 0x00000000U /*!< Peripheral data alignment : 287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : 288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /*!< Peripheral data alignment : 289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment 294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : Byte 297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /*!< Memory data alignment : Half 298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /*!< Memory data alignment : Word 299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level 304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low * 307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /*!< Priority level : Medium * 308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /*!< Priority level : High * ARM GAS /tmp/ccpMNREg.s page 13 309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /*!< Priority level : Very_High * 310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Exported macro ------------------------------------------------------------*/ 319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Macros DMA Exported Macros 320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros 324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Write a value in DMA register 328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance 329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __REG__ Register to be written 330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __VALUE__ Value to be written in the register 331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Read a value in DMA register 337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance 338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __REG__ Register to be read 339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Register value 340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) 342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely 347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Convert DMAx_Channely into DMAx 352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __CHANNEL_INSTANCE__ DMAx_Channely 353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval DMAx 354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined(DMA2) 356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) \ 357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ? DMA2 : DMA1) 358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #else 359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1) 360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif 361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y 364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __CHANNEL_INSTANCE__ DMAx_Channely 365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y ARM GAS /tmp/ccpMNREg.s page 14 366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined (DMA2) 368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ 369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \ 370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel1)) ? LL_DMA_CHANNEL_1 : \ 371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \ 372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel2)) ? LL_DMA_CHANNEL_2 : \ 373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \ 374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel3)) ? LL_DMA_CHANNEL_3 : \ 375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \ 376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel4)) ? LL_DMA_CHANNEL_4 : \ 377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \ 378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel5)) ? LL_DMA_CHANNEL_5 : \ 379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \ 380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** LL_DMA_CHANNEL_7) 381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #else 382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ 383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \ 384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \ 385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \ 386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \ 387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \ 388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \ 389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** LL_DMA_CHANNEL_7) 390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif 391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely 394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __DMA_INSTANCE__ DMAx 395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param __CHANNEL__ LL_DMA_CHANNEL_y 396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval DMAx_Channely 397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #if defined (DMA2) 399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \ 400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA1_Channel7) 412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #else 413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \ 414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_D 420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA1_Channel7) 421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** #endif 422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** ARM GAS /tmp/ccpMNREg.s page 15 423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Exported functions --------------------------------------------------------*/ 432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions 433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration 437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Enable DMA channel. 441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR EN LL_DMA_EnableChannel 442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) 454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))- 456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Disable DMA channel. 460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR EN LL_DMA_DisableChannel 461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) 473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])) 475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Check if DMA channel is enabled or disabled. 479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR EN LL_DMA_IsEnabledChannel ARM GAS /tmp/ccpMNREg.s page 16 480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) 492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_EN) == (DMA_CCR_EN)); 495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Configure all parameters link to DMA transfer. 499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR DIR LL_DMA_ConfigTransfer\n 500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR MEM2MEM LL_DMA_ConfigTransfer\n 501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR CIRC LL_DMA_ConfigTransfer\n 502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR PINC LL_DMA_ConfigTransfer\n 503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR MINC LL_DMA_ConfigTransfer\n 504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR PSIZE LL_DMA_ConfigTransfer\n 505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR MSIZE LL_DMA_ConfigTransfer\n 506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR PL LL_DMA_ConfigTransfer 507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Configuration This parameter must be a combination of all the following values: 517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH o 518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR 519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT 520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT 521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDAT 522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDAT 523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HI 524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configurat 527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** Configuration); 531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Data transfer direction (read from peripheral or from memory). 535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n 536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR MEM2MEM LL_DMA_SetDataTransferDirection ARM GAS /tmp/ccpMNREg.s page 17 537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Direction This parameter can be one of the following values: 547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY 548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH 549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY 550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t 553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction); 556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory). 560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n 561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CCR MEM2MEM LL_DMA_GetDataTransferDirection 562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY 573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH 574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY 575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) 577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM)); 580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set DMA mode circular or normal. 584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note The circular buffer mode cannot be used if the memory-to-memory 585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * data transfer is configured on the selected Channel. 586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR CIRC LL_DMA_SetMode 587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 ARM GAS /tmp/ccpMNREg.s page 18 594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Mode This parameter can be one of the following values: 597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) 602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** Mode); 605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get DMA mode circular or normal. 609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR CIRC LL_DMA_GetMode 610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_NORMAL 621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MODE_CIRCULAR 622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) 624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_CIRC)); 627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Peripheral increment mode. 631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PINC LL_DMA_SetPeriphIncMode 632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param PeriphOrM2MSrcIncMode This parameter can be one of the following values: 642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT 643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOr 647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** PeriphOrM2MSrcIncMode); 650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } ARM GAS /tmp/ccpMNREg.s page 19 651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Peripheral increment mode. 654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PINC LL_DMA_GetPeriphIncMode 655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT 666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT 667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) 669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_PINC)); 672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Memory increment mode. 676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR MINC LL_DMA_SetMemoryIncMode 677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param MemoryOrM2MDstIncMode This parameter can be one of the following values: 687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT 688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT 689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOr 692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MemoryOrM2MDstIncMode); 695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Memory increment mode. 699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR MINC LL_DMA_GetMemoryIncMode 700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 ARM GAS /tmp/ccpMNREg.s page 20 708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_INCREMENT 711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MEMORY_NOINCREMENT 712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) 714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_MINC)); 717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Peripheral size. 721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PSIZE LL_DMA_SetPeriphSize 722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param PeriphOrM2MSrcDataSize This parameter can be one of the following values: 732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD 735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2M 738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** PeriphOrM2MSrcDataSize); 741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Peripheral size. 745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PSIZE LL_DMA_GetPeriphSize 746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_BYTE 757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD 758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD 759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) 761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_PSIZE)); 764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } ARM GAS /tmp/ccpMNREg.s page 21 765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Memory size. 768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR MSIZE LL_DMA_SetMemorySize 769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param MemoryOrM2MDstDataSize This parameter can be one of the following values: 779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE 780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_HALFWORD 781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD 782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2M 785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MemoryOrM2MDstDataSize); 788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Memory size. 792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR MSIZE LL_DMA_GetMemorySize 793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE 804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_HALFWORD 805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD 806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) 808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_MSIZE)); 811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Channel priority level. 815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel 816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 ARM GAS /tmp/ccpMNREg.s page 22 822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Priority This parameter can be one of the following values: 826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH 830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t P 833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** Priority); 836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel priority level. 840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel 841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Returned value can be one of the following values: 851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM 853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH 855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) 857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_PL)); 860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set Number of data to transfer. 864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This action has no effect if 865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * channel is enabled. 866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CNDTR NDT LL_DMA_SetDataLength 867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF 877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ ARM GAS /tmp/ccpMNREg.s page 23 879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) 880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U]) 882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CNDTR_NDT, NbData); 883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Number of data to transfer. 887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Once the channel is enabled, the return value indicate the 888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * remaining bytes to be transmitted. 889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CNDTR NDT LL_DMA_GetDataLength 890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) 902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CNDTR_NDT)); 905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Configure the Source and Destination addresses. 909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Each IP using DMA provides an API to get directly the register address (LL_PPP_DMA_GetR 911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CPAR PA LL_DMA_ConfigAddresses\n 912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * CMAR MA LL_DMA_ConfigAddresses 913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Direction This parameter can be one of the following values: 925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY 926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH 927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY 928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddres 931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** uint32_t DstAddress, uint32_t Direction) 932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Direction Memory to Periph */ 934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) 935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { ARM GAS /tmp/ccpMNREg.s page 24 936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U] 937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U] 938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /* Direction Periph to Memory and Memory to Memory */ 940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** else 941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U] 943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U] 944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set the Memory address. 949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CMAR MA LL_DMA_SetMemoryAddress 952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd 965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])) 967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set the Peripheral address. 971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CPAR PA LL_DMA_SetPeriphAddress 974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAd 987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])) 989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Memory address. ARM GAS /tmp/ccpMNREg.s page 25 993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CMAR MA LL_DMA_GetMemoryAddress 995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel) 1007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 1009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Peripheral address. 1013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO 1014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CPAR PA LL_DMA_GetPeriphAddress 1015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel) 1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 1029:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1030:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1031:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1032:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set the Memory to Memory Source address. 1033:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1034:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 1035:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress 1036:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1037:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1038:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1039:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1040:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1041:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1042:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1043:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1044:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1045:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1046:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1047:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1048:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd 1049:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { ARM GAS /tmp/ccpMNREg.s page 26 1050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])) 1051:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1053:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1054:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address. 1055:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1056:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled. 1057:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CMAR MA LL_DMA_SetM2MDstAddress 1058:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1059:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1060:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1061:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1062:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1063:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1064:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1065:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1066:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1067:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1068:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1069:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1070:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAd 1071:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1072:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])) 1073:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1074:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1075:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1076:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get the Memory to Memory Source address. 1077:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1078:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress 1079:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1080:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1081:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1082:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1083:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1084:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1085:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1086:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1087:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1088:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1089:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1090:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel) 1091:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1092:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 1093:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1094:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1095:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get the Memory to Memory Destination address. 1097:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. 1098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll CMAR MA LL_DMA_GetM2MDstAddress 1099:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param Channel This parameter can be one of the following values: 1101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_1 1102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_2 1103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3 1104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4 1105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 ARM GAS /tmp/ccpMNREg.s page 27 1107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 1108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF 1109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel) 1111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel 1113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @} 1117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management 1120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @{ 1121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 1 global interrupt flag. 1125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1 1126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx) 1130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)); 1132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 2 global interrupt flag. 1136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2 1137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx) 1141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)); 1143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 3 global interrupt flag. 1147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3 1148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx) 1152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)); 1154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 4 global interrupt flag. 1158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4 1159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx) 1163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { ARM GAS /tmp/ccpMNREg.s page 28 1164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)); 1165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 5 global interrupt flag. 1169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5 1170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx) 1174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)); 1176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 6 global interrupt flag. 1180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6 1181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx) 1185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)); 1187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 7 global interrupt flag. 1191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7 1192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx) 1196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)); 1198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 1 transfer complete flag. 1202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1 1203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx) 1207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)); 1209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 2 transfer complete flag. 1213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2 1214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx) 1218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)); 1220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } ARM GAS /tmp/ccpMNREg.s page 29 1221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 3 transfer complete flag. 1224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3 1225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx) 1229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3)); 1231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 4 transfer complete flag. 1235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4 1236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) 1240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4)); 1242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 5 transfer complete flag. 1246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5 1247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx) 1251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5)); 1253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 6 transfer complete flag. 1257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6 1258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx) 1262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6)); 1264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 7 transfer complete flag. 1268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7 1269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx) 1273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7)); 1275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** ARM GAS /tmp/ccpMNREg.s page 30 1278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 1 half transfer flag. 1279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1 1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) 1284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1)); 1286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 2 half transfer flag. 1290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2 1291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx) 1295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2)); 1297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 3 half transfer flag. 1301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3 1302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx) 1306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3)); 1308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 4 half transfer flag. 1312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4 1313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx) 1317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4)); 1319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 5 half transfer flag. 1323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5 1324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx) 1328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5)); 1330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 6 half transfer flag. 1334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6 ARM GAS /tmp/ccpMNREg.s page 31 1335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx) 1339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6)); 1341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 7 half transfer flag. 1345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7 1346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx) 1350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7)); 1352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 1 transfer error flag. 1356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1 1357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) 1361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1)); 1363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 2 transfer error flag. 1367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2 1368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx) 1372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2)); 1374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 3 transfer error flag. 1378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3 1379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx) 1383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3)); 1385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 4 transfer error flag. 1389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4 1390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). ARM GAS /tmp/ccpMNREg.s page 32 1392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx) 1394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4)); 1396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 5 transfer error flag. 1400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5 1401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx) 1405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5)); 1407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 6 transfer error flag. 1411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6 1412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) 1416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6)); 1418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Get Channel 7 transfer error flag. 1422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7 1423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval State of bit (1 or 0). 1425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx) 1427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7)); 1429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 1430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 1 global interrupt flag. 1433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1 1434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx) 169 .loc 2 1437 22 view .LVU47 170 .LBB25: 1438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); 171 .loc 2 1439 3 view .LVU48 172 008c 0123 movs r3, #1 173 .LVL5: 174 .loc 2 1439 3 is_stmt 0 view .LVU49 175 008e 4360 str r3, [r0, #4] 176 .LBE25: 177 .LBE24: ARM GAS /tmp/ccpMNREg.s page 33 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 178 .loc 1 132 15 view .LVU50 179 0090 1046 mov r0, r2 180 .LVL6: 181 .LBB27: 182 .LBB26: 1440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 183 .loc 2 1440 1 view .LVU51 184 0092 7047 bx lr 185 .LVL7: 186 .L30: 187 .loc 2 1440 1 view .LVU52 188 .LBE26: 189 .LBE27: 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 190 .loc 1 162 5 is_stmt 1 view .LVU53 191 .LBB28: 192 .LBI28: 1441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 2 global interrupt flag. 1444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2 1445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx) 193 .loc 2 1448 22 view .LVU54 194 .LBB29: 1449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); 195 .loc 2 1450 3 view .LVU55 196 0094 1023 movs r3, #16 197 .LVL8: 198 .loc 2 1450 3 is_stmt 0 view .LVU56 199 0096 4360 str r3, [r0, #4] 200 .LBE29: 201 .LBE28: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 202 .loc 1 132 15 view .LVU57 203 0098 0020 movs r0, #0 204 .LVL9: 205 .LBB31: 206 .LBB30: 1451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 207 .loc 2 1451 1 view .LVU58 208 009a 7047 bx lr 209 .LVL10: 210 .L31: 211 .loc 2 1451 1 view .LVU59 212 .LBE30: 213 .LBE31: 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 214 .loc 1 167 5 is_stmt 1 view .LVU60 215 .LBB32: 216 .LBI32: 1452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** ARM GAS /tmp/ccpMNREg.s page 34 1454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 3 global interrupt flag. 1455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3 1456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx) 217 .loc 2 1459 22 view .LVU61 218 .LBB33: 1460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); 219 .loc 2 1461 3 view .LVU62 220 009c 4FF48073 mov r3, #256 221 .LVL11: 222 .loc 2 1461 3 is_stmt 0 view .LVU63 223 00a0 4360 str r3, [r0, #4] 224 .LBE33: 225 .LBE32: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 226 .loc 1 132 15 view .LVU64 227 00a2 0020 movs r0, #0 228 .LVL12: 229 .LBB35: 230 .LBB34: 1462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 231 .loc 2 1462 1 view .LVU65 232 00a4 7047 bx lr 233 .LVL13: 234 .L32: 235 .loc 2 1462 1 view .LVU66 236 .LBE34: 237 .LBE35: 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 238 .loc 1 172 5 is_stmt 1 view .LVU67 239 .LBB36: 240 .LBI36: 1463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 4 global interrupt flag. 1466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4 1467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx) 241 .loc 2 1470 22 view .LVU68 242 .LBB37: 1471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); 243 .loc 2 1472 3 view .LVU69 244 00a6 4FF48053 mov r3, #4096 245 .LVL14: 246 .loc 2 1472 3 is_stmt 0 view .LVU70 247 00aa 4360 str r3, [r0, #4] 248 .LBE37: 249 .LBE36: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 250 .loc 1 132 15 view .LVU71 251 00ac 0020 movs r0, #0 ARM GAS /tmp/ccpMNREg.s page 35 252 .LVL15: 253 .LBB39: 254 .LBB38: 1473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 255 .loc 2 1473 1 view .LVU72 256 00ae 7047 bx lr 257 .LVL16: 258 .L33: 259 .loc 2 1473 1 view .LVU73 260 .LBE38: 261 .LBE39: 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 262 .loc 1 177 5 is_stmt 1 view .LVU74 263 .LBB40: 264 .LBI40: 1474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 5 global interrupt flag. 1477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5 1478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx) 265 .loc 2 1481 22 view .LVU75 266 .LBB41: 1482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); 267 .loc 2 1483 3 view .LVU76 268 00b0 4FF48033 mov r3, #65536 269 .LVL17: 270 .loc 2 1483 3 is_stmt 0 view .LVU77 271 00b4 4360 str r3, [r0, #4] 272 .LBE41: 273 .LBE40: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 274 .loc 1 132 15 view .LVU78 275 00b6 0020 movs r0, #0 276 .LVL18: 277 .LBB43: 278 .LBB42: 1484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 279 .loc 2 1484 1 view .LVU79 280 00b8 7047 bx lr 281 .LVL19: 282 .L34: 283 .loc 2 1484 1 view .LVU80 284 .LBE42: 285 .LBE43: 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 286 .loc 1 183 5 is_stmt 1 view .LVU81 287 .LBB44: 288 .LBI44: 1485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 6 global interrupt flag. 1488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6 1489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance ARM GAS /tmp/ccpMNREg.s page 36 1490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx) 289 .loc 2 1492 22 view .LVU82 290 .LBB45: 1493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); 291 .loc 2 1494 3 view .LVU83 292 00ba 4FF48013 mov r3, #1048576 293 .LVL20: 294 .loc 2 1494 3 is_stmt 0 view .LVU84 295 00be 4360 str r3, [r0, #4] 296 .LBE45: 297 .LBE44: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 298 .loc 1 132 15 view .LVU85 299 00c0 0020 movs r0, #0 300 .LVL21: 301 .LBB47: 302 .LBB46: 1495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 303 .loc 2 1495 1 view .LVU86 304 00c2 7047 bx lr 305 .LVL22: 306 .L35: 307 .loc 2 1495 1 view .LVU87 308 .LBE46: 309 .LBE47: 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 310 .loc 1 188 5 is_stmt 1 view .LVU88 311 .LBB48: 312 .LBI48: 1496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** 1497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** /** 1498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @brief Clear Channel 7 global interrupt flag. 1499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7 1500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @param DMAx DMAx Instance 1501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** * @retval None 1502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** */ 1503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx) 313 .loc 2 1503 22 view .LVU89 314 .LBB49: 1504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 1505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); 315 .loc 2 1505 3 view .LVU90 316 00c4 4FF08073 mov r3, #16777216 317 .LVL23: 318 .loc 2 1505 3 is_stmt 0 view .LVU91 319 00c8 4360 str r3, [r0, #4] 320 .LBE49: 321 .LBE48: 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 322 .loc 1 132 15 view .LVU92 323 00ca 0020 movs r0, #0 324 .LVL24: 325 .LBB51: 326 .LBB50: ARM GAS /tmp/ccpMNREg.s page 37 1506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 327 .loc 2 1506 1 view .LVU93 328 00cc 7047 bx lr 329 .L37: 330 00ce 00BF .align 2 331 .L36: 332 00d0 00000240 .word 1073872896 333 00d4 80000240 .word 1073873024 334 00d8 08000240 .word 1073872904 335 00dc 1C000240 .word 1073872924 336 00e0 30000240 .word 1073872944 337 00e4 44000240 .word 1073872964 338 00e8 58000240 .word 1073872984 339 00ec 6C000240 .word 1073873004 340 .LBE50: 341 .LBE51: 342 .cfi_endproc 343 .LFE172: 345 .section .text.LL_DMA_Init,"ax",%progbits 346 .align 1 347 .global LL_DMA_Init 348 .syntax unified 349 .thumb 350 .thumb_func 352 LL_DMA_Init: 353 .LVL25: 354 .LFB173: 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @brief Initialize the DMA registers according to the specified parameters in DMA_InitStruct. 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @note To convert DMAx_Channely Instance to DMAx Instance and Channely, use helper macros : 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref __LL_DMA_GET_INSTANCE 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref __LL_DMA_GET_CHANNEL 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param DMAx DMAx Instance 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param Channel This parameter can be one of the following values: 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_1 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_2 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_3 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_4 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_5 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_6 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @arg @ref LL_DMA_CHANNEL_7 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param DMA_InitStruct pointer to a @ref LL_DMA_InitTypeDef structure. 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @retval An ErrorStatus enumeration value: 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - SUCCESS: DMA registers are initialized 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - ERROR: Not applicable 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** uint32_t LL_DMA_Init(DMA_TypeDef *DMAx, uint32_t Channel, LL_DMA_InitTypeDef *DMA_InitStruct) 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 355 .loc 1 218 1 is_stmt 1 view -0 356 .cfi_startproc 357 @ args = 0, pretend = 0, frame = 0 358 @ frame_needed = 0, uses_anonymous_args = 0 359 .loc 1 218 1 is_stmt 0 view .LVU95 360 0000 10B5 push {r4, lr} 361 .LCFI0: 362 .cfi_def_cfa_offset 8 ARM GAS /tmp/ccpMNREg.s page 38 363 .cfi_offset 4, -8 364 .cfi_offset 14, -4 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Check the DMA Instance DMAx and Channel parameters*/ 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_ALL_CHANNEL_INSTANCE(DMAx, Channel)); 365 .loc 1 220 3 is_stmt 1 view .LVU96 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Check the DMA parameters from DMA_InitStruct */ 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_DIRECTION(DMA_InitStruct->Direction)); 366 .loc 1 223 3 view .LVU97 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_MODE(DMA_InitStruct->Mode)); 367 .loc 1 224 3 view .LVU98 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_PERIPHINCMODE(DMA_InitStruct->PeriphOrM2MSrcIncMode)); 368 .loc 1 225 3 view .LVU99 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode)); 369 .loc 1 226 3 view .LVU100 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize)); 370 .loc 1 227 3 view .LVU101 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_MEMORYDATASIZE(DMA_InitStruct->MemoryOrM2MDstDataSize)); 371 .loc 1 228 3 view .LVU102 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_NBDATA(DMA_InitStruct->NbData)); 372 .loc 1 229 3 view .LVU103 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** assert_param(IS_LL_DMA_PRIORITY(DMA_InitStruct->Priority)); 373 .loc 1 230 3 view .LVU104 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /*---------------------------- DMAx CCR Configuration ------------------------ 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * Configure DMAx_Channely: data transfer direction, data transfer mode, 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * peripheral and memory increment mode, 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * data size alignment and priority level with parameters : 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - Direction: DMA_CCR_DIR and DMA_CCR_MEM2MEM bits 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - Mode: DMA_CCR_CIRC bit 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - PeriphOrM2MSrcIncMode: DMA_CCR_PINC bit 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - MemoryOrM2MDstIncMode: DMA_CCR_MINC bit 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - PeriphOrM2MSrcDataSize: DMA_CCR_PSIZE[1:0] bits 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - MemoryOrM2MDstDataSize: DMA_CCR_MSIZE[1:0] bits 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - Priority: DMA_CCR_PL[1:0] bits 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_ConfigTransfer(DMAx, Channel, DMA_InitStruct->Direction | \ 374 .loc 1 244 3 view .LVU105 375 .loc 1 244 54 is_stmt 0 view .LVU106 376 0002 9368 ldr r3, [r2, #8] 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Mode | \ 377 .loc 1 245 39 view .LVU107 378 0004 D468 ldr r4, [r2, #12] 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Mode | \ 379 .loc 1 244 66 view .LVU108 380 0006 2343 orrs r3, r3, r4 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcIncMode | \ 381 .loc 1 246 39 view .LVU109 382 0008 1469 ldr r4, [r2, #16] 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Mode | \ 383 .loc 1 245 64 view .LVU110 384 000a 2343 orrs r3, r3, r4 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstIncMode | \ 385 .loc 1 247 39 view .LVU111 386 000c 5469 ldr r4, [r2, #20] 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcIncMode | \ 387 .loc 1 246 64 view .LVU112 ARM GAS /tmp/ccpMNREg.s page 39 388 000e 2343 orrs r3, r3, r4 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcDataSize | \ 389 .loc 1 248 39 view .LVU113 390 0010 9469 ldr r4, [r2, #24] 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstIncMode | \ 391 .loc 1 247 64 view .LVU114 392 0012 2343 orrs r3, r3, r4 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstDataSize | \ 393 .loc 1 249 39 view .LVU115 394 0014 D469 ldr r4, [r2, #28] 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcDataSize | \ 395 .loc 1 248 64 view .LVU116 396 0016 2343 orrs r3, r3, r4 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Priority); 397 .loc 1 250 39 view .LVU117 398 0018 546A ldr r4, [r2, #36] 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Mode | \ 399 .loc 1 244 3 view .LVU118 400 001a 2343 orrs r3, r3, r4 401 .LVL26: 402 .LBB52: 403 .LBI52: 526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 404 .loc 2 526 22 is_stmt 1 view .LVU119 405 .LBB53: 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 406 .loc 2 528 3 view .LVU120 407 001c 0139 subs r1, r1, #1 408 .LVL27: 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 409 .loc 2 528 3 is_stmt 0 view .LVU121 410 001e 0F4C ldr r4, .L40 411 0020 14F801E0 ldrb lr, [r4, r1] @ zero_extendqisi2 412 0024 0EEB000C add ip, lr, r0 413 0028 5EF80010 ldr r1, [lr, r0] 414 .LVL28: 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 415 .loc 2 528 3 view .LVU122 416 002c 21F4FF41 bic r1, r1, #32640 417 0030 21F07001 bic r1, r1, #112 418 0034 0B43 orrs r3, r3, r1 419 .LVL29: 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 420 .loc 2 528 3 view .LVU123 421 0036 4EF80030 str r3, [lr, r0] 422 .LVL30: 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_P 423 .loc 2 528 3 view .LVU124 424 .LBE53: 425 .LBE52: 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /*-------------------------- DMAx CMAR Configuration ------------------------- 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * Configure the memory or destination base address with parameter : 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - MemoryOrM2MDstAddress: DMA_CMAR_MA[31:0] bits 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_SetMemoryAddress(DMAx, Channel, DMA_InitStruct->MemoryOrM2MDstAddress); 426 .loc 1 256 3 is_stmt 1 view .LVU125 ARM GAS /tmp/ccpMNREg.s page 40 427 003a 5368 ldr r3, [r2, #4] 428 .LVL31: 429 .LBB54: 430 .LBI54: 964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 431 .loc 2 964 22 view .LVU126 432 .LBB55: 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 433 .loc 2 966 3 view .LVU127 434 003c CCF80C30 str r3, [ip, #12] 435 .LVL32: 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 436 .loc 2 966 3 is_stmt 0 view .LVU128 437 .LBE55: 438 .LBE54: 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /*-------------------------- DMAx CPAR Configuration ------------------------- 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * Configure the peripheral or source base address with parameter : 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - PeriphOrM2MSrcAddress: DMA_CPAR_PA[31:0] bits 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_SetPeriphAddress(DMAx, Channel, DMA_InitStruct->PeriphOrM2MSrcAddress); 439 .loc 1 262 3 is_stmt 1 view .LVU129 440 0040 1368 ldr r3, [r2] 441 .LVL33: 442 .LBB56: 443 .LBI56: 986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 444 .loc 2 986 22 view .LVU130 445 .LBB57: 988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 446 .loc 2 988 3 view .LVU131 447 0042 CCF80830 str r3, [ip, #8] 448 .LVL34: 988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** } 449 .loc 2 988 3 is_stmt 0 view .LVU132 450 .LBE57: 451 .LBE56: 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /*--------------------------- DMAx CNDTR Configuration ----------------------- 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * Configure the peripheral base address with parameter : 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * - NbData: DMA_CNDTR_NDT[15:0] bits 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** LL_DMA_SetDataLength(DMAx, Channel, DMA_InitStruct->NbData); 452 .loc 1 268 3 is_stmt 1 view .LVU133 453 0046 126A ldr r2, [r2, #32] 454 .LVL35: 455 .LBB58: 456 .LBI58: 879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** { 457 .loc 2 879 22 view .LVU134 458 .LBB59: 881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CNDTR_NDT, NbData); 459 .loc 2 881 3 view .LVU135 460 0048 DCF80430 ldr r3, [ip, #4] 461 004c 1B0C lsrs r3, r3, #16 462 004e 1B04 lsls r3, r3, #16 463 0050 1343 orrs r3, r3, r2 ARM GAS /tmp/ccpMNREg.s page 41 464 0052 CCF80430 str r3, [ip, #4] 465 .LVL36: 881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h **** DMA_CNDTR_NDT, NbData); 466 .loc 2 881 3 is_stmt 0 view .LVU136 467 .LBE59: 468 .LBE58: 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** return SUCCESS; 469 .loc 1 270 3 is_stmt 1 view .LVU137 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 470 .loc 1 271 1 is_stmt 0 view .LVU138 471 0056 0020 movs r0, #0 472 .LVL37: 473 .loc 1 271 1 view .LVU139 474 0058 10BD pop {r4, pc} 475 .L41: 476 005a 00BF .align 2 477 .L40: 478 005c 00000000 .word .LANCHOR0 479 .cfi_endproc 480 .LFE173: 482 .section .text.LL_DMA_StructInit,"ax",%progbits 483 .align 1 484 .global LL_DMA_StructInit 485 .syntax unified 486 .thumb 487 .thumb_func 489 LL_DMA_StructInit: 490 .LVL38: 491 .LFB174: 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /** 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @brief Set each @ref LL_DMA_InitTypeDef field to default value. 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @param DMA_InitStruct Pointer to a @ref LL_DMA_InitTypeDef structure. 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** * @retval None 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** */ 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct) 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** { 492 .loc 1 279 1 is_stmt 1 view -0 493 .cfi_startproc 494 @ args = 0, pretend = 0, frame = 0 495 @ frame_needed = 0, uses_anonymous_args = 0 496 @ link register save eliminated. 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** /* Set DMA_InitStruct fields to default values */ 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcAddress = 0x00000000U; 497 .loc 1 281 3 view .LVU141 498 .loc 1 281 42 is_stmt 0 view .LVU142 499 0000 0023 movs r3, #0 500 0002 0360 str r3, [r0] 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstAddress = 0x00000000U; 501 .loc 1 282 3 is_stmt 1 view .LVU143 502 .loc 1 282 42 is_stmt 0 view .LVU144 503 0004 4360 str r3, [r0, #4] 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY; 504 .loc 1 283 3 is_stmt 1 view .LVU145 505 .loc 1 283 42 is_stmt 0 view .LVU146 506 0006 8360 str r3, [r0, #8] ARM GAS /tmp/ccpMNREg.s page 42 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Mode = LL_DMA_MODE_NORMAL; 507 .loc 1 284 3 is_stmt 1 view .LVU147 508 .loc 1 284 42 is_stmt 0 view .LVU148 509 0008 C360 str r3, [r0, #12] 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT; 510 .loc 1 285 3 is_stmt 1 view .LVU149 511 .loc 1 285 42 is_stmt 0 view .LVU150 512 000a 0361 str r3, [r0, #16] 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstIncMode = LL_DMA_MEMORY_NOINCREMENT; 513 .loc 1 286 3 is_stmt 1 view .LVU151 514 .loc 1 286 42 is_stmt 0 view .LVU152 515 000c 4361 str r3, [r0, #20] 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_BYTE; 516 .loc 1 287 3 is_stmt 1 view .LVU153 517 .loc 1 287 42 is_stmt 0 view .LVU154 518 000e 8361 str r3, [r0, #24] 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_BYTE; 519 .loc 1 288 3 is_stmt 1 view .LVU155 520 .loc 1 288 42 is_stmt 0 view .LVU156 521 0010 C361 str r3, [r0, #28] 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->NbData = 0x00000000U; 522 .loc 1 289 3 is_stmt 1 view .LVU157 523 .loc 1 289 42 is_stmt 0 view .LVU158 524 0012 0362 str r3, [r0, #32] 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** DMA_InitStruct->Priority = LL_DMA_PRIORITY_LOW; 525 .loc 1 290 3 is_stmt 1 view .LVU159 526 .loc 1 290 42 is_stmt 0 view .LVU160 527 0014 4362 str r3, [r0, #36] 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c **** } 528 .loc 1 291 1 view .LVU161 529 0016 7047 bx lr 530 .cfi_endproc 531 .LFE174: 533 .section .rodata.CHANNEL_OFFSET_TAB,"a" 534 .align 2 535 .set .LANCHOR0,. + 0 538 CHANNEL_OFFSET_TAB: 539 0000 081C3044 .ascii "\010\0340DXl\200" 539 586C80 540 .text 541 .Letext0: 542 .file 3 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h" 543 .file 4 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h" 544 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h" 545 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h" ARM GAS /tmp/ccpMNREg.s page 43 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f1xx_ll_dma.c /tmp/ccpMNREg.s:18 .text.LL_DMA_DeInit:0000000000000000 $t /tmp/ccpMNREg.s:24 .text.LL_DMA_DeInit:0000000000000000 LL_DMA_DeInit /tmp/ccpMNREg.s:332 .text.LL_DMA_DeInit:00000000000000d0 $d /tmp/ccpMNREg.s:346 .text.LL_DMA_Init:0000000000000000 $t /tmp/ccpMNREg.s:352 .text.LL_DMA_Init:0000000000000000 LL_DMA_Init /tmp/ccpMNREg.s:478 .text.LL_DMA_Init:000000000000005c $d /tmp/ccpMNREg.s:483 .text.LL_DMA_StructInit:0000000000000000 $t /tmp/ccpMNREg.s:489 .text.LL_DMA_StructInit:0000000000000000 LL_DMA_StructInit /tmp/ccpMNREg.s:534 .rodata.CHANNEL_OFFSET_TAB:0000000000000000 $d /tmp/ccpMNREg.s:538 .rodata.CHANNEL_OFFSET_TAB:0000000000000000 CHANNEL_OFFSET_TAB NO UNDEFINED SYMBOLS