ARM GAS /tmp/ccw6diWF.s page 1 1 .cpu cortex-m3 2 .arch armv7-m 3 .fpu softvfp 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f1xx_ll_tim.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.OC1Config,"ax",%progbits 18 .align 1 19 .syntax unified 20 .thumb 21 .thumb_func 23 OC1Config: 24 .LVL0: 25 .LFB267: 26 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c" 1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @file stm32f1xx_ll_tim.c 4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief TIM LL module driver. 6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ****************************************************************************** 7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @attention 8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * 9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * Copyright (c) 2016 STMicroelectronics. 10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * All rights reserved. 11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * 12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * in the root directory of this software component. 14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * 16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ****************************************************************************** 17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(USE_FULL_LL_DRIVER) 19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Includes ------------------------------------------------------------------*/ 21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #include "stm32f1xx_ll_tim.h" 22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #include "stm32f1xx_ll_bus.h" 23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #ifdef USE_FULL_ASSERT 25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #include "stm32_assert.h" 26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #else 27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define assert_param(expr) ((void)0U) 28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* USE_FULL_ASSERT */ 29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup STM32F1xx_LL_Driver 31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ ARM GAS /tmp/ccw6diWF.s page 2 33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defin 35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup TIM_LL 37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Private constants ---------------------------------------------------------*/ 43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Private macros ------------------------------------------------------------*/ 44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup TIM_LL_Private_Macros 45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_COUNTERMODE(__VALUE__) (((__VALUE__) == LL_TIM_COUNTERMODE_UP) \ 48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_DOWN) \ 49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP) \ 50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_DOWN) \ 51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_COUNTERMODE_CENTER_UP_DOWN)) 52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_CLOCKDIVISION(__VALUE__) (((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV1) \ 54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV2) \ 55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_CLOCKDIVISION_DIV4)) 56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OCMODE(__VALUE__) (((__VALUE__) == LL_TIM_OCMODE_FROZEN) \ 58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_ACTIVE) \ 59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_INACTIVE) \ 60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_TOGGLE) \ 61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_FORCED_INACTIVE) \ 62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_FORCED_ACTIVE) \ 63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_PWM1) \ 64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCMODE_PWM2)) 65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OCSTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCSTATE_DISABLE) \ 67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCSTATE_ENABLE)) 68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OCPOLARITY(__VALUE__) (((__VALUE__) == LL_TIM_OCPOLARITY_HIGH) \ 70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCPOLARITY_LOW)) 71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OCIDLESTATE(__VALUE__) (((__VALUE__) == LL_TIM_OCIDLESTATE_LOW) \ 73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OCIDLESTATE_HIGH)) 74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_ACTIVEINPUT(__VALUE__) (((__VALUE__) == LL_TIM_ACTIVEINPUT_DIRECTTI) \ 76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ACTIVEINPUT_INDIRECTTI) \ 77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ACTIVEINPUT_TRC)) 78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_ICPSC(__VALUE__) (((__VALUE__) == LL_TIM_ICPSC_DIV1) \ 80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \ 81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \ 82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV8)) 83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_IC_FILTER(__VALUE__) (((__VALUE__) == LL_TIM_IC_FILTER_FDIV1) \ 85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N2) \ 86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N4) \ 87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV1_N8) \ 88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N6) \ 89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV2_N8) \ ARM GAS /tmp/ccw6diWF.s page 3 90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N6) \ 91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV4_N8) \ 92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N6) \ 93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV8_N8) \ 94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N5) \ 95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N6) \ 96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV16_N8) \ 97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N5) \ 98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N6) \ 99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_FILTER_FDIV32_N8)) 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_IC_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \ 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING)) 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_ENCODERMODE(__VALUE__) (((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI1) \ 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ENCODERMODE_X2_TI2) \ 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ENCODERMODE_X4_TI12)) 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_IC_POLARITY_ENCODER(__VALUE__) (((__VALUE__) == LL_TIM_IC_POLARITY_RISING) \ 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_IC_POLARITY_FALLING)) 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OSSR_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSR_DISABLE) \ 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OSSR_ENABLE)) 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_OSSI_STATE(__VALUE__) (((__VALUE__) == LL_TIM_OSSI_DISABLE) \ 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_OSSI_ENABLE)) 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_LOCK_LEVEL(__VALUE__) (((__VALUE__) == LL_TIM_LOCKLEVEL_OFF) \ 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_LOCKLEVEL_1) \ 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_LOCKLEVEL_2) \ 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_LOCKLEVEL_3)) 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_BREAK_STATE(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_DISABLE) \ 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_ENABLE)) 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_BREAK_POLARITY(__VALUE__) (((__VALUE__) == LL_TIM_BREAK_POLARITY_LOW) \ 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_POLARITY_HIGH)) 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #define IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(__VALUE__) (((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_DISABLE 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_AUTOMATICOUTPUT_ENAB 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @} 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Private function prototypes -----------------------------------------------*/ 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @defgroup TIM_LL_Private_Functions TIM Private Functions 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct); 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC1Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC2Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct); ARM GAS /tmp/ccw6diWF.s page 4 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @} 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Exported functions --------------------------------------------------------*/ 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup TIM_LL_Exported_Functions 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup TIM_LL_EF_Init 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set TIMx registers to their reset values. 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer instance 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: invalid TIMx instance 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_DeInit(const TIM_TypeDef *TIMx) 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = SUCCESS; 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_INSTANCE(TIMx)); 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (TIMx == TIM2) 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM2); 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2); 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM1) 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM1) 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM1); 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1); 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM1 */ 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM3) 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM3) 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM3); 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3); 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM3 */ 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM4) 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM4) 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM4); 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM4); 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM4 */ 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM5) 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM5) 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM5); ARM GAS /tmp/ccw6diWF.s page 5 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM5); 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM5 */ 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM6) 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM6) 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6); 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6); 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM6 */ 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined (TIM7) 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM7) 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM7); 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM7); 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM7 */ 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM8) 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM8) 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM8); 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM8); 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM8 */ 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM9) 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM9) 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM9); 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM9); 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM9 */ 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM10) 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM10) 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM10); 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM10); 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM10 */ 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM11) 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM11) 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM11); 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM11); 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM11 */ 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM12) 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM12) 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM12); 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM12); 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM12 */ 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM13) 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM13) 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM13); 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM13); ARM GAS /tmp/ccw6diWF.s page 6 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM13 */ 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM14) 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM14) 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM14); 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14); 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM14 */ 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM15) 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM15) 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM15); 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM15); 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM15 */ 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM16) 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM16) 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM16); 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM16); 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM16 */ 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #if defined(TIM17) 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else if (TIMx == TIM17) 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM17); 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM17); 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** #endif /* TIM17 */ 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** else 292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = ERROR; 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return result; 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set the fields of the time base unit configuration data structure 301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * to their default values. 302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (time base unit configura 303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None 304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct) 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->Prescaler = (uint16_t)0x0000; 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP; 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->Autoreload = 0xFFFFFFFFU; 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->RepetitionCounter = 0x00000000U; 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx time base unit. 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance ARM GAS /tmp/ccw6diWF.s page 7 318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * (TIMx time base unit configuration data structure) 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, const LL_TIM_InitTypeDef *TIM_InitStruct) 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr1; 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_INSTANCE(TIMx)); 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode)); 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision)); 332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr1 = LL_TIM_ReadReg(TIMx, CR1); 334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Counter Mode */ 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr1, (TIM_CR1_DIR | TIM_CR1_CMS), TIM_InitStruct->CounterMode); 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the clock division */ 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr1, TIM_CR1_CKD, TIM_InitStruct->ClockDivision); 345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR1 */ 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR1, tmpcr1); 349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Autoreload value */ 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_SetAutoReload(TIMx, TIM_InitStruct->Autoreload); 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Prescaler value */ 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_SetPrescaler(TIMx, TIM_InitStruct->Prescaler); 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Repetition Counter value */ 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_SetRepetitionCounter(TIMx, TIM_InitStruct->RepetitionCounter); 360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Generate an update event to reload the Prescaler 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** and the repetition counter value (if applicable) immediately */ 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_GenerateEvent_UPDATE(TIMx); 365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set the fields of the TIMx output channel configuration data 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * structure to their default values. 372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * (the output channel configuration data structure) 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None ARM GAS /tmp/ccw6diWF.s page 8 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCMode = LL_TIM_OCMODE_FROZEN; 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE; 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->CompareValue = 0x00000000U; 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNPolarity = LL_TIM_OCPOLARITY_HIGH; 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCIdleState = LL_TIM_OCIDLESTATE_LOW; 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW; 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx output channel. 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param Channel This parameter can be one of the following values: 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH1 394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH2 395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH3 396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4 397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channe 398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * data structure) 399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** switch (Channel) 408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH1: 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = OC1Config(TIMx, TIM_OC_InitStruct); 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = OC2Config(TIMx, TIM_OC_InitStruct); 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = OC3Config(TIMx, TIM_OC_InitStruct); 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = OC4Config(TIMx, TIM_OC_InitStruct); 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** default: 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return result; 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set the fields of the TIMx input channel configuration data 430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * structure to their default values. 431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel c ARM GAS /tmp/ccw6diWF.s page 9 432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * data structure) 433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None 434:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 435:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 437:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICPolarity = LL_TIM_IC_POLARITY_RISING; 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1; 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1; 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 443:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 444:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx input channel. 446:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 447:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param Channel This parameter can be one of the following values: 448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH1 449:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH2 450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH3 451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4 452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel 453:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * structure) 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 455:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized 456:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized 457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 458:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_IC_InitTypeDef *TIM_IC 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** switch (Channel) 463:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 464:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH1: 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = IC1Config(TIMx, TIM_IC_InitStruct); 466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 467:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = IC2Config(TIMx, TIM_IC_InitStruct); 469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = IC3Config(TIMx, TIM_IC_InitStruct); 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 473:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** result = IC4Config(TIMx, TIM_IC_InitStruct); 475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 476:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** default: 477:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 478:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return result; 481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 482:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 483:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 484:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Fills each TIM_EncoderInitStruct field with its default value 485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder i 486:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * configuration data structure) 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None 488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ ARM GAS /tmp/ccw6diWF.s page 10 489:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct) 490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->EncoderMode = LL_TIM_ENCODERMODE_X2_TI1; 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING; 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1; 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1; 501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 502:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 504:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the encoder interface of the timer instance. 505:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 506:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx enco 507:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * configuration data structure) 508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 509:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 510:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 512:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, const LL_TIM_ENCODER_InitTypeDef *TIM_EncoderIni 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 517:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx)); 519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode)); 520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity)); 521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput)); 522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler)); 523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter)); 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity)); 525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput)); 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler)); 527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter)); 528:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 529:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */ 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); 531:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 532:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 534:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 538:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Configure TI1 */ 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U); 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 543:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 544:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Configure TI2 */ 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC); ARM GAS /tmp/ccw6diWF.s page 11 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U); 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 550:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set TI1 and TI2 polarity and enable TI1 and TI2 */ 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 555:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 556:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set encoder mode */ 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_SetEncoderMode(TIMx, TIM_EncoderInitStruct->EncoderMode); 558:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 564:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 568:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 569:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set the fields of the TIMx Hall sensor interface configuration data 570:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * structure to their default values. 571:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HAL 572:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * configuration data structure) 573:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None 574:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 575:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct) 576:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 577:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 578:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 580:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->CommutationDelay = 0U; 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 583:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 584:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 585:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the Hall sensor interface of the timer instance. 586:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note TIMx CH1, CH2 and CH3 inputs connected through a XOR 587:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * to the TI1 input channel 588:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note TIMx slave mode controller is configured in reset mode. 589:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** Selected internal trigger is TI1F_ED. 590:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note Channel 1 is configured as input, IC1 is mapped on TRC. 591:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note Captured value stored in TIMx_CCR1 correspond to the time elapsed 592:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * between 2 changes on the inputs. It gives information about motor speed. 593:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note Channel 2 is configured in output PWM 2 mode. 594:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note Compare value stored in TIMx_CCR2 corresponds to the commutation delay. 595:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note OC2REF is selected as trigger output on TRGO. 596:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 597:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIM 598:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * interface configuration data structure) 599:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 600:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 601:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 602:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ ARM GAS /tmp/ccw6diWF.s page 12 603:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, const LL_TIM_HALLSENSOR_InitTypeDef *TIM_Hall 604:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 605:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 606:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 607:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 608:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpsmcr; 609:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 610:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 611:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(TIMx)); 612:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_HallSensorInitStruct->IC1Polarity)); 613:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_HallSensorInitStruct->IC1Prescaler)); 614:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_HallSensorInitStruct->IC1Filter)); 615:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 616:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the CC1 and CC2: Reset the CC1E and CC2E Bits */ 617:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); 618:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 619:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 620:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 621:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 622:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 623:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 624:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 625:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 626:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 627:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 628:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx SMCR register value */ 629:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr = LL_TIM_ReadReg(TIMx, SMCR); 630:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 631:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Connect TIMx_CH1, CH2 and CH3 pins to the TI1 input */ 632:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 |= TIM_CR2_TI1S; 633:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 634:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* OC2REF signal is used as trigger output (TRGO) */ 635:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 |= LL_TIM_TRGO_OC2REF; 636:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 637:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Configure the slave mode controller */ 638:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr &= (uint32_t)~(TIM_SMCR_TS | TIM_SMCR_SMS); 639:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr |= LL_TIM_TS_TI1F_ED; 640:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr |= LL_TIM_SLAVEMODE_RESET; 641:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 642:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Configure input channel 1 */ 643:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC); 644:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U); 645:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U); 646:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); 647:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 648:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Configure input channel 2 */ 649:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 &= (uint32_t)~(TIM_CCMR1_OC2M | TIM_CCMR1_OC2FE | TIM_CCMR1_OC2PE | TIM_CCMR1_OC2CE); 650:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U); 651:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 652:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set Channel 1 polarity and enable Channel 1 and Channel2 */ 653:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer &= (uint32_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP | TIM_CCER_CC2P | TIM_CCER_CC2NP); 654:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_HallSensorInitStruct->IC1Polarity); 655:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 656:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 657:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR2 */ 658:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 659:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 13 660:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx SMCR */ 661:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); 662:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 663:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 664:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 665:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 666:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 667:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 668:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 669:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCR2 */ 670:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_OC_SetCompareCH2(TIMx, TIM_HallSensorInitStruct->CommutationDelay); 671:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 672:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 673:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 674:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 675:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 676:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Set the fields of the Break and Dead Time configuration data structure 677:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * to their default values. 678:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead 679:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * data structure) 680:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval None 681:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 682:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct) 683:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 684:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 685:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->OSSRState = LL_TIM_OSSR_DISABLE; 686:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->OSSIState = LL_TIM_OSSI_DISABLE; 687:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->LockLevel = LL_TIM_LOCKLEVEL_OFF; 688:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; 689:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; 690:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakPolarity = LL_TIM_BREAK_POLARITY_LOW; 691:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE; 692:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 693:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 694:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 695:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the Break and Dead Time feature of the timer instance. 696:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note As the bits AOE, BKP, BKE, OSSR, OSSI and DTG[7:0] can be write-locked 697:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * depending on the LOCK configuration, it can be necessary to configure all of 698:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * them during the first write access to the TIMx_BDTR register. 699:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 700:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * a timer instance provides a break input. 701:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 702:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead 703:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * data structure) 704:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 705:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: Break and Dead Time is initialized 706:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 707:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 708:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, const LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct) 709:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 710:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpbdtr = 0; 711:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 712:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 713:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_BREAK_INSTANCE(TIMx)); 714:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OSSR_STATE(TIM_BDTRInitStruct->OSSRState)); 715:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OSSI_STATE(TIM_BDTRInitStruct->OSSIState)); 716:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->LockLevel)); ARM GAS /tmp/ccw6diWF.s page 14 717:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); 718:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->BreakPolarity)); 719:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->AutomaticOutput)); 720:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 721:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, 722:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** the OSSI State, the dead time value and the Automatic Output Enable Bit */ 723:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 724:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the BDTR bits */ 725:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, TIM_BDTRInitStruct->DeadTime); 726:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); 727:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); 729:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); 730:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); 731:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); 732:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 733:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set TIMx_BDTR */ 734:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); 735:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 736:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 737:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 738:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 739:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @} 740:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 741:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 742:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 743:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @} 744:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 745:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 746:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** @addtogroup TIM_LL_Private_Functions TIM Private Functions 747:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Private functions 748:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @{ 749:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 750:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 751:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx output channel 1. 752:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 753:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 1 configuration data structure 754:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 755:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 756:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 757:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 758:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC1Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 759:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 27 .loc 1 759 1 view -0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 @ link register save eliminated. 32 .loc 1 759 1 is_stmt 0 view .LVU1 33 0000 30B4 push {r4, r5} 34 .LCFI0: 35 .cfi_def_cfa_offset 8 36 .cfi_offset 4, -8 37 .cfi_offset 5, -4 760:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 38 .loc 1 760 3 is_stmt 1 view .LVU2 761:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; ARM GAS /tmp/ccw6diWF.s page 15 39 .loc 1 761 3 view .LVU3 762:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 40 .loc 1 762 3 view .LVU4 763:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 764:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 765:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); 41 .loc 1 765 3 view .LVU5 766:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 42 .loc 1 766 3 view .LVU6 767:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 43 .loc 1 767 3 view .LVU7 768:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 44 .loc 1 768 3 view .LVU8 769:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); 45 .loc 1 769 3 view .LVU9 770:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 46 .loc 1 770 3 view .LVU10 771:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 772:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ 773:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); 47 .loc 1 773 3 view .LVU11 48 0002 036A ldr r3, [r0, #32] 49 0004 23F00103 bic r3, r3, #1 50 0008 0362 str r3, [r0, #32] 774:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 775:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 776:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 51 .loc 1 776 3 view .LVU12 52 .loc 1 776 11 is_stmt 0 view .LVU13 53 000a 036A ldr r3, [r0, #32] 54 .LVL1: 777:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 778:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 779:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 55 .loc 1 779 3 is_stmt 1 view .LVU14 56 .loc 1 779 10 is_stmt 0 view .LVU15 57 000c 4468 ldr r4, [r0, #4] 58 .LVL2: 780:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 781:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 782:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 59 .loc 1 782 3 is_stmt 1 view .LVU16 60 .loc 1 782 12 is_stmt 0 view .LVU17 61 000e 8269 ldr r2, [r0, #24] 62 .LVL3: 783:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 784:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 785:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC1S); 63 .loc 1 785 3 is_stmt 1 view .LVU18 786:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 787:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Compare Mode */ 788:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccmr1, TIM_CCMR1_OC1M, TIM_OCInitStruct->OCMode); 64 .loc 1 788 3 view .LVU19 65 0010 22F07302 bic r2, r2, #115 66 .LVL4: 67 .loc 1 788 3 is_stmt 0 view .LVU20 68 0014 0D68 ldr r5, [r1] ARM GAS /tmp/ccw6diWF.s page 16 69 0016 2A43 orrs r2, r2, r5 70 .LVL5: 789:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 790:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Compare Polarity */ 791:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1P, TIM_OCInitStruct->OCPolarity); 71 .loc 1 791 3 is_stmt 1 view .LVU21 72 0018 23F00203 bic r3, r3, #2 73 .LVL6: 74 .loc 1 791 3 is_stmt 0 view .LVU22 75 001c 0D69 ldr r5, [r1, #16] 76 001e 2B43 orrs r3, r3, r5 77 .LVL7: 792:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 793:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output State */ 794:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); 78 .loc 1 794 3 is_stmt 1 view .LVU23 79 0020 23F00103 bic r3, r3, #1 80 .LVL8: 81 .loc 1 794 3 is_stmt 0 view .LVU24 82 0024 4D68 ldr r5, [r1, #4] 83 0026 2B43 orrs r3, r3, r5 84 .LVL9: 795:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 796:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) 85 .loc 1 796 3 is_stmt 1 view .LVU25 86 .loc 1 796 6 is_stmt 0 view .LVU26 87 0028 0F4D ldr r5, .L5 88 002a A842 cmp r0, r5 89 002c 07D0 beq .L4 90 .L2: 797:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 798:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); 799:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 800:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 801:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Polarity */ 802:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1NP, TIM_OCInitStruct->OCNPolarity << 2U); 803:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 804:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output State */ 805:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC1NE, TIM_OCInitStruct->OCNState << 2U); 806:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 807:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Idle state */ 808:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS1, TIM_OCInitStruct->OCIdleState); 809:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 810:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Idle state */ 811:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS1N, TIM_OCInitStruct->OCNIdleState << 1U); 812:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 813:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 814:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR2 */ 815:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 91 .loc 1 815 3 is_stmt 1 view .LVU27 92 002e 4460 str r4, [r0, #4] 816:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 817:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 818:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 93 .loc 1 818 3 view .LVU28 94 0030 8261 str r2, [r0, #24] 819:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 17 820:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Capture Compare Register value */ 821:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_OC_SetCompareCH1(TIMx, TIM_OCInitStruct->CompareValue); 95 .loc 1 821 3 view .LVU29 96 0032 CA68 ldr r2, [r1, #12] 97 .LVL10: 98 .LBB38: 99 .LBI38: 100 .file 2 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h" 1:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @file stm32f1xx_ll_tim.h 4:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Header file of TIM LL module. 6:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ****************************************************************************** 7:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @attention 8:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * 9:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * Copyright (c) 2016 STMicroelectronics. 10:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * All rights reserved. 11:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * 12:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file 13:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * in the root directory of this software component. 14:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * 16:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ****************************************************************************** 17:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 18:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 19:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 20:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #ifndef __STM32F1xx_LL_TIM_H 21:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __STM32F1xx_LL_TIM_H 22:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 23:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #ifdef __cplusplus 24:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** extern "C" { 25:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #endif 26:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 27:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/ 28:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #include "stm32f1xx.h" 29:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 30:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @addtogroup STM32F1xx_LL_Driver 31:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 32:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 33:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 34:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #if defined (TIM1) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defined (TIM5) || defin 35:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 36:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL TIM 37:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 38:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 39:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 40:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables 43:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 44:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 45:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** static const uint8_t OFFSET_TAB_CCMRx[] = 46:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 47:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */ 48:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x00U, /* 1: TIMx_CH1N */ 49:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */ ARM GAS /tmp/ccw6diWF.s page 18 50:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */ 51:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x04U, /* 4: TIMx_CH3 */ 52:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x04U, /* 5: TIMx_CH3N */ 53:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0x04U /* 6: TIMx_CH4 */ 54:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** }; 55:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 56:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] = 57:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 58:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */ 59:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 1: - NA */ 60:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */ 61:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 3: - NA */ 62:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */ 63:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 5: - NA */ 64:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 8U /* 6: OC4M, OC4FE, OC4PE */ 65:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** }; 66:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 67:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** static const uint8_t SHIFT_TAB_ICxx[] = 68:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 69:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 0: CC1S, IC1PSC, IC1F */ 70:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 1: - NA */ 71:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 8U, /* 2: CC2S, IC2PSC, IC2F */ 72:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 3: - NA */ 73:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 4: CC3S, IC3PSC, IC3F */ 74:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 5: - NA */ 75:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 8U /* 6: CC4S, IC4PSC, IC4F */ 76:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** }; 77:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 78:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] = 79:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 80:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 0: CC1P */ 81:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2U, /* 1: CC1NP */ 82:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 4U, /* 2: CC2P */ 83:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 6U, /* 3: CC2NP */ 84:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 8U, /* 4: CC3P */ 85:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 10U, /* 5: CC3NP */ 86:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 12U /* 6: CC4P */ 87:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** }; 88:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 89:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OISx[] = 90:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 91:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U, /* 0: OIS1 */ 92:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1U, /* 1: OIS1N */ 93:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2U, /* 2: OIS2 */ 94:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3U, /* 3: OIS2N */ 95:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 4U, /* 4: OIS3 */ 96:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 5U, /* 5: OIS3N */ 97:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 6U /* 6: OIS4 */ 98:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** }; 99:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/ 104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants 105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 19 107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */ 111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_DELAY_1 ((uint8_t)0x7F) 112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_DELAY_2 ((uint8_t)0x3F) 113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_DELAY_3 ((uint8_t)0x1F) 114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_DELAY_4 ((uint8_t)0x1F) 115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */ 117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_RANGE_1 ((uint8_t)0x00) 118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_RANGE_2 ((uint8_t)0x80) 119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_RANGE_3 ((uint8_t)0xC0) 120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define DT_RANGE_4 ((uint8_t)0xE0) 121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Private macros ------------------------------------------------------------*/ 128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros 129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @brief Convert channel id into channel index. 132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values: 133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval none 141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ 143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ 144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\ 145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\ 146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\ 147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\ 148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U : 6U) 149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @brief Calculate the deadtime sampling period(in ps). 151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz). 152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values: 153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval none 157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define TIM_CALC_DTS(__TIMCLK__, __CKD__) \ 159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \ 160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \ 161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U))) 162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} ARM GAS /tmp/ccw6diWF.s page 20 164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Exported types ------------------------------------------------------------*/ 168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER) 169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_ES_INIT TIM Exported Init structure 170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition. 175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. 179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_D 180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetPrescaler().*/ 183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode. 185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. 186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetCounterMode().*/ 189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active 191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Auto-Reload Register at the next update event. 192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_ 193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case 194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF. 195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/ 198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division. 200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. 201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetClockDivision().*/ 204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc 206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts 207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** from the RCR value (N). 208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This means in PWM mode that (N+1) corresponds to: 209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** - the number of PWM periods in edge-aligned mode 210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** - the number of half PWM period in center-aligned mode 211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x 212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Max_Data = 0xFF. 213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat 214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Max_Data = 0xFFFF. 215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetRepetitionCounter().*/ 218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_InitTypeDef; 219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** ARM GAS /tmp/ccw6diWF.s page 21 221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief TIM Output Compare configuration structure definition. 222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCMode; /*!< Specifies the output mode. 226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCMODE. 227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetMode().*/ 230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state. 232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functions 235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ 236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. 238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE. 239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functions 241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ 242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re 244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_Data= 245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** LL_TIM_OC_SetCompareCHx (x=1..6).*/ 248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity. 250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. 251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/ 254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. 256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. 257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/ 260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. 264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/ 267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. 269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. 270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/ 273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_OC_InitTypeDef; 274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief TIM Input Capture configuration structure definition. 277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 22 278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input. 289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/ 293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ 299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter. 301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ 305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef; 306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief TIM Encoder interface configuration structure definition. 310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). 314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. 315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetEncoderMode().*/ 318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source 326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/ 330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. 332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function ARM GAS /tmp/ccw6diWF.s page 23 335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ 336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter. 338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ 342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. 344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source 350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. 351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/ 354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. 356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ 360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC2Filter; /*!< Specifies the TI2 input filter. 362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. 363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ 366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef; 368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition. 371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. 376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. 377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/ 380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. 382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th 383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs. 384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC. 385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/ 388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter. 390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of 391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref TIM_LL_EC_IC_FILTER. ARM GAS /tmp/ccw6diWF.s page 24 392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/ 395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compa 397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** A positive pulse (TRGO event) is generated with a programmable 398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** a change occurs on the Hall inputs. 399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x0000 and Ma 400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary function 402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetCompareCH2().*/ 403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_HALLSENSOR_InitTypeDef; 404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief BDTR (Break and Dead Time) structure definition 407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** typedef struct 409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. 411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSR 412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetOffStates() 415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level 417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. 420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSI 421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_SetOffStates() 424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level 426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters. 429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL 430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note The LOCK bits can be written only once after the reset. 432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** register has been written, their content is frozen until the 433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the 435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** switching-on of the outputs. 436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x00 and Ma 437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime() 440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not. 445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE 446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() ARM GAS /tmp/ccw6diWF.s page 25 449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. 454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARIT 455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_ConfigBRK() 458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled 463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTP 464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAut 467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve 469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** programmed. */ 470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } LL_TIM_BDTR_InitTypeDef; 471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */ 476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/ 478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants 479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines 483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Flags defines which can be used with LL_TIM_ReadReg function. 484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */ 487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup 488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup 489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup 490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup 491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */ 492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */ 493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_BIF TIM_SR_BIF /*!< Break interrupt flag */ 494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt 495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt 496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt 497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt 498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER) 503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable 504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 26 506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */ 507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */ 508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable 513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by 516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by softw 517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */ 521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines 523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions. 524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */ 527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrup 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrup 529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrup 530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrup 531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */ 532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable * 533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */ 534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_UPDATESOURCE Update Source 539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow 542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/unde 543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode 548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at 551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at 552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode 557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!__REG__, (__VAL 937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Read a value in TIM register. 940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance 941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __REG__ Register to be read 942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Register value 943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__) 945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de 951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120); 952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values: 954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __DT__ deadtime duration (in ns) 958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval DTG[0:7] 959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \ 961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? ARM GAS /tmp/ccw6diWF.s page 34 962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : 963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__C 964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMC 965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__C 967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC 968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) 969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__ 970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC 971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) 972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 0U) 973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq 976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000); 977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz) 979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535) 980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \ 982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U 983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr 986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000); 987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __PSC__ prescaler 989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __FREQ__ output signal frequency (in Hz) 990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ 993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) 994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu 997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * active/inactive delay. 998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); 999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 1000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __PSC__ prescaler 1001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 1002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535) 1003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \ 1005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \ 1006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) 1007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration 1010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (when the timer operates in one pulse mode). 1011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); 1012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz) 1013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __PSC__ prescaler 1014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us) 1015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __PULSE__ pulse duration (in us) 1016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) 1017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \ ARM GAS /tmp/ccw6diWF.s page 35 1019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \ 1020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__)))) 1021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler 1024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ()); 1025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values: 1026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 1028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 1029:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 1030:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Input capture prescaler ratio (1, 2, 4 or 8) 1031:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1032:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \ 1033:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos))) 1034:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1035:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1036:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1037:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 1038:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1039:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1040:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Exported functions --------------------------------------------------------*/ 1041:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Functions TIM Exported Functions 1042:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 1043:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1044:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1045:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration 1046:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 1047:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1048:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1049:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable timer counter. 1050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter 1051:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1053:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1054:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) 1055:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1056:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN); 1057:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1058:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1059:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1060:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable timer counter. 1061:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter 1062:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1063:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1064:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1065:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx) 1066:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1067:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN); 1068:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1069:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1070:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1071:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the timer counter is enabled. 1072:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter 1073:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1074:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 1075:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 36 1076:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx) 1077:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1078:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL); 1079:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1080:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1081:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1082:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable update event generation. 1083:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent 1084:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1085:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1086:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1087:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx) 1088:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1089:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS); 1090:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1091:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1092:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1093:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable update event generation. 1094:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent 1095:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1097:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx) 1099:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS); 1101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether update event generation is enabled. 1105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent 1106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1). 1108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) 1110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); 1112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set update event source 1116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events 1117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled: 1118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * - Counter overflow/underflow 1119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * - Setting the UG bit 1120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * - Update generation through the slave mode controller 1121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter 1122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * overflow/underflow generates an update interrupt or DMA request if enabled. 1123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_SetUpdateSource 1124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param UpdateSource This parameter can be one of the following values: 1126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 1127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER 1128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource) 1131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource); ARM GAS /tmp/ccw6diWF.s page 37 1133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get actual event update source 1137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource 1138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR 1141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER 1142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx) 1144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS)); 1146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive). 1150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode 1151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param OnePulseMode This parameter can be one of the following values: 1153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE 1154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE 1155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode) 1158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode); 1160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get actual one pulse mode. 1164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode 1165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE 1168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE 1169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx) 1171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM)); 1173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the timer counter counting mode. 1177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to 1178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported 1179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * by a timer instance. 1180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse) 1181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * requires a timer reset to avoid unexpected direction 1182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * due to DIR bit readonly in center aligned mode. 1183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n 1184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR1 CMS LL_TIM_SetCounterMode 1185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CounterMode This parameter can be one of the following values: 1187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP 1188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN 1189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP ARM GAS /tmp/ccw6diWF.s page 38 1190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN 1191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN 1192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode) 1195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode); 1197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get actual counter mode. 1201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to 1202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported 1203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * by a timer instance. 1204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n 1205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode 1206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP 1209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN 1210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP 1211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN 1212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN 1213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx) 1215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t counter_mode; 1217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS)); 1219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** if (counter_mode == 0U) 1221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); 1223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return counter_mode; 1226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload. 1230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload 1231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx) 1235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_ARPE); 1237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable auto-reload (ARR) preload. 1241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload 1242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx) 1246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { ARM GAS /tmp/ccw6diWF.s page 39 1247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE); 1248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether auto-reload (ARR) preload is enabled. 1252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload 1253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 1255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx) 1257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL); 1259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead 1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (when supported) and the digital filters. 1264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer 1266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * instance. 1267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision 1268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values: 1270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision) 1276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision); 1278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the actual division ratio between the timer clock and the sampling clock used by t 1282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * generators (when supported) and the digital filters. 1283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer 1285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * instance. 1286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_GetClockDivision 1287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1 1290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2 1291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4 1292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx) 1294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD)); 1296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the counter value. 1300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter 1301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF) 1303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None ARM GAS /tmp/ccw6diWF.s page 40 1304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter) 1306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->CNT, Counter); 1308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the counter value. 1312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_GetCounter 1313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF) 1315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) 1317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT)); 1319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the current direction of the counter 1323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection 1324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP 1327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN 1328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx) 1330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); 1332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the prescaler value. 1336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1). 1337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note The prescaler can be changed on the fly as this control register is buffered. The new 1338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * prescaler ratio is taken into account at the next update event. 1339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter 1340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_SetPrescaler 1341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535 1343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler) 1346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler); 1348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the prescaler value. 1352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_GetPrescaler 1353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Prescaler value between Min_Data=0 and Max_Data=65535 1355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx) 1357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC)); 1359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ARM GAS /tmp/ccw6diWF.s page 41 1361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the auto-reload value. 1363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note The counter is blocked while the auto-reload value is null. 1364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter 1365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_SetAutoReload 1366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param AutoReload between Min_Data=0 and Max_Data=65535 1368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) 1371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload); 1373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the auto-reload value. 1377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload 1378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Auto-reload value 1380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx) 1382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->ARR)); 1384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the repetition counter value. 1388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check 1389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter. 1390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_SetRepetitionCounter 1391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer. 1393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter) 1396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter); 1398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the repetition counter value. 1402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check 1403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter. 1404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_GetRepetitionCounter 1405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Repetition counter value 1407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx) 1409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->RCR)); 1411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 1415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration ARM GAS /tmp/ccw6diWF.s page 42 1418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 1419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. 1422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written, 1423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * they are updated only when a commutation event (COM) occurs. 1424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Only on channels that have a complementary output. 1425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check 1426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event. 1427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload 1428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx) 1432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_CCPC); 1434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload. 1438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check 1439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event. 1440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload 1441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx) 1445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); 1447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM). 1451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check 1452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event. 1453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate 1454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CCUpdateSource This parameter can be one of the following values: 1456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY 1457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI 1458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource) 1461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource); 1463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request. 1467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger 1468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values: 1470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE 1472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger) ARM GAS /tmp/ccw6diWF.s page 43 1475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger); 1477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request. 1481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger 1482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC 1485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE 1486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx) 1488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS)); 1490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the lock level to freeze the 1494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * configuration of several capture/compare parameters. 1495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 1496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * the lock mechanism is supported by a timer instance. 1497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel 1498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values: 1500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF 1501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1 1502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2 1503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3 1504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel) 1507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel); 1509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare channels. 1513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n 1514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_EnableChannel\n 1515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_EnableChannel\n 1516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_EnableChannel\n 1517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_EnableChannel\n 1518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_EnableChannel\n 1519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_EnableChannel 1520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels) ARM GAS /tmp/ccw6diWF.s page 44 1532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels); 1534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare channels. 1538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n 1539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_DisableChannel\n 1540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_DisableChannel\n 1541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_DisableChannel\n 1542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_DisableChannel\n 1543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_DisableChannel\n 1544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_DisableChannel 1545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels) 1557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CCER, Channels); 1559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether channel(s) is(are) enabled. 1563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n 1564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_IsEnabledChannel\n 1565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_IsEnabledChannel\n 1566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_IsEnabledChannel\n 1567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_IsEnabledChannel\n 1568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_IsEnabledChannel\n 1569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel 1570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 1580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels) 1582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL); 1584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 1588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 45 1589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Output_Channel Output channel configuration 1591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 1592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Configure an output channel. 1595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n 1596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n 1597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n 1598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n 1599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n 1600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n 1601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n 1602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n 1603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS1 LL_TIM_OC_ConfigOutput\n 1604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_ConfigOutput\n 1605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_ConfigOutput\n 1606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_ConfigOutput 1607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values: 1614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW 1615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH 1616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura 1619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel])); 1623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), 1624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]); 1625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), 1626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]); 1627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which 1631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived. 1632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n 1633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_SetMode\n 1634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_SetMode\n 1635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_SetMode 1636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Mode This parameter can be one of the following values: 1643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 1644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 1645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE ARM GAS /tmp/ccw6diWF.s page 46 1646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode) 1654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT 1658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the output compare mode of an output channel. 1662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n 1663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n 1664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n 1665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode 1666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN 1674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 1675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE 1676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE 1677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE 1678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE 1679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1 1680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2 1681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) 1683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 1686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT 1687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the polarity of an output channel. 1691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n 1692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n 1693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_SetPolarity\n 1694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_SetPolarity\n 1695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_SetPolarity\n 1696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_SetPolarity\n 1697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_SetPolarity 1698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 ARM GAS /tmp/ccw6diWF.s page 47 1703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values: 1708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 1709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 1710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity) 1713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[i 1716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the polarity of an output channel. 1720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n 1721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_GetPolarity\n 1722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n 1723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_GetPolarity\n 1724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_GetPolarity\n 1725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_GetPolarity\n 1726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_GetPolarity 1727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH 1738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW 1739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) 1741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan 1744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the IDLE state of an output channel 1748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note This function is significant only for the timer instances 1749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx) 1750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * can be used to check whether or not a timer instance provides 1751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a break input. 1752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n 1753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS1N LL_TIM_OC_SetIdleState\n 1754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_SetIdleState\n 1755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_SetIdleState\n 1756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_SetIdleState\n 1757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_SetIdleState\n 1758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_SetIdleState 1759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance ARM GAS /tmp/ccw6diWF.s page 48 1760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param IdleState This parameter can be one of the following values: 1769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW 1770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH 1771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState 1774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iC 1777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the IDLE state of an output channel 1781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n 1782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS1N LL_TIM_OC_GetIdleState\n 1783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n 1784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n 1785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n 1786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n 1787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState 1788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 1794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 1796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 1798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW 1799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH 1800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel) 1802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChanne 1805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable fast mode for the output channel. 1809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode. 1810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n 1811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n 1812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n 1813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast 1814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 ARM GAS /tmp/ccw6diWF.s page 49 1817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel) 1823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); 1827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable fast mode for the output channel. 1832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n 1833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n 1834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n 1835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast 1836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel) 1845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel])); 1849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether fast mode is enabled for the output channel. 1854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n 1855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n 1856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n 1857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n 1858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 1865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel) 1867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 1870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]; 1871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 1872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ARM GAS /tmp/ccw6diWF.s page 50 1874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable compare register (TIMx_CCRx) preload for the output channel. 1876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n 1877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n 1878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n 1879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_EnablePreload 1880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel) 1889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 1893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable compare register (TIMx_CCRx) preload for the output channel. 1897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n 1898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n 1899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n 1900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_DisablePreload 1901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel) 1910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel])); 1914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe 1918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n 1919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n 1920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n 1921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n 1922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 1929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) ARM GAS /tmp/ccw6diWF.s page 51 1931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 1934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]; 1935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 1936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable clearing the output channel on an external event. 1940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 1941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n 1944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_EnableClear\n 1945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_EnableClear\n 1946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_EnableClear 1947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel) 1956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 1960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event. 1964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n 1967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n 1968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_DisableClear\n 1969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_DisableClear 1970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 1975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 1977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 1978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) 1979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 1981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 1982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel])); 1983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 1986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch 1987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note This function enables clearing the output channel on an external event. ARM GAS /tmp/ccw6diWF.s page 52 1988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force 1989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether 1990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event. 1991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n 1992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n 1993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n 1994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n 1995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 1996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 1997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 1998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel) 2004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]; 2008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL); 2009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal an 2013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * the Ocx and OCxN signals). 2014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * dead-time insertion feature is supported by a timer instance. 2016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter 2017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime 2018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param DeadTime between Min_Data=0 and Max_Data=255 2020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime) 2023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime); 2025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1). 2029:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2030:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 2031:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 2032:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2033:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2034:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2035:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2036:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue) 101 .loc 2 2036 22 view .LVU30 102 .LBB39: 2037:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2038:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->CCR1, CompareValue); 103 .loc 2 2038 3 view .LVU31 104 0034 4263 str r2, [r0, #52] 105 .LVL11: 106 .loc 2 2038 3 is_stmt 0 view .LVU32 ARM GAS /tmp/ccw6diWF.s page 53 107 .LBE39: 108 .LBE38: 822:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 823:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 824:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 109 .loc 1 824 3 is_stmt 1 view .LVU33 110 0036 0362 str r3, [r0, #32] 825:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 826:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 111 .loc 1 826 3 view .LVU34 827:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 112 .loc 1 827 1 is_stmt 0 view .LVU35 113 0038 0020 movs r0, #0 114 .LVL12: 115 .loc 1 827 1 view .LVU36 116 003a 30BC pop {r4, r5} 117 .LCFI1: 118 .cfi_remember_state 119 .cfi_restore 5 120 .cfi_restore 4 121 .cfi_def_cfa_offset 0 122 .LVL13: 123 .loc 1 827 1 view .LVU37 124 003c 7047 bx lr 125 .LVL14: 126 .L4: 127 .LCFI2: 128 .cfi_restore_state 798:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 129 .loc 1 798 5 is_stmt 1 view .LVU38 799:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 130 .loc 1 799 5 view .LVU39 802:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 131 .loc 1 802 5 view .LVU40 132 003e 23F00803 bic r3, r3, #8 133 .LVL15: 802:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 134 .loc 1 802 5 is_stmt 0 view .LVU41 135 0042 4D69 ldr r5, [r1, #20] 136 0044 43EA8503 orr r3, r3, r5, lsl #2 137 .LVL16: 805:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 138 .loc 1 805 5 is_stmt 1 view .LVU42 139 0048 23F00403 bic r3, r3, #4 140 .LVL17: 805:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 141 .loc 1 805 5 is_stmt 0 view .LVU43 142 004c 8D68 ldr r5, [r1, #8] 805:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 143 .loc 1 805 5 view .LVU44 144 004e 43EA8503 orr r3, r3, r5, lsl #2 145 .LVL18: 808:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 146 .loc 1 808 5 is_stmt 1 view .LVU45 147 0052 24F48074 bic r4, r4, #256 148 .LVL19: 808:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 54 149 .loc 1 808 5 is_stmt 0 view .LVU46 150 0056 8D69 ldr r5, [r1, #24] 151 0058 2C43 orrs r4, r4, r5 152 .LVL20: 811:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 153 .loc 1 811 5 is_stmt 1 view .LVU47 154 005a 24F40074 bic r4, r4, #512 155 .LVL21: 811:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 156 .loc 1 811 5 is_stmt 0 view .LVU48 157 005e CD69 ldr r5, [r1, #28] 158 0060 44EA4504 orr r4, r4, r5, lsl #1 159 .LVL22: 811:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 160 .loc 1 811 5 view .LVU49 161 0064 E3E7 b .L2 162 .L6: 163 0066 00BF .align 2 164 .L5: 165 0068 002C0140 .word 1073818624 166 .cfi_endproc 167 .LFE267: 169 .section .text.OC2Config,"ax",%progbits 170 .align 1 171 .syntax unified 172 .thumb 173 .thumb_func 175 OC2Config: 176 .LVL23: 177 .LFB268: 828:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 829:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 830:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx output channel 2. 831:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 832:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 2 configuration data structure 833:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 834:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 835:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 836:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 837:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC2Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 838:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 178 .loc 1 838 1 is_stmt 1 view -0 179 .cfi_startproc 180 @ args = 0, pretend = 0, frame = 0 181 @ frame_needed = 0, uses_anonymous_args = 0 182 @ link register save eliminated. 183 .loc 1 838 1 is_stmt 0 view .LVU51 184 0000 30B4 push {r4, r5} 185 .LCFI3: 186 .cfi_def_cfa_offset 8 187 .cfi_offset 4, -8 188 .cfi_offset 5, -4 839:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 189 .loc 1 839 3 is_stmt 1 view .LVU52 840:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 190 .loc 1 840 3 view .LVU53 841:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; ARM GAS /tmp/ccw6diWF.s page 55 191 .loc 1 841 3 view .LVU54 842:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 843:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 844:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(TIMx)); 192 .loc 1 844 3 view .LVU55 845:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 193 .loc 1 845 3 view .LVU56 846:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 194 .loc 1 846 3 view .LVU57 847:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 195 .loc 1 847 3 view .LVU58 848:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); 196 .loc 1 848 3 view .LVU59 849:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 197 .loc 1 849 3 view .LVU60 850:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 851:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ 852:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC2E); 198 .loc 1 852 3 view .LVU61 199 0002 036A ldr r3, [r0, #32] 200 0004 23F01003 bic r3, r3, #16 201 0008 0362 str r3, [r0, #32] 853:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 854:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 855:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 202 .loc 1 855 3 view .LVU62 203 .loc 1 855 11 is_stmt 0 view .LVU63 204 000a 036A ldr r3, [r0, #32] 205 .LVL24: 856:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 857:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 858:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 206 .loc 1 858 3 is_stmt 1 view .LVU64 207 .loc 1 858 10 is_stmt 0 view .LVU65 208 000c 4468 ldr r4, [r0, #4] 209 .LVL25: 859:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 860:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */ 861:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1); 210 .loc 1 861 3 is_stmt 1 view .LVU66 211 .loc 1 861 12 is_stmt 0 view .LVU67 212 000e 8269 ldr r2, [r0, #24] 213 .LVL26: 862:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 863:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 864:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(tmpccmr1, TIM_CCMR1_CC2S); 214 .loc 1 864 3 is_stmt 1 view .LVU68 865:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 866:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Output Compare Mode */ 867:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccmr1, TIM_CCMR1_OC2M, TIM_OCInitStruct->OCMode << 8U); 215 .loc 1 867 3 view .LVU69 216 0010 22F4E642 bic r2, r2, #29440 217 .LVL27: 218 .loc 1 867 3 is_stmt 0 view .LVU70 219 0014 0D68 ldr r5, [r1] 220 0016 42EA0522 orr r2, r2, r5, lsl #8 221 .LVL28: ARM GAS /tmp/ccw6diWF.s page 56 868:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 869:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Compare Polarity */ 870:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U); 222 .loc 1 870 3 is_stmt 1 view .LVU71 223 001a 23F02003 bic r3, r3, #32 224 .LVL29: 225 .loc 1 870 3 is_stmt 0 view .LVU72 226 001e 0D69 ldr r5, [r1, #16] 227 0020 43EA0513 orr r3, r3, r5, lsl #4 228 .LVL30: 871:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 872:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output State */ 873:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2E, TIM_OCInitStruct->OCState << 4U); 229 .loc 1 873 3 is_stmt 1 view .LVU73 230 0024 23F01003 bic r3, r3, #16 231 .LVL31: 232 .loc 1 873 3 is_stmt 0 view .LVU74 233 0028 4D68 ldr r5, [r1, #4] 234 .loc 1 873 3 view .LVU75 235 002a 43EA0513 orr r3, r3, r5, lsl #4 236 .LVL32: 874:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 875:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) 237 .loc 1 875 3 is_stmt 1 view .LVU76 238 .loc 1 875 6 is_stmt 0 view .LVU77 239 002e 104D ldr r5, .L11 240 0030 A842 cmp r0, r5 241 0032 07D0 beq .L10 242 .L8: 876:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 877:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); 878:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 879:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 880:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Polarity */ 881:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2NP, TIM_OCInitStruct->OCNPolarity << 6U); 882:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 883:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output State */ 884:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2NE, TIM_OCInitStruct->OCNState << 6U); 885:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 886:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Idle state */ 887:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS2, TIM_OCInitStruct->OCIdleState << 2U); 888:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 889:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Idle state */ 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS2N, TIM_OCInitStruct->OCNIdleState << 3U); 891:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 892:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 893:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR2 */ 894:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 243 .loc 1 894 3 is_stmt 1 view .LVU78 244 0034 4460 str r4, [r0, #4] 895:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 896:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR1 */ 897:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); 245 .loc 1 897 3 view .LVU79 246 0036 8261 str r2, [r0, #24] 898:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 899:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Capture Compare Register value */ ARM GAS /tmp/ccw6diWF.s page 57 900:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_OC_SetCompareCH2(TIMx, TIM_OCInitStruct->CompareValue); 247 .loc 1 900 3 view .LVU80 248 0038 CA68 ldr r2, [r1, #12] 249 .LVL33: 250 .LBB40: 251 .LBI40: 2039:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2040:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2041:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2042:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set compare value for output channel 2 (TIMx_CCR2). 2043:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2044:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 2 is supported by a timer instance. 2045:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2 2046:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2047:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2048:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2049:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue) 252 .loc 2 2050 22 view .LVU81 253 .LBB41: 2051:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue); 254 .loc 2 2052 3 view .LVU82 255 003a 8263 str r2, [r0, #56] 256 .LVL34: 257 .loc 2 2052 3 is_stmt 0 view .LVU83 258 .LBE41: 259 .LBE40: 901:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 902:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 903:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 260 .loc 1 903 3 is_stmt 1 view .LVU84 261 003c 0362 str r3, [r0, #32] 904:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 905:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 262 .loc 1 905 3 view .LVU85 906:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 263 .loc 1 906 1 is_stmt 0 view .LVU86 264 003e 0020 movs r0, #0 265 .LVL35: 266 .loc 1 906 1 view .LVU87 267 0040 30BC pop {r4, r5} 268 .LCFI4: 269 .cfi_remember_state 270 .cfi_restore 5 271 .cfi_restore 4 272 .cfi_def_cfa_offset 0 273 .LVL36: 274 .loc 1 906 1 view .LVU88 275 0042 7047 bx lr 276 .LVL37: 277 .L10: 278 .LCFI5: 279 .cfi_restore_state 877:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 280 .loc 1 877 5 is_stmt 1 view .LVU89 878:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 58 281 .loc 1 878 5 view .LVU90 881:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 282 .loc 1 881 5 view .LVU91 283 0044 23F08003 bic r3, r3, #128 284 .LVL38: 881:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 285 .loc 1 881 5 is_stmt 0 view .LVU92 286 0048 4D69 ldr r5, [r1, #20] 287 004a 43EA8513 orr r3, r3, r5, lsl #6 288 .LVL39: 884:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 289 .loc 1 884 5 is_stmt 1 view .LVU93 290 004e 23F04003 bic r3, r3, #64 291 .LVL40: 884:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 292 .loc 1 884 5 is_stmt 0 view .LVU94 293 0052 8D68 ldr r5, [r1, #8] 884:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 294 .loc 1 884 5 view .LVU95 295 0054 43EA8513 orr r3, r3, r5, lsl #6 296 .LVL41: 887:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 297 .loc 1 887 5 is_stmt 1 view .LVU96 298 0058 24F48064 bic r4, r4, #1024 299 .LVL42: 887:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 300 .loc 1 887 5 is_stmt 0 view .LVU97 301 005c 8D69 ldr r5, [r1, #24] 302 005e 44EA8504 orr r4, r4, r5, lsl #2 303 .LVL43: 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 304 .loc 1 890 5 is_stmt 1 view .LVU98 305 0062 24F40064 bic r4, r4, #2048 306 .LVL44: 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 307 .loc 1 890 5 is_stmt 0 view .LVU99 308 0066 CD69 ldr r5, [r1, #28] 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 309 .loc 1 890 5 view .LVU100 310 0068 44EAC504 orr r4, r4, r5, lsl #3 311 .LVL45: 890:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 312 .loc 1 890 5 view .LVU101 313 006c E2E7 b .L8 314 .L12: 315 006e 00BF .align 2 316 .L11: 317 0070 002C0140 .word 1073818624 318 .cfi_endproc 319 .LFE268: 321 .section .text.OC3Config,"ax",%progbits 322 .align 1 323 .syntax unified 324 .thumb 325 .thumb_func 327 OC3Config: 328 .LVL46: ARM GAS /tmp/ccw6diWF.s page 59 329 .LFB269: 907:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 908:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 909:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx output channel 3. 910:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 911:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure 912:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 913:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 914:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 915:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 916:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC3Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 917:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 330 .loc 1 917 1 is_stmt 1 view -0 331 .cfi_startproc 332 @ args = 0, pretend = 0, frame = 0 333 @ frame_needed = 0, uses_anonymous_args = 0 334 @ link register save eliminated. 335 .loc 1 917 1 is_stmt 0 view .LVU103 336 0000 30B4 push {r4, r5} 337 .LCFI6: 338 .cfi_def_cfa_offset 8 339 .cfi_offset 4, -8 340 .cfi_offset 5, -4 918:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr2; 341 .loc 1 918 3 is_stmt 1 view .LVU104 919:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 342 .loc 1 919 3 view .LVU105 920:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 343 .loc 1 920 3 view .LVU106 921:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 922:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 923:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(TIMx)); 344 .loc 1 923 3 view .LVU107 924:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 345 .loc 1 924 3 view .LVU108 925:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 346 .loc 1 925 3 view .LVU109 926:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 347 .loc 1 926 3 view .LVU110 927:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); 348 .loc 1 927 3 view .LVU111 928:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 349 .loc 1 928 3 view .LVU112 929:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 930:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ 931:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC3E); 350 .loc 1 931 3 view .LVU113 351 0002 036A ldr r3, [r0, #32] 352 0004 23F48073 bic r3, r3, #256 353 0008 0362 str r3, [r0, #32] 932:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 933:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 934:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 354 .loc 1 934 3 view .LVU114 355 .loc 1 934 11 is_stmt 0 view .LVU115 356 000a 036A ldr r3, [r0, #32] 357 .LVL47: ARM GAS /tmp/ccw6diWF.s page 60 935:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 936:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 937:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 358 .loc 1 937 3 is_stmt 1 view .LVU116 359 .loc 1 937 10 is_stmt 0 view .LVU117 360 000c 4468 ldr r4, [r0, #4] 361 .LVL48: 938:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 939:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */ 940:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); 362 .loc 1 940 3 is_stmt 1 view .LVU118 363 .loc 1 940 12 is_stmt 0 view .LVU119 364 000e C269 ldr r2, [r0, #28] 365 .LVL49: 941:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 942:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 943:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC3S); 366 .loc 1 943 3 is_stmt 1 view .LVU120 944:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 945:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Output Compare Mode */ 946:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccmr2, TIM_CCMR2_OC3M, TIM_OCInitStruct->OCMode); 367 .loc 1 946 3 view .LVU121 368 0010 22F07302 bic r2, r2, #115 369 .LVL50: 370 .loc 1 946 3 is_stmt 0 view .LVU122 371 0014 0D68 ldr r5, [r1] 372 0016 2A43 orrs r2, r2, r5 373 .LVL51: 947:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 948:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Compare Polarity */ 949:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3P, TIM_OCInitStruct->OCPolarity << 8U); 374 .loc 1 949 3 is_stmt 1 view .LVU123 375 0018 23F40073 bic r3, r3, #512 376 .LVL52: 377 .loc 1 949 3 is_stmt 0 view .LVU124 378 001c 0D69 ldr r5, [r1, #16] 379 001e 43EA0523 orr r3, r3, r5, lsl #8 380 .LVL53: 950:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 951:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output State */ 952:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3E, TIM_OCInitStruct->OCState << 8U); 381 .loc 1 952 3 is_stmt 1 view .LVU125 382 0022 23F48073 bic r3, r3, #256 383 .LVL54: 384 .loc 1 952 3 is_stmt 0 view .LVU126 385 0026 4D68 ldr r5, [r1, #4] 386 .loc 1 952 3 view .LVU127 387 0028 43EA0523 orr r3, r3, r5, lsl #8 388 .LVL55: 953:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 954:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) 389 .loc 1 954 3 is_stmt 1 view .LVU128 390 .loc 1 954 6 is_stmt 0 view .LVU129 391 002c 0F4D ldr r5, .L17 392 002e A842 cmp r0, r5 393 0030 07D0 beq .L16 394 .L14: ARM GAS /tmp/ccw6diWF.s page 61 955:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 956:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); 957:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 958:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 959:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Polarity */ 960:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3NP, TIM_OCInitStruct->OCNPolarity << 10U); 961:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 962:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output State */ 963:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC3NE, TIM_OCInitStruct->OCNState << 10U); 964:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 965:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Idle state */ 966:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS3, TIM_OCInitStruct->OCIdleState << 4U); 967:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 968:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the complementary output Idle state */ 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS3N, TIM_OCInitStruct->OCNIdleState << 5U); 970:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 971:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 972:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR2 */ 973:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 395 .loc 1 973 3 is_stmt 1 view .LVU130 396 0032 4460 str r4, [r0, #4] 974:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 975:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR2 */ 976:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); 397 .loc 1 976 3 view .LVU131 398 0034 C261 str r2, [r0, #28] 977:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 978:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Capture Compare Register value */ 979:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue); 399 .loc 1 979 3 view .LVU132 400 0036 CA68 ldr r2, [r1, #12] 401 .LVL56: 402 .LBB42: 403 .LBI42: 2053:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2054:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2055:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2056:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3). 2057:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 2058:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel is supported by a timer instance. 2059:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3 2060:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2061:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2062:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2063:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2064:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue) 404 .loc 2 2064 22 view .LVU133 405 .LBB43: 2065:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2066:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->CCR3, CompareValue); 406 .loc 2 2066 3 view .LVU134 407 0038 C263 str r2, [r0, #60] 408 .LVL57: 409 .loc 2 2066 3 is_stmt 0 view .LVU135 410 .LBE43: 411 .LBE42: 980:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 62 981:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 982:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 412 .loc 1 982 3 is_stmt 1 view .LVU136 413 003a 0362 str r3, [r0, #32] 983:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 984:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 414 .loc 1 984 3 view .LVU137 985:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 415 .loc 1 985 1 is_stmt 0 view .LVU138 416 003c 0020 movs r0, #0 417 .LVL58: 418 .loc 1 985 1 view .LVU139 419 003e 30BC pop {r4, r5} 420 .LCFI7: 421 .cfi_remember_state 422 .cfi_restore 5 423 .cfi_restore 4 424 .cfi_def_cfa_offset 0 425 .LVL59: 426 .loc 1 985 1 view .LVU140 427 0040 7047 bx lr 428 .LVL60: 429 .L16: 430 .LCFI8: 431 .cfi_restore_state 956:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 432 .loc 1 956 5 is_stmt 1 view .LVU141 957:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 433 .loc 1 957 5 view .LVU142 960:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 434 .loc 1 960 5 view .LVU143 435 0042 23F40063 bic r3, r3, #2048 436 .LVL61: 960:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 437 .loc 1 960 5 is_stmt 0 view .LVU144 438 0046 4D69 ldr r5, [r1, #20] 439 0048 43EA8523 orr r3, r3, r5, lsl #10 440 .LVL62: 963:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 441 .loc 1 963 5 is_stmt 1 view .LVU145 442 004c 23F48063 bic r3, r3, #1024 443 .LVL63: 963:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 444 .loc 1 963 5 is_stmt 0 view .LVU146 445 0050 8D68 ldr r5, [r1, #8] 963:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 446 .loc 1 963 5 view .LVU147 447 0052 43EA8523 orr r3, r3, r5, lsl #10 448 .LVL64: 966:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 449 .loc 1 966 5 is_stmt 1 view .LVU148 450 0056 24F48054 bic r4, r4, #4096 451 .LVL65: 966:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 452 .loc 1 966 5 is_stmt 0 view .LVU149 453 005a 8D69 ldr r5, [r1, #24] 454 005c 44EA0514 orr r4, r4, r5, lsl #4 ARM GAS /tmp/ccw6diWF.s page 63 455 .LVL66: 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 456 .loc 1 969 5 is_stmt 1 view .LVU150 457 0060 24F40054 bic r4, r4, #8192 458 .LVL67: 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 459 .loc 1 969 5 is_stmt 0 view .LVU151 460 0064 CD69 ldr r5, [r1, #28] 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 461 .loc 1 969 5 view .LVU152 462 0066 44EA4514 orr r4, r4, r5, lsl #5 463 .LVL68: 969:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 464 .loc 1 969 5 view .LVU153 465 006a E2E7 b .L14 466 .L18: 467 .align 2 468 .L17: 469 006c 002C0140 .word 1073818624 470 .cfi_endproc 471 .LFE269: 473 .section .text.OC4Config,"ax",%progbits 474 .align 1 475 .syntax unified 476 .thumb 477 .thumb_func 479 OC4Config: 480 .LVL69: 481 .LFB270: 986:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 987:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 988:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx output channel 4. 989:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 990:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 4 configuration data structure 991:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 992:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 993:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 994:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 995:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus OC4Config(TIM_TypeDef *TIMx, const LL_TIM_OC_InitTypeDef *TIM_OCInitStruct) 996:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 482 .loc 1 996 1 is_stmt 1 view -0 483 .cfi_startproc 484 @ args = 0, pretend = 0, frame = 0 485 @ frame_needed = 0, uses_anonymous_args = 0 486 @ link register save eliminated. 487 .loc 1 996 1 is_stmt 0 view .LVU155 488 0000 30B4 push {r4, r5} 489 .LCFI9: 490 .cfi_def_cfa_offset 8 491 .cfi_offset 4, -8 492 .cfi_offset 5, -4 997:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr2; 493 .loc 1 997 3 is_stmt 1 view .LVU156 998:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 494 .loc 1 998 3 view .LVU157 999:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 495 .loc 1 999 3 view .LVU158 ARM GAS /tmp/ccw6diWF.s page 64 1000:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1001:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 1002:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(TIMx)); 496 .loc 1 1002 3 view .LVU159 1003:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCMODE(TIM_OCInitStruct->OCMode)); 497 .loc 1 1003 3 view .LVU160 1004:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCState)); 498 .loc 1 1004 3 view .LVU161 1005:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCPolarity)); 499 .loc 1 1005 3 view .LVU162 1006:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity)); 500 .loc 1 1006 3 view .LVU163 1007:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState)); 501 .loc 1 1007 3 view .LVU164 1008:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1009:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ 1010:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E); 502 .loc 1 1010 3 view .LVU165 503 0002 036A ldr r3, [r0, #32] 504 0004 23F48053 bic r3, r3, #4096 505 0008 0362 str r3, [r0, #32] 1011:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1012:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCER register value */ 1013:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer = LL_TIM_ReadReg(TIMx, CCER); 506 .loc 1 1013 3 view .LVU166 507 .loc 1 1013 11 is_stmt 0 view .LVU167 508 000a 036A ldr r3, [r0, #32] 509 .LVL70: 1014:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1015:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CR2 register value */ 1016:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); 510 .loc 1 1016 3 is_stmt 1 view .LVU168 511 .loc 1 1016 10 is_stmt 0 view .LVU169 512 000c 4468 ldr r4, [r0, #4] 513 .LVL71: 1017:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1018:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */ 1019:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2); 514 .loc 1 1019 3 is_stmt 1 view .LVU170 515 .loc 1 1019 12 is_stmt 0 view .LVU171 516 000e C269 ldr r2, [r0, #28] 517 .LVL72: 1020:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1021:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Reset Capture/Compare selection Bits */ 1022:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** CLEAR_BIT(tmpccmr2, TIM_CCMR2_CC4S); 518 .loc 1 1022 3 is_stmt 1 view .LVU172 1023:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1024:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Output Compare Mode */ 1025:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccmr2, TIM_CCMR2_OC4M, TIM_OCInitStruct->OCMode << 8U); 519 .loc 1 1025 3 view .LVU173 520 0010 22F4E642 bic r2, r2, #29440 521 .LVL73: 522 .loc 1 1025 3 is_stmt 0 view .LVU174 523 0014 0D68 ldr r5, [r1] 524 0016 42EA0522 orr r2, r2, r5, lsl #8 525 .LVL74: 1026:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ARM GAS /tmp/ccw6diWF.s page 65 1027:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Compare Polarity */ 1028:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC4P, TIM_OCInitStruct->OCPolarity << 12U); 526 .loc 1 1028 3 is_stmt 1 view .LVU175 527 001a 23F40053 bic r3, r3, #8192 528 .LVL75: 529 .loc 1 1028 3 is_stmt 0 view .LVU176 530 001e 0D69 ldr r5, [r1, #16] 531 0020 43EA0533 orr r3, r3, r5, lsl #12 532 .LVL76: 1029:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1030:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output State */ 1031:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC4E, TIM_OCInitStruct->OCState << 12U); 533 .loc 1 1031 3 is_stmt 1 view .LVU177 534 0024 23F48053 bic r3, r3, #4096 535 .LVL77: 536 .loc 1 1031 3 is_stmt 0 view .LVU178 537 0028 4D68 ldr r5, [r1, #4] 538 .loc 1 1031 3 view .LVU179 539 002a 43EA0533 orr r3, r3, r5, lsl #12 540 .LVL78: 1032:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1033:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx)) 541 .loc 1 1033 3 is_stmt 1 view .LVU180 542 .loc 1 1033 6 is_stmt 0 view .LVU181 543 002e 084D ldr r5, .L23 544 0030 A842 cmp r0, r5 545 0032 07D0 beq .L22 546 .L20: 1034:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1035:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState)); 1036:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 1037:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1038:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Output Idle state */ 1039:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpcr2, TIM_CR2_OIS4, TIM_OCInitStruct->OCIdleState << 6U); 1040:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1041:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1042:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CR2 */ 1043:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR2, tmpcr2); 547 .loc 1 1043 3 is_stmt 1 view .LVU182 548 0034 4460 str r4, [r0, #4] 1044:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1045:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCMR2 */ 1046:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCMR2, tmpccmr2); 549 .loc 1 1046 3 view .LVU183 550 0036 C261 str r2, [r0, #28] 1047:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1048:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the Capture Compare Register value */ 1049:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_OC_SetCompareCH4(TIMx, TIM_OCInitStruct->CompareValue); 551 .loc 1 1049 3 view .LVU184 552 0038 CA68 ldr r2, [r1, #12] 553 .LVL79: 554 .LBB44: 555 .LBI44: 2067:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2068:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2069:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2070:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set compare value for output channel 4 (TIMx_CCR4). ARM GAS /tmp/ccw6diWF.s page 66 2071:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2072:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2073:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 2074:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2075:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2076:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2077:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2078:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) 556 .loc 2 2078 22 view .LVU185 557 .LBB45: 2079:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2080:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue); 558 .loc 2 2080 3 view .LVU186 559 003a 0264 str r2, [r0, #64] 560 .LVL80: 561 .loc 2 2080 3 is_stmt 0 view .LVU187 562 .LBE45: 563 .LBE44: 1050:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1051:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Write to TIMx CCER */ 1052:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CCER, tmpccer); 564 .loc 1 1052 3 is_stmt 1 view .LVU188 565 003c 0362 str r3, [r0, #32] 1053:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1054:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 566 .loc 1 1054 3 view .LVU189 1055:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 567 .loc 1 1055 1 is_stmt 0 view .LVU190 568 003e 0020 movs r0, #0 569 .LVL81: 570 .loc 1 1055 1 view .LVU191 571 0040 30BC pop {r4, r5} 572 .LCFI10: 573 .cfi_remember_state 574 .cfi_restore 5 575 .cfi_restore 4 576 .cfi_def_cfa_offset 0 577 .LVL82: 578 .loc 1 1055 1 view .LVU192 579 0042 7047 bx lr 580 .LVL83: 581 .L22: 582 .LCFI11: 583 .cfi_restore_state 1035:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCIdleState)); 584 .loc 1 1035 5 is_stmt 1 view .LVU193 1036:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 585 .loc 1 1036 5 view .LVU194 1039:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 586 .loc 1 1039 5 view .LVU195 587 0044 24F48044 bic r4, r4, #16384 588 .LVL84: 1039:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 589 .loc 1 1039 5 is_stmt 0 view .LVU196 590 0048 8D69 ldr r5, [r1, #24] 591 004a 44EA8514 orr r4, r4, r5, lsl #6 592 .LVL85: ARM GAS /tmp/ccw6diWF.s page 67 1039:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 593 .loc 1 1039 5 view .LVU197 594 004e F1E7 b .L20 595 .L24: 596 .align 2 597 .L23: 598 0050 002C0140 .word 1073818624 599 .cfi_endproc 600 .LFE270: 602 .section .text.IC1Config,"ax",%progbits 603 .align 1 604 .syntax unified 605 .thumb 606 .thumb_func 608 IC1Config: 609 .LVL86: 610 .LFB271: 1056:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1057:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1058:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1059:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx input channel 1. 1060:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 1061:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 1 configuration data structure 1062:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 1063:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 1064:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 1065:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 1066:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC1Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 1067:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 611 .loc 1 1067 1 is_stmt 1 view -0 612 .cfi_startproc 613 @ args = 0, pretend = 0, frame = 0 614 @ frame_needed = 0, uses_anonymous_args = 0 615 @ link register save eliminated. 616 .loc 1 1067 1 is_stmt 0 view .LVU199 617 0000 10B4 push {r4} 618 .LCFI12: 619 .cfi_def_cfa_offset 4 620 .cfi_offset 4, -4 1068:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 1069:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC1_INSTANCE(TIMx)); 621 .loc 1 1069 3 is_stmt 1 view .LVU200 1070:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 622 .loc 1 1070 3 view .LVU201 1071:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 623 .loc 1 1071 3 view .LVU202 1072:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 624 .loc 1 1072 3 view .LVU203 1073:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 625 .loc 1 1073 3 view .LVU204 1074:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1075:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 1: Reset the CC1E Bit */ 1076:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; 626 .loc 1 1076 3 view .LVU205 627 .loc 1 1076 14 is_stmt 0 view .LVU206 628 0002 036A ldr r3, [r0, #32] 629 0004 23F00103 bic r3, r3, #1 ARM GAS /tmp/ccw6diWF.s page 68 630 0008 0362 str r3, [r0, #32] 1077:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1078:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 1079:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1, 631 .loc 1 1079 3 is_stmt 1 view .LVU207 632 000a 8369 ldr r3, [r0, #24] 633 000c 23F0FF03 bic r3, r3, #255 634 0010 4A68 ldr r2, [r1, #4] 635 0012 CC68 ldr r4, [r1, #12] 636 0014 2243 orrs r2, r2, r4 637 0016 8C68 ldr r4, [r1, #8] 638 0018 2243 orrs r2, r2, r4 639 001a 43EA1243 orr r3, r3, r2, lsr #16 640 001e 8361 str r3, [r0, #24] 1080:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCMR1_CC1S | TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC), 1081:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 1082:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1083:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Polarity and set the CC1E Bit */ 1084:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 641 .loc 1 1084 3 view .LVU208 642 0020 036A ldr r3, [r0, #32] 643 0022 23F00A03 bic r3, r3, #10 644 0026 0A68 ldr r2, [r1] 645 0028 1343 orrs r3, r3, r2 646 002a 43F00103 orr r3, r3, #1 647 002e 0362 str r3, [r0, #32] 1085:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCER_CC1P | TIM_CCER_CC1NP), 1086:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); 1087:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1088:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 648 .loc 1 1088 3 view .LVU209 1089:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 649 .loc 1 1089 1 is_stmt 0 view .LVU210 650 0030 0020 movs r0, #0 651 .LVL87: 652 .loc 1 1089 1 view .LVU211 653 0032 10BC pop {r4} 654 .LCFI13: 655 .cfi_restore 4 656 .cfi_def_cfa_offset 0 657 0034 7047 bx lr 658 .cfi_endproc 659 .LFE271: 661 .section .text.IC2Config,"ax",%progbits 662 .align 1 663 .syntax unified 664 .thumb 665 .thumb_func 667 IC2Config: 668 .LVL88: 669 .LFB272: 1090:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1091:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1092:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx input channel 2. 1093:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 1094:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 2 configuration data structure 1095:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: ARM GAS /tmp/ccw6diWF.s page 69 1096:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 1097:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 1098:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 1099:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC2Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 1100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 670 .loc 1 1100 1 is_stmt 1 view -0 671 .cfi_startproc 672 @ args = 0, pretend = 0, frame = 0 673 @ frame_needed = 0, uses_anonymous_args = 0 674 @ link register save eliminated. 675 .loc 1 1100 1 is_stmt 0 view .LVU213 676 0000 10B4 push {r4} 677 .LCFI14: 678 .cfi_def_cfa_offset 4 679 .cfi_offset 4, -4 1101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 1102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(TIMx)); 680 .loc 1 1102 3 is_stmt 1 view .LVU214 1103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 681 .loc 1 1103 3 view .LVU215 1104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 682 .loc 1 1104 3 view .LVU216 1105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 683 .loc 1 1105 3 view .LVU217 1106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 684 .loc 1 1106 3 view .LVU218 1107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 2: Reset the CC2E Bit */ 1109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC2E; 685 .loc 1 1109 3 view .LVU219 686 .loc 1 1109 14 is_stmt 0 view .LVU220 687 0002 036A ldr r3, [r0, #32] 688 0004 23F01003 bic r3, r3, #16 689 0008 0362 str r3, [r0, #32] 1110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 1112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1, 690 .loc 1 1112 3 is_stmt 1 view .LVU221 691 000a 8369 ldr r3, [r0, #24] 692 000c 23F47F43 bic r3, r3, #65280 693 0010 4A68 ldr r2, [r1, #4] 694 0012 CC68 ldr r4, [r1, #12] 695 0014 2243 orrs r2, r2, r4 696 0016 8C68 ldr r4, [r1, #8] 697 0018 2243 orrs r2, r2, r4 698 001a 43EA1223 orr r3, r3, r2, lsr #8 699 001e 8361 str r3, [r0, #24] 1113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCMR1_CC2S | TIM_CCMR1_IC2F | TIM_CCMR1_IC2PSC), 1114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 1115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Polarity and set the CC2E Bit */ 1117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 700 .loc 1 1117 3 view .LVU222 701 0020 036A ldr r3, [r0, #32] 702 0022 23F0A003 bic r3, r3, #160 703 0026 0A68 ldr r2, [r1] 704 0028 43EA0213 orr r3, r3, r2, lsl #4 ARM GAS /tmp/ccw6diWF.s page 70 705 002c 43F01003 orr r3, r3, #16 706 0030 0362 str r3, [r0, #32] 1118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCER_CC2P | TIM_CCER_CC2NP), 1119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ((TIM_ICInitStruct->ICPolarity << 4U) | TIM_CCER_CC2E)); 1120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 707 .loc 1 1121 3 view .LVU223 1122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 708 .loc 1 1122 1 is_stmt 0 view .LVU224 709 0032 0020 movs r0, #0 710 .LVL89: 711 .loc 1 1122 1 view .LVU225 712 0034 10BC pop {r4} 713 .LCFI15: 714 .cfi_restore 4 715 .cfi_def_cfa_offset 0 716 0036 7047 bx lr 717 .cfi_endproc 718 .LFE272: 720 .section .text.IC3Config,"ax",%progbits 721 .align 1 722 .syntax unified 723 .thumb 724 .thumb_func 726 IC3Config: 727 .LVL90: 728 .LFB273: 1123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx input channel 3. 1126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 1127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 3 configuration data structure 1128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 1129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 1130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 1131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 1132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 1133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 729 .loc 1 1133 1 is_stmt 1 view -0 730 .cfi_startproc 731 @ args = 0, pretend = 0, frame = 0 732 @ frame_needed = 0, uses_anonymous_args = 0 733 @ link register save eliminated. 734 .loc 1 1133 1 is_stmt 0 view .LVU227 735 0000 10B4 push {r4} 736 .LCFI16: 737 .cfi_def_cfa_offset 4 738 .cfi_offset 4, -4 1134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 1135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC3_INSTANCE(TIMx)); 739 .loc 1 1135 3 is_stmt 1 view .LVU228 1136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 740 .loc 1 1136 3 view .LVU229 1137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 741 .loc 1 1137 3 view .LVU230 1138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 742 .loc 1 1138 3 view .LVU231 ARM GAS /tmp/ccw6diWF.s page 71 1139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 743 .loc 1 1139 3 view .LVU232 1140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 3: Reset the CC3E Bit */ 1142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC3E; 744 .loc 1 1142 3 view .LVU233 745 .loc 1 1142 14 is_stmt 0 view .LVU234 746 0002 036A ldr r3, [r0, #32] 747 0004 23F48073 bic r3, r3, #256 748 0008 0362 str r3, [r0, #32] 1143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 1145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR2, 749 .loc 1 1145 3 is_stmt 1 view .LVU235 750 000a C369 ldr r3, [r0, #28] 751 000c 23F0FF03 bic r3, r3, #255 752 0010 4A68 ldr r2, [r1, #4] 753 0012 CC68 ldr r4, [r1, #12] 754 0014 2243 orrs r2, r2, r4 755 0016 8C68 ldr r4, [r1, #8] 756 0018 2243 orrs r2, r2, r4 757 001a 43EA1243 orr r3, r3, r2, lsr #16 758 001e C361 str r3, [r0, #28] 1146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCMR2_CC3S | TIM_CCMR2_IC3F | TIM_CCMR2_IC3PSC), 1147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 1148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Polarity and set the CC3E Bit */ 1150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 759 .loc 1 1150 3 view .LVU236 760 0020 036A ldr r3, [r0, #32] 761 0022 23F42063 bic r3, r3, #2560 762 0026 0A68 ldr r2, [r1] 763 0028 43EA0223 orr r3, r3, r2, lsl #8 764 002c 43F48073 orr r3, r3, #256 765 0030 0362 str r3, [r0, #32] 1151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCER_CC3P | TIM_CCER_CC3NP), 1152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ((TIM_ICInitStruct->ICPolarity << 8U) | TIM_CCER_CC3E)); 1153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 766 .loc 1 1154 3 view .LVU237 1155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 767 .loc 1 1155 1 is_stmt 0 view .LVU238 768 0032 0020 movs r0, #0 769 .LVL91: 770 .loc 1 1155 1 view .LVU239 771 0034 10BC pop {r4} 772 .LCFI17: 773 .cfi_restore 4 774 .cfi_def_cfa_offset 0 775 0036 7047 bx lr 776 .cfi_endproc 777 .LFE273: 779 .section .text.IC4Config,"ax",%progbits 780 .align 1 781 .syntax unified 782 .thumb 783 .thumb_func ARM GAS /tmp/ccw6diWF.s page 72 785 IC4Config: 786 .LVL92: 787 .LFB274: 1156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @brief Configure the TIMx input channel 4. 1159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIMx Timer Instance 1160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @param TIM_ICInitStruct pointer to the the TIMx input channel 4 configuration data structure 1161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * @retval An ErrorStatus enumeration value: 1162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized 1163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** * - ERROR: not applicable 1164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** */ 1165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** static ErrorStatus IC4Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) 1166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 788 .loc 1 1166 1 is_stmt 1 view -0 789 .cfi_startproc 790 @ args = 0, pretend = 0, frame = 0 791 @ frame_needed = 0, uses_anonymous_args = 0 792 @ link register save eliminated. 793 .loc 1 1166 1 is_stmt 0 view .LVU241 794 0000 10B4 push {r4} 795 .LCFI18: 796 .cfi_def_cfa_offset 4 797 .cfi_offset 4, -4 1167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Check the parameters */ 1168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_TIM_CC4_INSTANCE(TIMx)); 798 .loc 1 1168 3 is_stmt 1 view .LVU242 1169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY(TIM_ICInitStruct->ICPolarity)); 799 .loc 1 1169 3 view .LVU243 1170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_ICInitStruct->ICActiveInput)); 800 .loc 1 1170 3 view .LVU244 1171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_ICInitStruct->ICPrescaler)); 801 .loc 1 1171 3 view .LVU245 1172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter)); 802 .loc 1 1172 3 view .LVU246 1173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */ 1175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIMx->CCER &= (uint32_t)~TIM_CCER_CC4E; 803 .loc 1 1175 3 view .LVU247 804 .loc 1 1175 14 is_stmt 0 view .LVU248 805 0002 036A ldr r3, [r0, #32] 806 0004 23F48053 bic r3, r3, #4096 807 0008 0362 str r3, [r0, #32] 1176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */ 1178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR2, 808 .loc 1 1178 3 is_stmt 1 view .LVU249 809 000a C369 ldr r3, [r0, #28] 810 000c 23F47F43 bic r3, r3, #65280 811 0010 4A68 ldr r2, [r1, #4] 812 0012 CC68 ldr r4, [r1, #12] 813 0014 2243 orrs r2, r2, r4 814 0016 8C68 ldr r4, [r1, #8] 815 0018 2243 orrs r2, r2, r4 816 001a 43EA1223 orr r3, r3, r2, lsr #8 817 001e C361 str r3, [r0, #28] 1179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_CCMR2_CC4S | TIM_CCMR2_IC4F | TIM_CCMR2_IC4PSC), ARM GAS /tmp/ccw6diWF.s page 73 1180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** (TIM_ICInitStruct->ICActiveInput | TIM_ICInitStruct->ICFilter | TIM_ICInitStruct->ICPr 1181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Select the Polarity and set the CC4E Bit */ 1183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(TIMx->CCER, 818 .loc 1 1183 3 view .LVU250 819 0020 036A ldr r3, [r0, #32] 820 0022 23F40053 bic r3, r3, #8192 821 0026 0A68 ldr r2, [r1] 822 0028 43EA0233 orr r3, r3, r2, lsl #12 823 002c 43F48053 orr r3, r3, #4096 824 0030 0362 str r3, [r0, #32] 1184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_CCER_CC4P, 1185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ((TIM_ICInitStruct->ICPolarity << 12U) | TIM_CCER_CC4E)); 1186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** return SUCCESS; 825 .loc 1 1187 3 view .LVU251 1188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 826 .loc 1 1188 1 is_stmt 0 view .LVU252 827 0032 0020 movs r0, #0 828 .LVL93: 829 .loc 1 1188 1 view .LVU253 830 0034 10BC pop {r4} 831 .LCFI19: 832 .cfi_restore 4 833 .cfi_def_cfa_offset 0 834 0036 7047 bx lr 835 .cfi_endproc 836 .LFE274: 838 .section .text.LL_TIM_DeInit,"ax",%progbits 839 .align 1 840 .global LL_TIM_DeInit 841 .syntax unified 842 .thumb 843 .thumb_func 845 LL_TIM_DeInit: 846 .LVL94: 847 .LFB254: 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = SUCCESS; 848 .loc 1 168 1 is_stmt 1 view -0 849 .cfi_startproc 850 @ args = 0, pretend = 0, frame = 0 851 @ frame_needed = 0, uses_anonymous_args = 0 852 @ link register save eliminated. 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 853 .loc 1 169 3 view .LVU255 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 854 .loc 1 172 3 view .LVU256 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 855 .loc 1 174 3 view .LVU257 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 856 .loc 1 174 6 is_stmt 0 view .LVU258 857 0000 B0F1804F cmp r0, #1073741824 858 0004 0AD0 beq .L39 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 859 .loc 1 180 8 is_stmt 1 view .LVU259 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 860 .loc 1 180 11 is_stmt 0 view .LVU260 ARM GAS /tmp/ccw6diWF.s page 74 861 0006 1D4B ldr r3, .L43 862 0008 9842 cmp r0, r3 863 000a 12D0 beq .L40 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 864 .loc 1 187 8 is_stmt 1 view .LVU261 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 865 .loc 1 187 11 is_stmt 0 view .LVU262 866 000c 1C4B ldr r3, .L43+4 867 000e 9842 cmp r0, r3 868 0010 1BD0 beq .L41 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 869 .loc 1 194 8 is_stmt 1 view .LVU263 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 870 .loc 1 194 11 is_stmt 0 view .LVU264 871 0012 1C4B ldr r3, .L43+8 872 0014 9842 cmp r0, r3 873 0016 24D0 beq .L42 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 874 .loc 1 293 12 view .LVU265 875 0018 0120 movs r0, #1 876 .LVL95: 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 877 .loc 1 296 3 is_stmt 1 view .LVU266 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 878 .loc 1 297 1 is_stmt 0 view .LVU267 879 001a 7047 bx lr 880 .LVL96: 881 .L39: 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2); 882 .loc 1 176 5 is_stmt 1 view .LVU268 883 .LBB46: 884 .LBI46: 885 .file 3 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h" 1:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 2:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ****************************************************************************** 3:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @file stm32f1xx_ll_bus.h 4:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @author MCD Application Team 5:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Header file of BUS LL module. 6:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 7:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** @verbatim 8:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ##### RCC Limitations ##### 9:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ============================================================================== 10:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** [..] 11:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** A delay between an RCC peripheral clock enable and the effective peripheral 12:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** enabling should be taken into account in order to manage the peripheral read/write 13:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** from/to registers. 14:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (+) This delay depends on the peripheral mapping. 15:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (++) AHB & APB peripherals, 1 dummy read is necessary 16:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 17:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** [..] 18:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** Workarounds: 19:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been 20:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** inserted in each LL_{BUS}_GRP{x}_EnableClock() function. 21:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 22:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** @endverbatim 23:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ****************************************************************************** 24:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @attention ARM GAS /tmp/ccw6diWF.s page 75 25:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 26:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * Copyright (c) 2016 STMicroelectronics. 27:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * All rights reserved. 28:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 29:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * This software is licensed under terms that can be found in the LICENSE file in 30:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * the root directory of this software component. 31:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * If no LICENSE file comes with this software, it is provided AS-IS. 32:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ****************************************************************************** 33:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 34:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 35:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/ 36:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #ifndef __STM32F1xx_LL_BUS_H 37:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define __STM32F1xx_LL_BUS_H 38:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 39:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #ifdef __cplusplus 40:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** extern "C" { 41:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif 42:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 43:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/ 44:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #include "stm32f1xx.h" 45:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 46:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @addtogroup STM32F1xx_LL_Driver 47:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 48:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 49:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 50:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(RCC) 51:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 52:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL BUS 53:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 54:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 55:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 56:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Private types -------------------------------------------------------------*/ 57:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Private variables ---------------------------------------------------------*/ 58:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 59:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Private constants ---------------------------------------------------------*/ 60:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(RCC_AHBRSTR_OTGFSRST) || defined(RCC_AHBRSTR_ETHMACRST) 61:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define RCC_AHBRSTR_SUPPORT 62:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /* RCC_AHBRSTR_OTGFSRST || RCC_AHBRSTR_ETHMACRST */ 63:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 64:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Private macros ------------------------------------------------------------*/ 65:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 66:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Exported types ------------------------------------------------------------*/ 67:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Exported constants --------------------------------------------------------*/ 68:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants 69:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 70:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 71:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 72:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH 73:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 74:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 75:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 76:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHBENR_CRCEN 77:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHBENR_DMA1EN 78:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(DMA2) 79:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN 80:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*DMA2*/ 81:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(ETH) ARM GAS /tmp/ccw6diWF.s page 76 82:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMAC RCC_AHBENR_ETHMACEN 83:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACRX RCC_AHBENR_ETHMACRXEN 84:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMACTX RCC_AHBENR_ETHMACTXEN 85:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*ETH*/ 86:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLASH RCC_AHBENR_FLITFEN 87:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(FSMC_Bank1) 88:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FSMC RCC_AHBENR_FSMCEN 89:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*FSMC_Bank1*/ 90:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(USB_OTG_FS) 91:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGFS RCC_AHBENR_OTGFSEN 92:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*USB_OTG_FS*/ 93:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(SDIO) 94:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SDIO RCC_AHBENR_SDIOEN 95:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*SDIO*/ 96:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM RCC_AHBENR_SRAMEN 97:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 98:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 99:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH 102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_BKP RCC_APB1ENR_BKPEN 106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(CAN1) 107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN 108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*CAN1*/ 109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(CAN2) 110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN 111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*CAN2*/ 112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(CEC) 113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CEC RCC_APB1ENR_CECEN 114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*CEC*/ 115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(DAC) 116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_DAC1 RCC_APB1ENR_DACEN 117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*DAC*/ 118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN 119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(I2C2) 120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR_I2C2EN 121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*I2C2*/ 122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN 123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(SPI2) 124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN 125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*SPI2*/ 126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(SPI3) 127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN 128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*SPI3*/ 129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM12) 130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN 131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM12*/ 132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM13) 133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN 134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM13*/ 135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM14) 136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN 137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM14*/ 138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN ARM GAS /tmp/ccw6diWF.s page 77 139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN 140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM4) 141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN 142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM4*/ 143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM5) 144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR_TIM5EN 145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM5*/ 146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM6) 147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN 148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM6*/ 149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM7) 150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN 151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM7*/ 152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(UART4) 153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_UART4 RCC_APB1ENR_UART4EN 154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*UART4*/ 155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(UART5) 156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_UART5 RCC_APB1ENR_UART5EN 157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*UART5*/ 158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN 159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(USART3) 160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR_USART3EN 161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*USART3*/ 162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(USB) 163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_USB RCC_APB1ENR_USBEN 164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*USB*/ 165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN 166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH 171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ALL (uint32_t)0xFFFFFFFFU 174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN 175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(ADC2) 176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN 177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*ADC2*/ 178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(ADC3) 179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN 180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*ADC3*/ 181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_AFIO RCC_APB2ENR_AFIOEN 182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOA RCC_APB2ENR_IOPAEN 183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOB RCC_APB2ENR_IOPBEN 184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOC RCC_APB2ENR_IOPCEN 185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOD RCC_APB2ENR_IOPDEN 186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(GPIOE) 187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOE RCC_APB2ENR_IOPEEN 188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*GPIOE*/ 189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(GPIOF) 190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOF RCC_APB2ENR_IOPFEN 191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*GPIOF*/ 192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(GPIOG) 193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_GPIOG RCC_APB2ENR_IOPGEN 194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*GPIOG*/ 195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN ARM GAS /tmp/ccw6diWF.s page 78 196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM10) 197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN 198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM10*/ 199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM11) 200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN 201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM11*/ 202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM15) 203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM15 RCC_APB2ENR_TIM15EN 204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM15*/ 205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM16) 206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM16 RCC_APB2ENR_TIM16EN 207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM16*/ 208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM17) 209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM17 RCC_APB2ENR_TIM17EN 210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM17*/ 211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM1 RCC_APB2ENR_TIM1EN 212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM8) 213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN 214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM8*/ 215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(TIM9) 216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN 217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /*TIM9*/ 218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN 219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Exported macro ------------------------------------------------------------*/ 228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Exported functions --------------------------------------------------------*/ 230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions 231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB1 AHB1 235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Enable AHB1 peripherals clock. 240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll AHBENR CRCEN LL_AHB1_GRP1_EnableClock\n 241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA1EN LL_AHB1_GRP1_EnableClock\n 242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA2EN LL_AHB1_GRP1_EnableClock\n 243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACEN LL_AHB1_GRP1_EnableClock\n 244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACRXEN LL_AHB1_GRP1_EnableClock\n 245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n 246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FLITFEN LL_AHB1_GRP1_EnableClock\n 247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FSMCEN LL_AHB1_GRP1_EnableClock\n 248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR OTGFSEN LL_AHB1_GRP1_EnableClock\n 249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SDIOEN LL_AHB1_GRP1_EnableClock\n 250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SRAMEN LL_AHB1_GRP1_EnableClock 251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC ARM GAS /tmp/ccw6diWF.s page 79 253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*) 255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) 257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH 259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*) 260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*) 261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*) 262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM 263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) 268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __IO uint32_t tmpreg; 270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->AHBENR, Periphs); 271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHBENR, Periphs); 273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (void)tmpreg; 274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not 278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll AHBENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n 279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n 280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n 281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n 282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n 283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n 284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FLITFEN LL_AHB1_GRP1_IsEnabledClock\n 285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FSMCEN LL_AHB1_GRP1_IsEnabledClock\n 286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR OTGFSEN LL_AHB1_GRP1_IsEnabledClock\n 287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SDIOEN LL_AHB1_GRP1_IsEnabledClock\n 288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SRAMEN LL_AHB1_GRP1_IsEnabledClock 289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*) 293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) 295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH 297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*) 298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*) 299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*) 300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM 301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) 306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** return (READ_BIT(RCC->AHBENR, Periphs) == Periphs); 308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** ARM GAS /tmp/ccw6diWF.s page 80 310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock. 312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll AHBENR CRCEN LL_AHB1_GRP1_DisableClock\n 313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA1EN LL_AHB1_GRP1_DisableClock\n 314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR DMA2EN LL_AHB1_GRP1_DisableClock\n 315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACEN LL_AHB1_GRP1_DisableClock\n 316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n 317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n 318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FLITFEN LL_AHB1_GRP1_DisableClock\n 319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR FSMCEN LL_AHB1_GRP1_DisableClock\n 320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR OTGFSEN LL_AHB1_GRP1_DisableClock\n 321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SDIOEN LL_AHB1_GRP1_DisableClock\n 322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBENR SRAMEN LL_AHB1_GRP1_DisableClock 323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 (*) 327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) 329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLASH 331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FSMC (*) 332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*) 333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SDIO (*) 334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM 335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) 340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->AHBENR, Periphs); 342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #if defined(RCC_AHBRSTR_SUPPORT) 345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Force AHB1 peripherals reset. 347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll AHBRSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n 348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBRSTR OTGFSRST LL_AHB1_GRP1_ForceReset 349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*) 353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) 358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->AHBRSTR, Periphs); 360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Release AHB1 peripherals reset. 364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll AHBRSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n 365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * AHBRSTR OTGFSRST LL_AHB1_GRP1_ReleaseReset 366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: ARM GAS /tmp/ccw6diWF.s page 81 367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL 368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGFS (*) 370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) 375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->AHBRSTR, Periphs); 377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** #endif /* RCC_AHBRSTR_SUPPORT */ 379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1 385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Enable APB1 peripherals clock. 390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB1ENR BKPEN LL_APB1_GRP1_EnableClock\n 391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n 392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n 393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n 394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n 395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n 396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n 397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n 398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n 399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n 400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_EnableClock\n 401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n 402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n 403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n 404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n 405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n 406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_EnableClock\n 407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n 408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n 409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n 410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n 411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n 412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n 413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_EnableClock\n 414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock 415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_BKP 417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) 418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR ARM GAS /tmp/ccw6diWF.s page 82 424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) 426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) 427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) 428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) 429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) 432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) 433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) 436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) 437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) 439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) 446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __IO uint32_t tmpreg; 448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); 449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs); 451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (void)tmpreg; 452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not 456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB1ENR BKPEN LL_APB1_GRP1_IsEnabledClock\n 457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n 458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n 459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n 460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n 461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n 462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n 463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n 464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n 465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n 466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_IsEnabledClock\n 467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_IsEnabledClock\n 468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_IsEnabledClock\n 469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n 470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n 471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n 472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n 473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n 474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n 475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n 476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n 477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n 478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n 479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_IsEnabledClock\n 480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock ARM GAS /tmp/ccw6diWF.s page 83 481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_BKP 483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) 484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) 492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) 493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) 494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) 495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) 498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) 499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) 502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) 503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) 505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) 512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); 514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Disable APB1 peripherals clock. 518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB1ENR BKPEN LL_APB1_GRP1_DisableClock\n 519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_DisableClock\n 520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_DisableClock\n 521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_DisableClock\n 522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n 523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n 524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n 525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n 526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n 527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_DisableClock\n 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n 529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n 530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n 531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n 532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n 533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_DisableClock\n 534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n 535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n 536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n 537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_DisableClock\n ARM GAS /tmp/ccw6diWF.s page 84 538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n 539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n 540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_DisableClock\n 541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR USBEN LL_APB1_GRP1_DisableClock\n 542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock 543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_BKP 545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) 546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) 554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) 555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) 556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) 557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) 560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) 561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) 564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) 565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) 567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) 574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->APB1ENR, Periphs); 576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Force APB1 peripherals reset. 580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB1RSTR BKPRST LL_APB1_GRP1_ForceReset\n 581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n 582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n 583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n 584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n 585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n 586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n 587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n 588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n 589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n 590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ForceReset\n 591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ForceReset\n 592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ForceReset\n 593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n 594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n ARM GAS /tmp/ccw6diWF.s page 85 595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n 596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n 597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n 598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n 599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n 600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n 601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n 602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n 603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ForceReset\n 604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset 605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL 607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_BKP 608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) 609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) 617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) 618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) 619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) 620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) 623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) 624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) 627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) 628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) 630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) 631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) 886 .loc 3 636 22 view .LVU269 887 .LBB47: 637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs); 888 .loc 3 638 3 view .LVU270 889 001c 1A4B ldr r3, .L43+12 890 001e 1A69 ldr r2, [r3, #16] 891 0020 42F00102 orr r2, r2, #1 892 0024 1A61 str r2, [r3, #16] 893 .LVL97: 894 .loc 3 638 3 is_stmt 0 view .LVU271 895 .LBE47: 896 .LBE46: 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 897 .loc 1 177 5 is_stmt 1 view .LVU272 ARM GAS /tmp/ccw6diWF.s page 86 898 .LBB48: 899 .LBI48: 639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Release APB1 peripherals reset. 643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB1RSTR BKPRST LL_APB1_GRP1_ReleaseReset\n 644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n 645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n 646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n 647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n 648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n 649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n 650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n 651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n 652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n 653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n 654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n 655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n 656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n 657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n 658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n 659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n 660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n 661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n 662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ReleaseReset\n 663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ReleaseReset\n 664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n 665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ReleaseReset\n 666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR USBRST LL_APB1_GRP1_ReleaseReset\n 667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset 668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_ALL 670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_BKP 671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) 672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) 674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) 675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 (*) 677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR 678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) 679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) 680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) 681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) 682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) 683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) 686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 (*) 687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) 688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) 689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) 690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) 691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) 693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USB (*) ARM GAS /tmp/ccw6diWF.s page 87 694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) 900 .loc 3 699 22 view .LVU273 901 .LBB49: 700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs); 902 .loc 3 701 3 view .LVU274 903 0026 1A69 ldr r2, [r3, #16] 904 0028 22F00102 bic r2, r2, #1 905 002c 1A61 str r2, [r3, #16] 906 .LBE49: 907 .LBE48: 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 908 .loc 1 169 15 is_stmt 0 view .LVU275 909 002e 0020 movs r0, #0 910 .LVL98: 911 .LBB51: 912 .LBB50: 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 913 .loc 3 702 1 view .LVU276 914 0030 7047 bx lr 915 .LVL99: 916 .L40: 917 .loc 3 702 1 view .LVU277 918 .LBE50: 919 .LBE51: 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1); 920 .loc 1 182 5 is_stmt 1 view .LVU278 921 .LBB52: 922 .LBI52: 703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @} 706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2 709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @{ 710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Enable APB2 peripherals clock. 714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n 715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n 716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n 717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR AFIOEN LL_APB2_GRP1_EnableClock\n 718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPAEN LL_APB2_GRP1_EnableClock\n 719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPBEN LL_APB2_GRP1_EnableClock\n 720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPCEN LL_APB2_GRP1_EnableClock\n 721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPDEN LL_APB2_GRP1_EnableClock\n 722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPEEN LL_APB2_GRP1_EnableClock\n 723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPFEN LL_APB2_GRP1_EnableClock\n 724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPGEN LL_APB2_GRP1_EnableClock\n 725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n ARM GAS /tmp/ccw6diWF.s page 88 726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM10EN LL_APB2_GRP1_EnableClock\n 727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n 728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM15EN LL_APB2_GRP1_EnableClock\n 729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM16EN LL_APB2_GRP1_EnableClock\n 730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM17EN LL_APB2_GRP1_EnableClock\n 731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n 732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n 733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM9EN LL_APB2_GRP1_EnableClock\n 734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock 735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) 738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) 739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_AFIO 740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOA 741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOB 742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOC 743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOD 744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*) 745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*) 746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*) 747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) 749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*) 750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*) 751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*) 752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*) 753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) 755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*) 756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) 762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __IO uint32_t tmpreg; 764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); 765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs); 767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** (void)tmpreg; 768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Check if APB2 peripheral clock is enabled or not 772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB2ENR ADC1EN LL_APB2_GRP1_IsEnabledClock\n 773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_IsEnabledClock\n 774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_IsEnabledClock\n 775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR AFIOEN LL_APB2_GRP1_IsEnabledClock\n 776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPAEN LL_APB2_GRP1_IsEnabledClock\n 777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPBEN LL_APB2_GRP1_IsEnabledClock\n 778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPCEN LL_APB2_GRP1_IsEnabledClock\n 779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPDEN LL_APB2_GRP1_IsEnabledClock\n 780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPEEN LL_APB2_GRP1_IsEnabledClock\n 781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPFEN LL_APB2_GRP1_IsEnabledClock\n 782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPGEN LL_APB2_GRP1_IsEnabledClock\n ARM GAS /tmp/ccw6diWF.s page 89 783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock\n 784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM10EN LL_APB2_GRP1_IsEnabledClock\n 785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_IsEnabledClock\n 786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM15EN LL_APB2_GRP1_IsEnabledClock\n 787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM16EN LL_APB2_GRP1_IsEnabledClock\n 788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM17EN LL_APB2_GRP1_IsEnabledClock\n 789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock\n 790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock\n 791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM9EN LL_APB2_GRP1_IsEnabledClock\n 792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock 793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) 796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) 797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_AFIO 798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOA 799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOB 800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOC 801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOD 802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*) 803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*) 804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*) 805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) 807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*) 808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*) 809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*) 810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*) 811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) 813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*) 814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval State of Periphs (1 or 0). 818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) 820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); 822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Disable APB2 peripherals clock. 826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB2ENR ADC1EN LL_APB2_GRP1_DisableClock\n 827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_DisableClock\n 828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_DisableClock\n 829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR AFIOEN LL_APB2_GRP1_DisableClock\n 830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPAEN LL_APB2_GRP1_DisableClock\n 831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPBEN LL_APB2_GRP1_DisableClock\n 832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPCEN LL_APB2_GRP1_DisableClock\n 833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPDEN LL_APB2_GRP1_DisableClock\n 834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPEEN LL_APB2_GRP1_DisableClock\n 835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPFEN LL_APB2_GRP1_DisableClock\n 836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR IOPGEN LL_APB2_GRP1_DisableClock\n 837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_DisableClock\n 838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM10EN LL_APB2_GRP1_DisableClock\n 839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_DisableClock\n ARM GAS /tmp/ccw6diWF.s page 90 840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM15EN LL_APB2_GRP1_DisableClock\n 841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM16EN LL_APB2_GRP1_DisableClock\n 842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM17EN LL_APB2_GRP1_DisableClock\n 843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM1EN LL_APB2_GRP1_DisableClock\n 844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_DisableClock\n 845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR TIM9EN LL_APB2_GRP1_DisableClock\n 846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_DisableClock 847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) 850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) 851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_AFIO 852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOA 853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOB 854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOC 855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOD 856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*) 857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*) 858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*) 859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) 861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*) 862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*) 863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*) 864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*) 865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) 867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*) 868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) 874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->APB2ENR, Periphs); 876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Force APB2 peripherals reset. 880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB2RSTR ADC1RST LL_APB2_GRP1_ForceReset\n 881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR ADC2RST LL_APB2_GRP1_ForceReset\n 882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR ADC3RST LL_APB2_GRP1_ForceReset\n 883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR AFIORST LL_APB2_GRP1_ForceReset\n 884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPARST LL_APB2_GRP1_ForceReset\n 885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPBRST LL_APB2_GRP1_ForceReset\n 886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPCRST LL_APB2_GRP1_ForceReset\n 887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPDRST LL_APB2_GRP1_ForceReset\n 888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPERST LL_APB2_GRP1_ForceReset\n 889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPFRST LL_APB2_GRP1_ForceReset\n 890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPGRST LL_APB2_GRP1_ForceReset\n 891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n 892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ForceReset\n 893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ForceReset\n 894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM15RST LL_APB2_GRP1_ForceReset\n 895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM16RST LL_APB2_GRP1_ForceReset\n 896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM17RST LL_APB2_GRP1_ForceReset\n ARM GAS /tmp/ccw6diWF.s page 91 897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n 898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset\n 899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM9RST LL_APB2_GRP1_ForceReset\n 900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset 901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL 903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) 905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) 906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_AFIO 907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOA 908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOB 909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOC 910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOD 911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*) 912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*) 913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*) 914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) 916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*) 917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*) 918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*) 919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*) 920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) 922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*) 923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) 923 .loc 3 928 22 view .LVU279 924 .LBB53: 929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** SET_BIT(RCC->APB2RSTR, Periphs); 925 .loc 3 930 3 view .LVU280 926 0032 03F56443 add r3, r3, #58368 927 0036 DA68 ldr r2, [r3, #12] 928 0038 42F40062 orr r2, r2, #2048 929 003c DA60 str r2, [r3, #12] 930 .LVL100: 931 .loc 3 930 3 is_stmt 0 view .LVU281 932 .LBE53: 933 .LBE52: 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 934 .loc 1 183 5 is_stmt 1 view .LVU282 935 .LBB54: 936 .LBI54: 931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** /** 934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @brief Release APB2 peripherals reset. 935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @rmtoll APB2RSTR ADC1RST LL_APB2_GRP1_ReleaseReset\n 936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR ADC2RST LL_APB2_GRP1_ReleaseReset\n 937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR ADC3RST LL_APB2_GRP1_ReleaseReset\n 938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR AFIORST LL_APB2_GRP1_ReleaseReset\n ARM GAS /tmp/ccw6diWF.s page 92 939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPARST LL_APB2_GRP1_ReleaseReset\n 940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPBRST LL_APB2_GRP1_ReleaseReset\n 941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPCRST LL_APB2_GRP1_ReleaseReset\n 942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPDRST LL_APB2_GRP1_ReleaseReset\n 943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPERST LL_APB2_GRP1_ReleaseReset\n 944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPFRST LL_APB2_GRP1_ReleaseReset\n 945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR IOPGRST LL_APB2_GRP1_ReleaseReset\n 946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR SPI1RST LL_APB2_GRP1_ReleaseReset\n 947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n 948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n 949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM15RST LL_APB2_GRP1_ReleaseReset\n 950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM16RST LL_APB2_GRP1_ReleaseReset\n 951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM17RST LL_APB2_GRP1_ReleaseReset\n 952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset\n 953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM8RST LL_APB2_GRP1_ReleaseReset\n 954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR TIM9RST LL_APB2_GRP1_ReleaseReset\n 955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * APB2RSTR USART1RST LL_APB2_GRP1_ReleaseReset 956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL 958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) 960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) 961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_AFIO 962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOA 963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOB 964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOC 965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOD 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOE (*) 967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOF (*) 968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_GPIOG (*) 969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) 971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 (*) 972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM15 (*) 973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM16 (*) 974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM17 (*) 975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) 977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 (*) 978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1 979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * 980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * (*) value not defined in all devices. 981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** * @retval None 982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** */ 983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) 937 .loc 3 983 22 view .LVU283 938 .LBB55: 984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** CLEAR_BIT(RCC->APB2RSTR, Periphs); 939 .loc 3 985 3 view .LVU284 940 003e DA68 ldr r2, [r3, #12] 941 0040 22F40062 bic r2, r2, #2048 942 0044 DA60 str r2, [r3, #12] 943 .LBE55: 944 .LBE54: 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 945 .loc 1 169 15 is_stmt 0 view .LVU285 ARM GAS /tmp/ccw6diWF.s page 93 946 0046 0020 movs r0, #0 947 .LVL101: 948 .LBB57: 949 .LBB56: 986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 950 .loc 3 986 1 view .LVU286 951 0048 7047 bx lr 952 .LVL102: 953 .L41: 954 .loc 3 986 1 view .LVU287 955 .LBE56: 956 .LBE57: 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM3); 957 .loc 1 189 5 is_stmt 1 view .LVU288 958 .LBB58: 959 .LBI58: 636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 960 .loc 3 636 22 view .LVU289 961 .LBB59: 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 962 .loc 3 638 3 view .LVU290 963 004a 03F50333 add r3, r3, #134144 964 004e 1A69 ldr r2, [r3, #16] 965 0050 42F00202 orr r2, r2, #2 966 0054 1A61 str r2, [r3, #16] 967 .LVL103: 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 968 .loc 3 638 3 is_stmt 0 view .LVU291 969 .LBE59: 970 .LBE58: 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 971 .loc 1 190 5 is_stmt 1 view .LVU292 972 .LBB60: 973 .LBI60: 699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 974 .loc 3 699 22 view .LVU293 975 .LBB61: 701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 976 .loc 3 701 3 view .LVU294 977 0056 1A69 ldr r2, [r3, #16] 978 0058 22F00202 bic r2, r2, #2 979 005c 1A61 str r2, [r3, #16] 980 .LBE61: 981 .LBE60: 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 982 .loc 1 169 15 is_stmt 0 view .LVU295 983 005e 0020 movs r0, #0 984 .LVL104: 985 .LBB63: 986 .LBB62: 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 987 .loc 3 702 1 view .LVU296 988 0060 7047 bx lr 989 .LVL105: 990 .L42: 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 991 .loc 3 702 1 view .LVU297 ARM GAS /tmp/ccw6diWF.s page 94 992 .LBE62: 993 .LBE63: 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM4); 994 .loc 1 196 5 is_stmt 1 view .LVU298 995 .LBB64: 996 .LBI64: 636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 997 .loc 3 636 22 view .LVU299 998 .LBB65: 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 999 .loc 3 638 3 view .LVU300 1000 0062 03F50233 add r3, r3, #133120 1001 0066 1A69 ldr r2, [r3, #16] 1002 0068 42F00402 orr r2, r2, #4 1003 006c 1A61 str r2, [r3, #16] 1004 .LVL106: 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 1005 .loc 3 638 3 is_stmt 0 view .LVU301 1006 .LBE65: 1007 .LBE64: 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1008 .loc 1 197 5 is_stmt 1 view .LVU302 1009 .LBB66: 1010 .LBI66: 699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** { 1011 .loc 3 699 22 view .LVU303 1012 .LBB67: 701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** } 1013 .loc 3 701 3 view .LVU304 1014 006e 1A69 ldr r2, [r3, #16] 1015 0070 22F00402 bic r2, r2, #4 1016 0074 1A61 str r2, [r3, #16] 1017 .LBE67: 1018 .LBE66: 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1019 .loc 1 169 15 is_stmt 0 view .LVU305 1020 0076 0020 movs r0, #0 1021 .LVL107: 1022 .LBB69: 1023 .LBB68: 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h **** 1024 .loc 3 702 1 view .LVU306 1025 0078 7047 bx lr 1026 .L44: 1027 007a 00BF .align 2 1028 .L43: 1029 007c 002C0140 .word 1073818624 1030 0080 00040040 .word 1073742848 1031 0084 00080040 .word 1073743872 1032 0088 00100240 .word 1073876992 1033 .LBE68: 1034 .LBE69: 1035 .cfi_endproc 1036 .LFE254: 1038 .section .text.LL_TIM_StructInit,"ax",%progbits 1039 .align 1 1040 .global LL_TIM_StructInit ARM GAS /tmp/ccw6diWF.s page 95 1041 .syntax unified 1042 .thumb 1043 .thumb_func 1045 LL_TIM_StructInit: 1046 .LVL108: 1047 .LFB255: 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1048 .loc 1 306 1 is_stmt 1 view -0 1049 .cfi_startproc 1050 @ args = 0, pretend = 0, frame = 0 1051 @ frame_needed = 0, uses_anonymous_args = 0 1052 @ link register save eliminated. 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP; 1053 .loc 1 308 3 view .LVU308 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->CounterMode = LL_TIM_COUNTERMODE_UP; 1054 .loc 1 308 37 is_stmt 0 view .LVU309 1055 0000 0023 movs r3, #0 1056 0002 0380 strh r3, [r0] @ movhi 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->Autoreload = 0xFFFFFFFFU; 1057 .loc 1 309 3 is_stmt 1 view .LVU310 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->Autoreload = 0xFFFFFFFFU; 1058 .loc 1 309 37 is_stmt 0 view .LVU311 1059 0004 4360 str r3, [r0, #4] 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; 1060 .loc 1 310 3 is_stmt 1 view .LVU312 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; 1061 .loc 1 310 37 is_stmt 0 view .LVU313 1062 0006 4FF0FF32 mov r2, #-1 1063 000a 8260 str r2, [r0, #8] 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->RepetitionCounter = 0x00000000U; 1064 .loc 1 311 3 is_stmt 1 view .LVU314 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_InitStruct->RepetitionCounter = 0x00000000U; 1065 .loc 1 311 37 is_stmt 0 view .LVU315 1066 000c C360 str r3, [r0, #12] 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1067 .loc 1 312 3 is_stmt 1 view .LVU316 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1068 .loc 1 312 37 is_stmt 0 view .LVU317 1069 000e 0361 str r3, [r0, #16] 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1070 .loc 1 313 1 view .LVU318 1071 0010 7047 bx lr 1072 .cfi_endproc 1073 .LFE255: 1075 .section .text.LL_TIM_Init,"ax",%progbits 1076 .align 1 1077 .global LL_TIM_Init 1078 .syntax unified 1079 .thumb 1080 .thumb_func 1082 LL_TIM_Init: 1083 .LVL109: 1084 .LFB256: 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr1; 1085 .loc 1 325 1 is_stmt 1 view -0 1086 .cfi_startproc 1087 @ args = 0, pretend = 0, frame = 0 ARM GAS /tmp/ccw6diWF.s page 96 1088 @ frame_needed = 0, uses_anonymous_args = 0 1089 @ link register save eliminated. 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1090 .loc 1 326 3 view .LVU320 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_COUNTERMODE(TIM_InitStruct->CounterMode)); 1091 .loc 1 329 3 view .LVU321 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_CLOCKDIVISION(TIM_InitStruct->ClockDivision)); 1092 .loc 1 330 3 view .LVU322 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1093 .loc 1 331 3 view .LVU323 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1094 .loc 1 333 3 view .LVU324 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1095 .loc 1 333 10 is_stmt 0 view .LVU325 1096 0000 0368 ldr r3, [r0] 1097 .LVL110: 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1098 .loc 1 335 3 is_stmt 1 view .LVU326 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1099 .loc 1 335 6 is_stmt 0 view .LVU327 1100 0002 1A4A ldr r2, .L53 1101 0004 9042 cmp r0, r2 1102 0006 0AD0 beq .L47 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1103 .loc 1 335 7 discriminator 1 view .LVU328 1104 0008 B0F1804F cmp r0, #1073741824 1105 000c 07D0 beq .L47 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1106 .loc 1 335 7 discriminator 2 view .LVU329 1107 000e A2F59432 sub r2, r2, #75776 1108 0012 9042 cmp r0, r2 1109 0014 03D0 beq .L47 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1110 .loc 1 335 7 discriminator 3 view .LVU330 1111 0016 02F58062 add r2, r2, #1024 1112 001a 9042 cmp r0, r2 1113 001c 03D1 bne .L48 1114 .L47: 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1115 .loc 1 338 5 is_stmt 1 view .LVU331 1116 001e 23F07003 bic r3, r3, #112 1117 .LVL111: 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1118 .loc 1 338 5 is_stmt 0 view .LVU332 1119 0022 4A68 ldr r2, [r1, #4] 1120 0024 1343 orrs r3, r3, r2 1121 .LVL112: 1122 .L48: 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1123 .loc 1 341 3 is_stmt 1 view .LVU333 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1124 .loc 1 341 6 is_stmt 0 view .LVU334 1125 0026 114A ldr r2, .L53 1126 0028 9042 cmp r0, r2 1127 002a 0AD0 beq .L49 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1128 .loc 1 341 7 discriminator 1 view .LVU335 ARM GAS /tmp/ccw6diWF.s page 97 1129 002c B0F1804F cmp r0, #1073741824 1130 0030 07D0 beq .L49 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1131 .loc 1 341 7 discriminator 2 view .LVU336 1132 0032 A2F59432 sub r2, r2, #75776 1133 0036 9042 cmp r0, r2 1134 0038 03D0 beq .L49 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1135 .loc 1 341 7 discriminator 3 view .LVU337 1136 003a 02F58062 add r2, r2, #1024 1137 003e 9042 cmp r0, r2 1138 0040 03D1 bne .L50 1139 .L49: 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1140 .loc 1 344 5 is_stmt 1 view .LVU338 1141 0042 23F44073 bic r3, r3, #768 1142 .LVL113: 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1143 .loc 1 344 5 is_stmt 0 view .LVU339 1144 0046 CA68 ldr r2, [r1, #12] 1145 0048 1343 orrs r3, r3, r2 1146 .LVL114: 1147 .L50: 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1148 .loc 1 348 3 is_stmt 1 view .LVU340 1149 004a 0360 str r3, [r0] 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1150 .loc 1 351 3 view .LVU341 1151 004c 8B68 ldr r3, [r1, #8] 1152 .LVL115: 1153 .LBB70: 1154 .LBI70: 1370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1155 .loc 2 1370 22 view .LVU342 1156 .LBB71: 1372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1157 .loc 2 1372 3 view .LVU343 1158 004e C362 str r3, [r0, #44] 1159 .LVL116: 1372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1160 .loc 2 1372 3 is_stmt 0 view .LVU344 1161 .LBE71: 1162 .LBE70: 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1163 .loc 1 354 3 is_stmt 1 view .LVU345 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1164 .loc 1 354 43 is_stmt 0 view .LVU346 1165 0050 0B88 ldrh r3, [r1] 1166 .LVL117: 1167 .LBB72: 1168 .LBI72: 1345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1169 .loc 2 1345 22 is_stmt 1 view .LVU347 1170 .LBB73: 1347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1171 .loc 2 1347 3 view .LVU348 1172 0052 8362 str r3, [r0, #40] ARM GAS /tmp/ccw6diWF.s page 98 1173 .LVL118: 1347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1174 .loc 2 1347 3 is_stmt 0 view .LVU349 1175 .LBE73: 1176 .LBE72: 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1177 .loc 1 356 3 is_stmt 1 view .LVU350 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1178 .loc 1 356 6 is_stmt 0 view .LVU351 1179 0054 054B ldr r3, .L53 1180 0056 9842 cmp r0, r3 1181 0058 05D0 beq .L52 1182 .L51: 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1183 .loc 1 364 3 is_stmt 1 view .LVU352 1184 .LVL119: 1185 .LBB74: 1186 .LBI74: 2081:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2082:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2083:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2084:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR1) set for output channel 1. 2085:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2086:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 2087:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1 2088:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2089:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2090:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2091:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx) 2092:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2093:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1)); 2094:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2095:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2097:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR2) set for output channel 2. 2098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2099:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 2 is supported by a timer instance. 2100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2 2101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx) 2105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR3) set for output channel 3. 2111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 2112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 3 is supported by a timer instance. 2113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3 2114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx) 2118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); ARM GAS /tmp/ccw6diWF.s page 99 2120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4. 2124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4 2127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) 2129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx) 2131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); 2133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Input_Channel Input channel configuration 2140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Configure input channel. 2144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n 2145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n 2146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n 2147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_Config\n 2148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_Config\n 2149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_Config\n 2150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_Config\n 2151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_Config\n 2152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_Config\n 2153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_Config\n 2154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_Config\n 2155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_Config\n 2156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1P LL_TIM_IC_Config\n 2157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n 2158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n 2159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n 2160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n 2161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n 2162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n 2163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values: 2170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_ 2171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8 2172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8 2173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING 2174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration) ARM GAS /tmp/ccw6diWF.s page 100 2177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChanne 2181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) 2182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** << SHIFT_TAB_ICxx[iChannel]); 2183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 2184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); 2185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the active input. 2189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n 2190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n 2191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n 2192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput 2193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values: 2200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 2201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 2202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC 2203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv 2206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT 2210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the current active input. 2214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n 2215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n 2216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n 2217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput 2218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI 2226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI 2227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC 2228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel) 2230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann ARM GAS /tmp/ccw6diWF.s page 101 2234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the prescaler of input channel. 2238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n 2239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n 2240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n 2241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler 2242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values: 2249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 2250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 2251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 2252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 2253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal 2256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT 2260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the current prescaler value acting on an input channel. 2264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n 2265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n 2266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n 2267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler 2268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 2276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 2277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 2278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8 2279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel) 2281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha 2285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the input filter duration. 2289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n 2290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_SetFilter\n ARM GAS /tmp/ccw6diWF.s page 102 2291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_SetFilter\n 2292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_SetFilter 2293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ICFilter This parameter can be one of the following values: 2300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 2301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 2302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 2303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 2304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 2305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 2306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 2307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 2308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 2309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 2310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 2311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 2312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 2313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 2314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 2315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 2316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter) 2319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC 2322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_ 2323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the input filter duration. 2327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n 2328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n 2329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n 2330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter 2331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: 2338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 2339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2 2340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4 2341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8 2342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6 2343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8 2344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6 2345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8 2346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6 2347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8 ARM GAS /tmp/ccw6diWF.s page 103 2348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5 2349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6 2350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8 2351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5 2352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6 2353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8 2354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel) 2356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann 2360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the input channel polarity. 2364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n 2365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_SetPolarity\n 2366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_SetPolarity\n 2367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_SetPolarity\n 2368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n 2369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n 2370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n 2371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ICPolarity This parameter can be one of the following values: 2378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING 2379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING 2380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity 2383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 2386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]); 2387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get the current input channel polarity. 2391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n 2392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n 2393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n 2394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n 2395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_GetPolarity\n 2396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_GetPolarity\n 2397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_GetPolarity\n 2398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval Returned value can be one of the following values: ARM GAS /tmp/ccw6diWF.s page 104 2405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING 2406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING 2407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel) 2409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >> 2412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]); 2413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination). 2417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides an XOR input. 2419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination 2420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx) 2424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S); 2426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input. 2430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides an XOR input. 2432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination 2433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx) 2437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); 2439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input. 2443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides an XOR input. 2445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination 2446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx) 2450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL); 2452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get captured value for input channel 1. 2456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * input channel 1 is supported by a timer instance. 2458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1 2459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 105 2462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx) 2463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1)); 2465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get captured value for input channel 2. 2469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * input channel 2 is supported by a timer instance. 2471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2 2472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx) 2476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2)); 2478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get captured value for input channel 3. 2482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not 2483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * input channel 3 is supported by a timer instance. 2484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3 2485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) 2489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); 2491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Get captured value for input channel 4. 2495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not 2496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * input channel 4 is supported by a timer instance. 2497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4 2498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 2500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx) 2502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4)); 2504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection 2511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable external clock mode 2. 2515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET 2516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock ARM GAS /tmp/ccw6diWF.s page 106 2519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx) 2523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE); 2525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable external clock mode 2. 2529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_DisableExternalClock 2532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx) 2536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE); 2538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled. 2542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock 2545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx) 2549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL); 2551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the clock source of the counter clock. 2555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note when selected clock source is external clock mode 1, the timer input 2556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput() 2557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * function. This timer input must be configured by calling 2558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * the @ref LL_TIM_IC_Config() function. 2559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check 2560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports external clock mode1. 2561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 2562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. 2563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetClockSource\n 2564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * SMCR ECE LL_TIM_SetClockSource 2565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ClockSource This parameter can be one of the following values: 2567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL 2568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1 2569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2 2570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource) 2573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource); 2575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } ARM GAS /tmp/ccw6diWF.s page 107 2576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the encoder interface mode. 2579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check 2580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance supports the encoder mode. 2581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode 2582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values: 2584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1 2585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2 2586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12 2587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode) 2590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode); 2592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration 2599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the trigger output (TRGO) used for timer synchronization . 2603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check 2604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer. 2605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput 2606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values: 2608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET 2609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_ENABLE 2610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_UPDATE 2611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_CC1IF 2612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF 2613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF 2614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF 2615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF 2616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization) 2619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization); 2621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the synchronization mode of a slave timer. 2625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode 2628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values: 2630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED 2631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET 2632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED ARM GAS /tmp/ccw6diWF.s page 108 2633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER 2634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode) 2637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode); 2639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Set the selects the trigger input to be used to synchronize the counter. 2643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR TS LL_TIM_SetTriggerInput 2646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TriggerInput This parameter can be one of the following values: 2648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR0 2649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR1 2650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2 2651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3 2652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED 2653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1 2654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2 2655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF 2656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput) 2659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput); 2661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable the Master/Slave mode. 2665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode 2668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx) 2672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_MSM); 2674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable the Master/Slave mode. 2678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode 2681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx) 2685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM); 2687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** ARM GAS /tmp/ccw6diWF.s page 109 2690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. 2691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not 2692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance can operate as a slave timer. 2693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode 2694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx) 2698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL); 2700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Configure the external trigger (ETR) input. 2704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not 2705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides an external trigger input. 2706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SMCR ETP LL_TIM_ConfigETR\n 2707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * SMCR ETPS LL_TIM_ConfigETR\n 2708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * SMCR ETF LL_TIM_ConfigETR 2709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ETRPolarity This parameter can be one of the following values: 2711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED 2712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_INVERTED 2713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ETRPrescaler This parameter can be one of the following values: 2714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1 2715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2 2716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4 2717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8 2718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values: 2719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1 2720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2 2721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4 2722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8 2723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6 2724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8 2725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6 2726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8 2727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6 2728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8 2729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5 2730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6 2731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8 2732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5 2733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6 2734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8 2735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale 2738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** uint32_t ETRFilter) 2739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | 2741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ARM GAS /tmp/ccw6diWF.s page 110 2747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration 2748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable the break function. 2752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_EnableBRK 2755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx) 2759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t tmpreg; 2761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BKE); 2762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. 2763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** tmpreg = READ_REG(TIMx->BDTR); 2764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (void)(tmpreg); 2765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable the break function. 2769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_DisableBRK 2770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx) 2776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t tmpreg; 2778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE); 2779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Note: Any write operation to this bit takes a delay of 1 APB clock cycle to become effective. 2780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** tmpreg = READ_REG(TIMx->BDTR); 2781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (void)(tmpreg); 2782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Configure the break input. 2786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR BKP LL_TIM_ConfigBRK 2789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values: 2791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW 2792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH 2793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity) 2796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __IO uint32_t tmpreg; 2798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP, BreakPolarity); 2799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /* Note: Any write operation to BKP bit takes a delay of 1 APB clock cycle to become effective. * 2800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** tmpreg = READ_REG(TIMx->BDTR); 2801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** (void)(tmpreg); 2802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** ARM GAS /tmp/ccw6diWF.s page 111 2804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes. 2806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n 2809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * BDTR OSSR LL_TIM_SetOffStates 2810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param OffStateIdle This parameter can be one of the following values: 2812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_DISABLE 2813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_ENABLE 2814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param OffStateRun This parameter can be one of the following values: 2815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_DISABLE 2816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_ENABLE 2817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat 2820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun); 2822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable automatic output (MOE can be set by software or automatically when a break input 2826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput 2829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx) 2833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_AOE); 2835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable automatic output (MOE can be set only by software). 2839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput 2842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) 2846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); 2848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. 2852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput 2855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx) 2859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL); ARM GAS /tmp/ccw6diWF.s page 112 2861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register). 2865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by 2866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * software and is reset in case of break or break2 event 2867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs 2870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx) 2874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE); 2876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register). 2880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by 2881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * software and is reset in case of break or break2 event. 2882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs 2885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx) 2889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE); 2891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether outputs are enabled. 2895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 2896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * a timer instance provides a break input. 2897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs 2898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) 2902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); 2904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration 2911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Configures the timer DMA burst feature. 2915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or 2916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * not a timer instance supports the DMA burst mode. 2917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n ARM GAS /tmp/ccw6diWF.s page 113 2918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst 2919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values: 2921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1 2922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2 2923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR 2924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER 2925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR 2926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR 2927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1 2928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2 2929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER 2930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT 2931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC 2932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR 2933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR 2934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1 2935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2 2936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3 2937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4 2938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR 2939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 2940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 2941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS 2942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS 2943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS 2944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS 2945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS 2946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS 2947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS 2948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS 2949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS 2950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS 2951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS 2952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS 2953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS 2954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS 2955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS 2956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS 2957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS 2958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_ 2961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength)); 2963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 2967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management 2971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 2972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF). ARM GAS /tmp/ccw6diWF.s page 114 2975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE 2976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 2978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx) 2980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_UIF)); 2982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending). 2986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE 2987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 2989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 2990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx) 2991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 2992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL); 2993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 2994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 2995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 2996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 interrupt flag (CC1F). 2997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1 2998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 2999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) 3002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); 3004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 inte 3008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1 3009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx) 3013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL); 3015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 interrupt flag (CC2F). 3019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2 3020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx) 3024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF)); 3026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3029:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 inte 3030:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2 3031:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance ARM GAS /tmp/ccw6diWF.s page 115 3032:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3033:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3034:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx) 3035:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3036:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL); 3037:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3038:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3039:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3040:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 interrupt flag (CC3F). 3041:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3 3042:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3043:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3044:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3045:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx) 3046:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3047:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF)); 3048:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3049:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3051:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 inte 3052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3 3053:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3054:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3055:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3056:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) 3057:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3058:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); 3059:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3060:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3061:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3062:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). 3063:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 3064:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3065:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3066:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3067:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx) 3068:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3069:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF)); 3070:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3071:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3072:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3073:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 inte 3074:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4 3075:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3076:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3077:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3078:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx) 3079:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3080:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL); 3081:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3082:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3083:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3084:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the commutation interrupt flag (COMIF). 3085:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR COMIF LL_TIM_ClearFlag_COM 3086:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3087:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3088:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 116 3089:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx) 3090:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3091:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF)); 3092:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3093:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3094:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3095:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pe 3096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM 3097:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3099:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx) 3101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL); 3103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the trigger interrupt flag (TIF). 3107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_ClearFlag_TRIG 3108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx) 3112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_TIF)); 3114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending). 3118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG 3119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx) 3123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL); 3125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the break interrupt flag (BIF). 3129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_ClearFlag_BRK 3130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) 3134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_BIF)); 3136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending). 3140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK 3141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx) 3145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { ARM GAS /tmp/ccw6diWF.s page 117 3146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL); 3147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF). 3151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR 3152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) 3156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF)); 3158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set 3162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (Capture/Compare 1 interrupt is pending). 3163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR 3164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) 3168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL); 3170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF). 3174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR 3175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) 3179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF)); 3181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set 3185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (Capture/Compare 2 over-capture interrupt is pending). 3186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR 3187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx) 3191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL); 3193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF). 3197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR 3198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) 3202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { ARM GAS /tmp/ccw6diWF.s page 118 3203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF)); 3204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set 3208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (Capture/Compare 3 over-capture interrupt is pending). 3209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR 3210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx) 3214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL); 3216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). 3220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR 3221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) 3225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF)); 3227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set 3231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * (Capture/Compare 4 over-capture interrupt is pending). 3232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR 3233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx) 3237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL); 3239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 3243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_IT_Management IT-Management 3246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 3247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable update interrupt (UIE). 3250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE 3251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) 3255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); 3257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** ARM GAS /tmp/ccw6diWF.s page 119 3260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable update interrupt (UIE). 3261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_DisableIT_UPDATE 3262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_UPDATE(TIM_TypeDef *TIMx) 3266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_UIE); 3268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the update interrupt (UIE) is enabled. 3272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_IsEnabledIT_UPDATE 3273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_UPDATE(const TIM_TypeDef *TIMx) 3277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_UIE) == (TIM_DIER_UIE)) ? 1UL : 0UL); 3279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 1 interrupt (CC1IE). 3283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_EnableIT_CC1 3284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC1(TIM_TypeDef *TIMx) 3288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC1IE); 3290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 1 interrupt (CC1IE). 3294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_DisableIT_CC1 3295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC1(TIM_TypeDef *TIMx) 3299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1IE); 3301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 1 interrupt (CC1IE) is enabled. 3305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1IE LL_TIM_IsEnabledIT_CC1 3306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC1(const TIM_TypeDef *TIMx) 3310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1IE) == (TIM_DIER_CC1IE)) ? 1UL : 0UL); 3312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 2 interrupt (CC2IE). 3316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2 ARM GAS /tmp/ccw6diWF.s page 120 3317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC2(TIM_TypeDef *TIMx) 3321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC2IE); 3323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 2 interrupt (CC2IE). 3327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_DisableIT_CC2 3328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC2(TIM_TypeDef *TIMx) 3332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2IE); 3334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 2 interrupt (CC2IE) is enabled. 3338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_IsEnabledIT_CC2 3339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC2(const TIM_TypeDef *TIMx) 3343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2IE) == (TIM_DIER_CC2IE)) ? 1UL : 0UL); 3345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 3 interrupt (CC3IE). 3349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_EnableIT_CC3 3350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC3(TIM_TypeDef *TIMx) 3354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC3IE); 3356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 3 interrupt (CC3IE). 3360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_DisableIT_CC3 3361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC3(TIM_TypeDef *TIMx) 3365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3IE); 3367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 3 interrupt (CC3IE) is enabled. 3371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3 3372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). ARM GAS /tmp/ccw6diWF.s page 121 3374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC3(const TIM_TypeDef *TIMx) 3376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3IE) == (TIM_DIER_CC3IE)) ? 1UL : 0UL); 3378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 4 interrupt (CC4IE). 3382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_EnableIT_CC4 3383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_CC4(TIM_TypeDef *TIMx) 3387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4IE); 3389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 4 interrupt (CC4IE). 3393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_DisableIT_CC4 3394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_CC4(TIM_TypeDef *TIMx) 3398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4IE); 3400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 4 interrupt (CC4IE) is enabled. 3404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4IE LL_TIM_IsEnabledIT_CC4 3405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_CC4(const TIM_TypeDef *TIMx) 3409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4IE) == (TIM_DIER_CC4IE)) ? 1UL : 0UL); 3411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable commutation interrupt (COMIE). 3415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMIE LL_TIM_EnableIT_COM 3416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_COM(TIM_TypeDef *TIMx) 3420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_COMIE); 3422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable commutation interrupt (COMIE). 3426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMIE LL_TIM_DisableIT_COM 3427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx) ARM GAS /tmp/ccw6diWF.s page 122 3431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_COMIE); 3433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the commutation interrupt (COMIE) is enabled. 3437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMIE LL_TIM_IsEnabledIT_COM 3438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_COM(const TIM_TypeDef *TIMx) 3442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_COMIE) == (TIM_DIER_COMIE)) ? 1UL : 0UL); 3444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable trigger interrupt (TIE). 3448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_EnableIT_TRIG 3449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_TRIG(TIM_TypeDef *TIMx) 3453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_TIE); 3455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable trigger interrupt (TIE). 3459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_DisableIT_TRIG 3460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_TRIG(TIM_TypeDef *TIMx) 3464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_TIE); 3466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the trigger interrupt (TIE) is enabled. 3470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TIE LL_TIM_IsEnabledIT_TRIG 3471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_TRIG(const TIM_TypeDef *TIMx) 3475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_TIE) == (TIM_DIER_TIE)) ? 1UL : 0UL); 3477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable break interrupt (BIE). 3481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER BIE LL_TIM_EnableIT_BRK 3482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx) 3486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_BIE); ARM GAS /tmp/ccw6diWF.s page 123 3488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable break interrupt (BIE). 3492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER BIE LL_TIM_DisableIT_BRK 3493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_BRK(TIM_TypeDef *TIMx) 3497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_BIE); 3499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the break interrupt (BIE) is enabled. 3503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER BIE LL_TIM_IsEnabledIT_BRK 3504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_BRK(const TIM_TypeDef *TIMx) 3508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_BIE) == (TIM_DIER_BIE)) ? 1UL : 0UL); 3510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 3514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Management DMA Management 3517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 3518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable update DMA request (UDE). 3521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_EnableDMAReq_UPDATE 3522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_UPDATE(TIM_TypeDef *TIMx) 3526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UDE); 3528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable update DMA request (UDE). 3532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_DisableDMAReq_UPDATE 3533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_UPDATE(TIM_TypeDef *TIMx) 3537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_UDE); 3539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the update DMA request (UDE) is enabled. 3543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE 3544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance ARM GAS /tmp/ccw6diWF.s page 124 3545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_UPDATE(const TIM_TypeDef *TIMx) 3548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_UDE) == (TIM_DIER_UDE)) ? 1UL : 0UL); 3550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 1 DMA request (CC1DE). 3554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_EnableDMAReq_CC1 3555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC1(TIM_TypeDef *TIMx) 3559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC1DE); 3561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 1 DMA request (CC1DE). 3565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_DisableDMAReq_CC1 3566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC1(TIM_TypeDef *TIMx) 3570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC1DE); 3572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 1 DMA request (CC1DE) is enabled. 3576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC1DE LL_TIM_IsEnabledDMAReq_CC1 3577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC1(const TIM_TypeDef *TIMx) 3581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC1DE) == (TIM_DIER_CC1DE)) ? 1UL : 0UL); 3583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 2 DMA request (CC2DE). 3587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_EnableDMAReq_CC2 3588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC2(TIM_TypeDef *TIMx) 3592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC2DE); 3594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 2 DMA request (CC2DE). 3598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_DisableDMAReq_CC2 3599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ ARM GAS /tmp/ccw6diWF.s page 125 3602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx) 3603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC2DE); 3605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 2 DMA request (CC2DE) is enabled. 3609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC2DE LL_TIM_IsEnabledDMAReq_CC2 3610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC2(const TIM_TypeDef *TIMx) 3614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC2DE) == (TIM_DIER_CC2DE)) ? 1UL : 0UL); 3616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 3 DMA request (CC3DE). 3620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_EnableDMAReq_CC3 3621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC3(TIM_TypeDef *TIMx) 3625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC3DE); 3627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 3 DMA request (CC3DE). 3631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_DisableDMAReq_CC3 3632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC3(TIM_TypeDef *TIMx) 3636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC3DE); 3638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 3 DMA request (CC3DE) is enabled. 3642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC3DE LL_TIM_IsEnabledDMAReq_CC3 3643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC3(const TIM_TypeDef *TIMx) 3647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC3DE) == (TIM_DIER_CC3DE)) ? 1UL : 0UL); 3649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable capture/compare 4 DMA request (CC4DE). 3653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_EnableDMAReq_CC4 3654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx) 3658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { ARM GAS /tmp/ccw6diWF.s page 126 3659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4DE); 3660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable capture/compare 4 DMA request (CC4DE). 3664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_DisableDMAReq_CC4 3665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC4(TIM_TypeDef *TIMx) 3669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_CC4DE); 3671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the capture/compare 4 DMA request (CC4DE) is enabled. 3675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER CC4DE LL_TIM_IsEnabledDMAReq_CC4 3676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_CC4(const TIM_TypeDef *TIMx) 3680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_CC4DE) == (TIM_DIER_CC4DE)) ? 1UL : 0UL); 3682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable commutation DMA request (COMDE). 3686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMDE LL_TIM_EnableDMAReq_COM 3687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_COM(TIM_TypeDef *TIMx) 3691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_COMDE); 3693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable commutation DMA request (COMDE). 3697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMDE LL_TIM_DisableDMAReq_COM 3698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_COM(TIM_TypeDef *TIMx) 3702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_COMDE); 3704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the commutation DMA request (COMDE) is enabled. 3708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER COMDE LL_TIM_IsEnabledDMAReq_COM 3709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_COM(const TIM_TypeDef *TIMx) 3713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL); 3715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } ARM GAS /tmp/ccw6diWF.s page 127 3716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Enable trigger interrupt (TDE). 3719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_EnableDMAReq_TRIG 3720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_TRIG(TIM_TypeDef *TIMx) 3724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_TDE); 3726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Disable trigger interrupt (TDE). 3730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_DisableDMAReq_TRIG 3731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_TRIG(TIM_TypeDef *TIMx) 3735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** CLEAR_BIT(TIMx->DIER, TIM_DIER_TDE); 3737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Indicates whether the trigger interrupt (TDE) is enabled. 3741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll DIER TDE LL_TIM_IsEnabledDMAReq_TRIG 3742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval State of bit (1 or 0). 3744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledDMAReq_TRIG(const TIM_TypeDef *TIMx) 3746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_TDE) == (TIM_DIER_TDE)) ? 1UL : 0UL); 3748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 3749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @} 3752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 3754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** @defgroup TIM_LL_EF_EVENT_Management EVENT-Management 3755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @{ 3756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** /** 3758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @brief Generate an update event. 3759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @rmtoll EGR UG LL_TIM_GenerateEvent_UPDATE 3760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @param TIMx Timer instance 3761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** * @retval None 3762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** */ 3763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_GenerateEvent_UPDATE(TIM_TypeDef *TIMx) 1187 .loc 2 3763 22 view .LVU353 1188 .LBB75: 3764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 3765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** SET_BIT(TIMx->EGR, TIM_EGR_UG); 1189 .loc 2 3765 3 view .LVU354 1190 005a 4369 ldr r3, [r0, #20] 1191 005c 43F00103 orr r3, r3, #1 1192 0060 4361 str r3, [r0, #20] 1193 .LVL120: ARM GAS /tmp/ccw6diWF.s page 128 1194 .loc 2 3765 3 is_stmt 0 view .LVU355 1195 .LBE75: 1196 .LBE74: 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1197 .loc 1 366 3 is_stmt 1 view .LVU356 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1198 .loc 1 367 1 is_stmt 0 view .LVU357 1199 0062 0020 movs r0, #0 1200 .LVL121: 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1201 .loc 1 367 1 view .LVU358 1202 0064 7047 bx lr 1203 .LVL122: 1204 .L52: 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1205 .loc 1 359 5 is_stmt 1 view .LVU359 1206 0066 0B69 ldr r3, [r1, #16] 1207 .LVL123: 1208 .LBB76: 1209 .LBI76: 1395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1210 .loc 2 1395 22 view .LVU360 1211 .LBB77: 1397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1212 .loc 2 1397 3 view .LVU361 1213 0068 0363 str r3, [r0, #48] 1398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** 1214 .loc 2 1398 1 is_stmt 0 view .LVU362 1215 006a F6E7 b .L51 1216 .L54: 1217 .align 2 1218 .L53: 1219 006c 002C0140 .word 1073818624 1220 .LBE77: 1221 .LBE76: 1222 .cfi_endproc 1223 .LFE256: 1225 .section .text.LL_TIM_OC_StructInit,"ax",%progbits 1226 .align 1 1227 .global LL_TIM_OC_StructInit 1228 .syntax unified 1229 .thumb 1230 .thumb_func 1232 LL_TIM_OC_StructInit: 1233 .LVL124: 1234 .LFB257: 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1235 .loc 1 377 1 is_stmt 1 view -0 1236 .cfi_startproc 1237 @ args = 0, pretend = 0, frame = 0 1238 @ frame_needed = 0, uses_anonymous_args = 0 1239 @ link register save eliminated. 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE; 1240 .loc 1 379 3 view .LVU364 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCState = LL_TIM_OCSTATE_DISABLE; 1241 .loc 1 379 35 is_stmt 0 view .LVU365 1242 0000 0023 movs r3, #0 ARM GAS /tmp/ccw6diWF.s page 129 1243 0002 0360 str r3, [r0] 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; 1244 .loc 1 380 3 is_stmt 1 view .LVU366 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNState = LL_TIM_OCSTATE_DISABLE; 1245 .loc 1 380 35 is_stmt 0 view .LVU367 1246 0004 4360 str r3, [r0, #4] 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->CompareValue = 0x00000000U; 1247 .loc 1 381 3 is_stmt 1 view .LVU368 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->CompareValue = 0x00000000U; 1248 .loc 1 381 35 is_stmt 0 view .LVU369 1249 0006 8360 str r3, [r0, #8] 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; 1250 .loc 1 382 3 is_stmt 1 view .LVU370 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH; 1251 .loc 1 382 35 is_stmt 0 view .LVU371 1252 0008 C360 str r3, [r0, #12] 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNPolarity = LL_TIM_OCPOLARITY_HIGH; 1253 .loc 1 383 3 is_stmt 1 view .LVU372 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNPolarity = LL_TIM_OCPOLARITY_HIGH; 1254 .loc 1 383 35 is_stmt 0 view .LVU373 1255 000a 0361 str r3, [r0, #16] 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCIdleState = LL_TIM_OCIDLESTATE_LOW; 1256 .loc 1 384 3 is_stmt 1 view .LVU374 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCIdleState = LL_TIM_OCIDLESTATE_LOW; 1257 .loc 1 384 35 is_stmt 0 view .LVU375 1258 000c 4361 str r3, [r0, #20] 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW; 1259 .loc 1 385 3 is_stmt 1 view .LVU376 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW; 1260 .loc 1 385 35 is_stmt 0 view .LVU377 1261 000e 8361 str r3, [r0, #24] 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1262 .loc 1 386 3 is_stmt 1 view .LVU378 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1263 .loc 1 386 35 is_stmt 0 view .LVU379 1264 0010 C361 str r3, [r0, #28] 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1265 .loc 1 387 1 view .LVU380 1266 0012 7047 bx lr 1267 .cfi_endproc 1268 .LFE257: 1270 .section .text.LL_TIM_OC_Init,"ax",%progbits 1271 .align 1 1272 .global LL_TIM_OC_Init 1273 .syntax unified 1274 .thumb 1275 .thumb_func 1277 LL_TIM_OC_Init: 1278 .LVL125: 1279 .LFB258: 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 1280 .loc 1 404 1 is_stmt 1 view -0 1281 .cfi_startproc 1282 @ args = 0, pretend = 0, frame = 0 1283 @ frame_needed = 0, uses_anonymous_args = 0 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 1284 .loc 1 404 1 is_stmt 0 view .LVU382 ARM GAS /tmp/ccw6diWF.s page 130 1285 0000 08B5 push {r3, lr} 1286 .LCFI20: 1287 .cfi_def_cfa_offset 8 1288 .cfi_offset 3, -8 1289 .cfi_offset 14, -4 1290 0002 0B46 mov r3, r1 1291 0004 1146 mov r1, r2 1292 .LVL126: 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1293 .loc 1 405 3 is_stmt 1 view .LVU383 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1294 .loc 1 407 3 view .LVU384 1295 0006 B3F5807F cmp r3, #256 1296 000a 14D0 beq .L57 1297 000c 08D8 bhi .L58 1298 000e 012B cmp r3, #1 1299 0010 0ED0 beq .L59 1300 0012 102B cmp r3, #16 1301 0014 02D1 bne .L64 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1302 .loc 1 413 7 view .LVU385 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1303 .loc 1 413 16 is_stmt 0 view .LVU386 1304 0016 FFF7FEFF bl OC2Config 1305 .LVL127: 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 1306 .loc 1 414 7 is_stmt 1 view .LVU387 1307 001a 08E0 b .L61 1308 .LVL128: 1309 .L64: 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1310 .loc 1 407 3 is_stmt 0 view .LVU388 1311 001c 0120 movs r0, #1 1312 .LVL129: 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1313 .loc 1 407 3 view .LVU389 1314 001e 06E0 b .L61 1315 .LVL130: 1316 .L58: 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1317 .loc 1 407 3 view .LVU390 1318 0020 B3F5805F cmp r3, #4096 1319 0024 02D1 bne .L65 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1320 .loc 1 419 7 is_stmt 1 view .LVU391 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1321 .loc 1 419 16 is_stmt 0 view .LVU392 1322 0026 FFF7FEFF bl OC4Config 1323 .LVL131: 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** default: 1324 .loc 1 420 7 is_stmt 1 view .LVU393 1325 002a 00E0 b .L61 1326 .LVL132: 1327 .L65: 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1328 .loc 1 407 3 is_stmt 0 view .LVU394 1329 002c 0120 movs r0, #1 ARM GAS /tmp/ccw6diWF.s page 131 1330 .LVL133: 1331 .L61: 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1332 .loc 1 425 3 is_stmt 1 view .LVU395 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1333 .loc 1 426 1 is_stmt 0 view .LVU396 1334 002e 08BD pop {r3, pc} 1335 .LVL134: 1336 .L59: 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1337 .loc 1 410 7 is_stmt 1 view .LVU397 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1338 .loc 1 410 16 is_stmt 0 view .LVU398 1339 0030 FFF7FEFF bl OC1Config 1340 .LVL135: 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 1341 .loc 1 411 7 is_stmt 1 view .LVU399 1342 0034 FBE7 b .L61 1343 .LVL136: 1344 .L57: 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1345 .loc 1 416 7 view .LVU400 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1346 .loc 1 416 16 is_stmt 0 view .LVU401 1347 0036 FFF7FEFF bl OC3Config 1348 .LVL137: 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 1349 .loc 1 417 7 is_stmt 1 view .LVU402 1350 003a F8E7 b .L61 1351 .cfi_endproc 1352 .LFE258: 1354 .section .text.LL_TIM_IC_StructInit,"ax",%progbits 1355 .align 1 1356 .global LL_TIM_IC_StructInit 1357 .syntax unified 1358 .thumb 1359 .thumb_func 1361 LL_TIM_IC_StructInit: 1362 .LVL138: 1363 .LFB259: 436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1364 .loc 1 436 1 view -0 1365 .cfi_startproc 1366 @ args = 0, pretend = 0, frame = 0 1367 @ frame_needed = 0, uses_anonymous_args = 0 1368 @ link register save eliminated. 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1369 .loc 1 438 3 view .LVU404 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1370 .loc 1 438 35 is_stmt 0 view .LVU405 1371 0000 0023 movs r3, #0 1372 0002 0360 str r3, [r0] 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1; 1373 .loc 1 439 3 is_stmt 1 view .LVU406 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICPrescaler = LL_TIM_ICPSC_DIV1; 1374 .loc 1 439 35 is_stmt 0 view .LVU407 1375 0004 4FF48032 mov r2, #65536 ARM GAS /tmp/ccw6diWF.s page 132 1376 0008 4260 str r2, [r0, #4] 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1; 1377 .loc 1 440 3 is_stmt 1 view .LVU408 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_ICInitStruct->ICFilter = LL_TIM_IC_FILTER_FDIV1; 1378 .loc 1 440 35 is_stmt 0 view .LVU409 1379 000a 8360 str r3, [r0, #8] 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1380 .loc 1 441 3 is_stmt 1 view .LVU410 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1381 .loc 1 441 35 is_stmt 0 view .LVU411 1382 000c C360 str r3, [r0, #12] 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1383 .loc 1 442 1 view .LVU412 1384 000e 7047 bx lr 1385 .cfi_endproc 1386 .LFE259: 1388 .section .text.LL_TIM_IC_Init,"ax",%progbits 1389 .align 1 1390 .global LL_TIM_IC_Init 1391 .syntax unified 1392 .thumb 1393 .thumb_func 1395 LL_TIM_IC_Init: 1396 .LVL139: 1397 .LFB260: 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 1398 .loc 1 459 1 is_stmt 1 view -0 1399 .cfi_startproc 1400 @ args = 0, pretend = 0, frame = 0 1401 @ frame_needed = 0, uses_anonymous_args = 0 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** ErrorStatus result = ERROR; 1402 .loc 1 459 1 is_stmt 0 view .LVU414 1403 0000 08B5 push {r3, lr} 1404 .LCFI21: 1405 .cfi_def_cfa_offset 8 1406 .cfi_offset 3, -8 1407 .cfi_offset 14, -4 1408 0002 0B46 mov r3, r1 1409 0004 1146 mov r1, r2 1410 .LVL140: 460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1411 .loc 1 460 3 is_stmt 1 view .LVU415 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1412 .loc 1 462 3 view .LVU416 1413 0006 B3F5807F cmp r3, #256 1414 000a 14D0 beq .L68 1415 000c 08D8 bhi .L69 1416 000e 012B cmp r3, #1 1417 0010 0ED0 beq .L70 1418 0012 102B cmp r3, #16 1419 0014 02D1 bne .L75 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1420 .loc 1 468 7 view .LVU417 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1421 .loc 1 468 16 is_stmt 0 view .LVU418 1422 0016 FFF7FEFF bl IC2Config 1423 .LVL141: ARM GAS /tmp/ccw6diWF.s page 133 469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH3: 1424 .loc 1 469 7 is_stmt 1 view .LVU419 1425 001a 08E0 b .L72 1426 .LVL142: 1427 .L75: 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1428 .loc 1 462 3 is_stmt 0 view .LVU420 1429 001c 0120 movs r0, #1 1430 .LVL143: 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1431 .loc 1 462 3 view .LVU421 1432 001e 06E0 b .L72 1433 .LVL144: 1434 .L69: 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1435 .loc 1 462 3 view .LVU422 1436 0020 B3F5805F cmp r3, #4096 1437 0024 02D1 bne .L76 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1438 .loc 1 474 7 is_stmt 1 view .LVU423 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1439 .loc 1 474 16 is_stmt 0 view .LVU424 1440 0026 FFF7FEFF bl IC4Config 1441 .LVL145: 475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** default: 1442 .loc 1 475 7 is_stmt 1 view .LVU425 1443 002a 00E0 b .L72 1444 .LVL146: 1445 .L76: 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** { 1446 .loc 1 462 3 is_stmt 0 view .LVU426 1447 002c 0120 movs r0, #1 1448 .LVL147: 1449 .L72: 480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1450 .loc 1 480 3 is_stmt 1 view .LVU427 481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1451 .loc 1 481 1 is_stmt 0 view .LVU428 1452 002e 08BD pop {r3, pc} 1453 .LVL148: 1454 .L70: 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1455 .loc 1 465 7 is_stmt 1 view .LVU429 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1456 .loc 1 465 16 is_stmt 0 view .LVU430 1457 0030 FFF7FEFF bl IC1Config 1458 .LVL149: 466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH2: 1459 .loc 1 466 7 is_stmt 1 view .LVU431 1460 0034 FBE7 b .L72 1461 .LVL150: 1462 .L68: 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1463 .loc 1 471 7 view .LVU432 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** break; 1464 .loc 1 471 16 is_stmt 0 view .LVU433 1465 0036 FFF7FEFF bl IC3Config ARM GAS /tmp/ccw6diWF.s page 134 1466 .LVL151: 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** case LL_TIM_CHANNEL_CH4: 1467 .loc 1 472 7 is_stmt 1 view .LVU434 1468 003a F8E7 b .L72 1469 .cfi_endproc 1470 .LFE260: 1472 .section .text.LL_TIM_ENCODER_StructInit,"ax",%progbits 1473 .align 1 1474 .global LL_TIM_ENCODER_StructInit 1475 .syntax unified 1476 .thumb 1477 .thumb_func 1479 LL_TIM_ENCODER_StructInit: 1480 .LVL152: 1481 .LFB261: 490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1482 .loc 1 490 1 view -0 1483 .cfi_startproc 1484 @ args = 0, pretend = 0, frame = 0 1485 @ frame_needed = 0, uses_anonymous_args = 0 1486 @ link register save eliminated. 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 1487 .loc 1 492 3 view .LVU436 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Polarity = LL_TIM_IC_POLARITY_RISING; 1488 .loc 1 492 41 is_stmt 0 view .LVU437 1489 0000 0123 movs r3, #1 1490 0002 0360 str r3, [r0] 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1491 .loc 1 493 3 is_stmt 1 view .LVU438 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1492 .loc 1 493 41 is_stmt 0 view .LVU439 1493 0004 0023 movs r3, #0 1494 0006 4360 str r3, [r0, #4] 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 1495 .loc 1 494 3 is_stmt 1 view .LVU440 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 1496 .loc 1 494 41 is_stmt 0 view .LVU441 1497 0008 4FF48032 mov r2, #65536 1498 000c 8260 str r2, [r0, #8] 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 1499 .loc 1 495 3 is_stmt 1 view .LVU442 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 1500 .loc 1 495 41 is_stmt 0 view .LVU443 1501 000e C360 str r3, [r0, #12] 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING; 1502 .loc 1 496 3 is_stmt 1 view .LVU444 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Polarity = LL_TIM_IC_POLARITY_RISING; 1503 .loc 1 496 41 is_stmt 0 view .LVU445 1504 0010 0361 str r3, [r0, #16] 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1505 .loc 1 497 3 is_stmt 1 view .LVU446 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI; 1506 .loc 1 497 41 is_stmt 0 view .LVU447 1507 0012 4361 str r3, [r0, #20] 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1; 1508 .loc 1 498 3 is_stmt 1 view .LVU448 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Prescaler = LL_TIM_ICPSC_DIV1; ARM GAS /tmp/ccw6diWF.s page 135 1509 .loc 1 498 41 is_stmt 0 view .LVU449 1510 0014 8261 str r2, [r0, #24] 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1; 1511 .loc 1 499 3 is_stmt 1 view .LVU450 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_EncoderInitStruct->IC2Filter = LL_TIM_IC_FILTER_FDIV1; 1512 .loc 1 499 41 is_stmt 0 view .LVU451 1513 0016 C361 str r3, [r0, #28] 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1514 .loc 1 500 3 is_stmt 1 view .LVU452 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1515 .loc 1 500 41 is_stmt 0 view .LVU453 1516 0018 0362 str r3, [r0, #32] 501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1517 .loc 1 501 1 view .LVU454 1518 001a 7047 bx lr 1519 .cfi_endproc 1520 .LFE261: 1522 .section .text.LL_TIM_ENCODER_Init,"ax",%progbits 1523 .align 1 1524 .global LL_TIM_ENCODER_Init 1525 .syntax unified 1526 .thumb 1527 .thumb_func 1529 LL_TIM_ENCODER_Init: 1530 .LVL153: 1531 .LFB262: 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 1532 .loc 1 513 1 is_stmt 1 view -0 1533 .cfi_startproc 1534 @ args = 0, pretend = 0, frame = 0 1535 @ frame_needed = 0, uses_anonymous_args = 0 1536 @ link register save eliminated. 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; 1537 .loc 1 513 1 is_stmt 0 view .LVU456 1538 0000 10B4 push {r4} 1539 .LCFI22: 1540 .cfi_def_cfa_offset 4 1541 .cfi_offset 4, -4 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 1542 .loc 1 514 3 is_stmt 1 view .LVU457 515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1543 .loc 1 515 3 view .LVU458 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ENCODERMODE(TIM_EncoderInitStruct->EncoderMode)); 1544 .loc 1 518 3 view .LVU459 519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC1Polarity)); 1545 .loc 1 519 3 view .LVU460 520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC1ActiveInput)); 1546 .loc 1 520 3 view .LVU461 521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC1Prescaler)); 1547 .loc 1 521 3 view .LVU462 522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC1Filter)); 1548 .loc 1 522 3 view .LVU463 523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_EncoderInitStruct->IC2Polarity)); 1549 .loc 1 523 3 view .LVU464 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ACTIVEINPUT(TIM_EncoderInitStruct->IC2ActiveInput)); 1550 .loc 1 524 3 view .LVU465 525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_EncoderInitStruct->IC2Prescaler)); ARM GAS /tmp/ccw6diWF.s page 136 1551 .loc 1 525 3 view .LVU466 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_EncoderInitStruct->IC2Filter)); 1552 .loc 1 526 3 view .LVU467 527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1553 .loc 1 527 3 view .LVU468 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1554 .loc 1 530 3 view .LVU469 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1555 .loc 1 530 14 is_stmt 0 view .LVU470 1556 0002 036A ldr r3, [r0, #32] 1557 0004 23F01103 bic r3, r3, #17 1558 0008 0362 str r3, [r0, #32] 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1559 .loc 1 533 3 is_stmt 1 view .LVU471 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1560 .loc 1 533 12 is_stmt 0 view .LVU472 1561 000a 8369 ldr r3, [r0, #24] 1562 .LVL154: 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1563 .loc 1 536 3 is_stmt 1 view .LVU473 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1564 .loc 1 536 11 is_stmt 0 view .LVU474 1565 000c 026A ldr r2, [r0, #32] 1566 .LVL155: 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U); 1567 .loc 1 539 3 is_stmt 1 view .LVU475 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1ActiveInput >> 16U); 1568 .loc 1 539 12 is_stmt 0 view .LVU476 1569 000e 23F0FF03 bic r3, r3, #255 1570 .LVL156: 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 1571 .loc 1 540 3 is_stmt 1 view .LVU477 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 1572 .loc 1 540 64 is_stmt 0 view .LVU478 1573 0012 4C89 ldrh r4, [r1, #10] 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U); 1574 .loc 1 540 12 view .LVU479 1575 0014 1C43 orrs r4, r4, r3 1576 .LVL157: 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 1577 .loc 1 541 3 is_stmt 1 view .LVU480 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 1578 .loc 1 541 59 is_stmt 0 view .LVU481 1579 0016 4B8A ldrh r3, [r1, #18] 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Prescaler >> 16U); 1580 .loc 1 541 12 view .LVU482 1581 0018 1C43 orrs r4, r4, r3 1582 .LVL158: 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1583 .loc 1 542 3 is_stmt 1 view .LVU483 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1584 .loc 1 542 62 is_stmt 0 view .LVU484 1585 001a CB89 ldrh r3, [r1, #14] 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1586 .loc 1 542 12 view .LVU485 1587 001c 2343 orrs r3, r3, r4 1588 .LVL159: ARM GAS /tmp/ccw6diWF.s page 137 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U); 1589 .loc 1 545 3 is_stmt 1 view .LVU486 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2ActiveInput >> 8U); 1590 .loc 1 545 12 is_stmt 0 view .LVU487 1591 001e 23F47F43 bic r3, r3, #65280 1592 .LVL160: 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 1593 .loc 1 546 3 is_stmt 1 view .LVU488 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 1594 .loc 1 546 47 is_stmt 0 view .LVU489 1595 0022 8C69 ldr r4, [r1, #24] 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Filter >> 8U); 1596 .loc 1 546 12 view .LVU490 1597 0024 43EA1423 orr r3, r3, r4, lsr #8 1598 .LVL161: 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 1599 .loc 1 547 3 is_stmt 1 view .LVU491 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 1600 .loc 1 547 47 is_stmt 0 view .LVU492 1601 0028 0C6A ldr r4, [r1, #32] 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC2Prescaler >> 8U); 1602 .loc 1 547 12 view .LVU493 1603 002a 43EA1423 orr r3, r3, r4, lsr #8 1604 .LVL162: 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1605 .loc 1 548 3 is_stmt 1 view .LVU494 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1606 .loc 1 548 47 is_stmt 0 view .LVU495 1607 002e CC69 ldr r4, [r1, #28] 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1608 .loc 1 548 12 view .LVU496 1609 0030 43EA1423 orr r3, r3, r4, lsr #8 1610 .LVL163: 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 1611 .loc 1 551 3 is_stmt 1 view .LVU497 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity); 1612 .loc 1 551 11 is_stmt 0 view .LVU498 1613 0034 22F0AA04 bic r4, r2, #170 1614 .LVL164: 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 1615 .loc 1 552 3 is_stmt 1 view .LVU499 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 1616 .loc 1 552 46 is_stmt 0 view .LVU500 1617 0038 4A68 ldr r2, [r1, #4] 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC2Polarity << 4U); 1618 .loc 1 552 11 view .LVU501 1619 003a 2243 orrs r2, r2, r4 1620 .LVL165: 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1621 .loc 1 553 3 is_stmt 1 view .LVU502 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1622 .loc 1 553 46 is_stmt 0 view .LVU503 1623 003c 4C69 ldr r4, [r1, #20] 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1624 .loc 1 553 11 view .LVU504 1625 003e 42EA0412 orr r2, r2, r4, lsl #4 1626 .LVL166: ARM GAS /tmp/ccw6diWF.s page 138 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1627 .loc 1 554 3 is_stmt 1 view .LVU505 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1628 .loc 1 554 11 is_stmt 0 view .LVU506 1629 0042 42F01102 orr r2, r2, #17 1630 .LVL167: 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1631 .loc 1 557 3 is_stmt 1 view .LVU507 1632 0046 0968 ldr r1, [r1] 1633 .LVL168: 1634 .LBB78: 1635 .LBI78: 2589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1636 .loc 2 2589 22 view .LVU508 1637 .LBB79: 2591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1638 .loc 2 2591 3 view .LVU509 1639 0048 8468 ldr r4, [r0, #8] 1640 004a 24F0070C bic ip, r4, #7 1641 004e 41EA0C01 orr r1, r1, ip 1642 .LVL169: 2591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1643 .loc 2 2591 3 is_stmt 0 view .LVU510 1644 0052 8160 str r1, [r0, #8] 1645 .LVL170: 2591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1646 .loc 2 2591 3 view .LVU511 1647 .LBE79: 1648 .LBE78: 560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1649 .loc 1 560 3 is_stmt 1 view .LVU512 1650 0054 8361 str r3, [r0, #24] 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1651 .loc 1 563 3 view .LVU513 1652 0056 0262 str r2, [r0, #32] 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1653 .loc 1 565 3 view .LVU514 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1654 .loc 1 566 1 is_stmt 0 view .LVU515 1655 0058 0020 movs r0, #0 1656 .LVL171: 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1657 .loc 1 566 1 view .LVU516 1658 005a 10BC pop {r4} 1659 .LCFI23: 1660 .cfi_restore 4 1661 .cfi_def_cfa_offset 0 1662 005c 7047 bx lr 1663 .cfi_endproc 1664 .LFE262: 1666 .section .text.LL_TIM_HALLSENSOR_StructInit,"ax",%progbits 1667 .align 1 1668 .global LL_TIM_HALLSENSOR_StructInit 1669 .syntax unified 1670 .thumb 1671 .thumb_func 1673 LL_TIM_HALLSENSOR_StructInit: ARM GAS /tmp/ccw6diWF.s page 139 1674 .LVL172: 1675 .LFB263: 576:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1676 .loc 1 576 1 is_stmt 1 view -0 1677 .cfi_startproc 1678 @ args = 0, pretend = 0, frame = 0 1679 @ frame_needed = 0, uses_anonymous_args = 0 1680 @ link register save eliminated. 578:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 1681 .loc 1 578 3 view .LVU518 578:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Prescaler = LL_TIM_ICPSC_DIV1; 1682 .loc 1 578 47 is_stmt 0 view .LVU519 1683 0000 0023 movs r3, #0 1684 0002 0360 str r3, [r0] 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 1685 .loc 1 579 3 is_stmt 1 view .LVU520 579:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1; 1686 .loc 1 579 47 is_stmt 0 view .LVU521 1687 0004 4360 str r3, [r0, #4] 580:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->CommutationDelay = 0U; 1688 .loc 1 580 3 is_stmt 1 view .LVU522 580:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_HallSensorInitStruct->CommutationDelay = 0U; 1689 .loc 1 580 47 is_stmt 0 view .LVU523 1690 0006 8360 str r3, [r0, #8] 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1691 .loc 1 581 3 is_stmt 1 view .LVU524 581:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1692 .loc 1 581 47 is_stmt 0 view .LVU525 1693 0008 C360 str r3, [r0, #12] 582:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1694 .loc 1 582 1 view .LVU526 1695 000a 7047 bx lr 1696 .cfi_endproc 1697 .LFE263: 1699 .section .text.LL_TIM_HALLSENSOR_Init,"ax",%progbits 1700 .align 1 1701 .global LL_TIM_HALLSENSOR_Init 1702 .syntax unified 1703 .thumb 1704 .thumb_func 1706 LL_TIM_HALLSENSOR_Init: 1707 .LVL173: 1708 .LFB264: 604:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 1709 .loc 1 604 1 is_stmt 1 view -0 1710 .cfi_startproc 1711 @ args = 0, pretend = 0, frame = 0 1712 @ frame_needed = 0, uses_anonymous_args = 0 1713 @ link register save eliminated. 604:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpcr2; 1714 .loc 1 604 1 is_stmt 0 view .LVU528 1715 0000 30B4 push {r4, r5} 1716 .LCFI24: 1717 .cfi_def_cfa_offset 8 1718 .cfi_offset 4, -8 1719 .cfi_offset 5, -4 605:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccmr1; ARM GAS /tmp/ccw6diWF.s page 140 1720 .loc 1 605 3 is_stmt 1 view .LVU529 606:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpccer; 1721 .loc 1 606 3 view .LVU530 607:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpsmcr; 1722 .loc 1 607 3 view .LVU531 608:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1723 .loc 1 608 3 view .LVU532 611:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_POLARITY_ENCODER(TIM_HallSensorInitStruct->IC1Polarity)); 1724 .loc 1 611 3 view .LVU533 612:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_ICPSC(TIM_HallSensorInitStruct->IC1Prescaler)); 1725 .loc 1 612 3 view .LVU534 613:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_HallSensorInitStruct->IC1Filter)); 1726 .loc 1 613 3 view .LVU535 614:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1727 .loc 1 614 3 view .LVU536 617:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1728 .loc 1 617 3 view .LVU537 617:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1729 .loc 1 617 14 is_stmt 0 view .LVU538 1730 0002 036A ldr r3, [r0, #32] 1731 0004 23F01103 bic r3, r3, #17 1732 0008 0362 str r3, [r0, #32] 620:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1733 .loc 1 620 3 is_stmt 1 view .LVU539 620:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1734 .loc 1 620 10 is_stmt 0 view .LVU540 1735 000a 4568 ldr r5, [r0, #4] 1736 .LVL174: 623:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1737 .loc 1 623 3 is_stmt 1 view .LVU541 623:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1738 .loc 1 623 12 is_stmt 0 view .LVU542 1739 000c 8369 ldr r3, [r0, #24] 1740 .LVL175: 626:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1741 .loc 1 626 3 is_stmt 1 view .LVU543 626:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1742 .loc 1 626 11 is_stmt 0 view .LVU544 1743 000e 026A ldr r2, [r0, #32] 1744 .LVL176: 629:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1745 .loc 1 629 3 is_stmt 1 view .LVU545 629:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1746 .loc 1 629 11 is_stmt 0 view .LVU546 1747 0010 8468 ldr r4, [r0, #8] 1748 .LVL177: 632:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1749 .loc 1 632 3 is_stmt 1 view .LVU547 635:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1750 .loc 1 635 3 view .LVU548 635:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1751 .loc 1 635 10 is_stmt 0 view .LVU549 1752 0012 45F0D005 orr r5, r5, #208 1753 .LVL178: 638:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr |= LL_TIM_TS_TI1F_ED; 1754 .loc 1 638 3 is_stmt 1 view .LVU550 638:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr |= LL_TIM_TS_TI1F_ED; ARM GAS /tmp/ccw6diWF.s page 141 1755 .loc 1 638 11 is_stmt 0 view .LVU551 1756 0016 24F07704 bic r4, r4, #119 1757 .LVL179: 639:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpsmcr |= LL_TIM_SLAVEMODE_RESET; 1758 .loc 1 639 3 is_stmt 1 view .LVU552 640:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1759 .loc 1 640 3 view .LVU553 640:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1760 .loc 1 640 11 is_stmt 0 view .LVU554 1761 001a 44F04404 orr r4, r4, #68 1762 .LVL180: 643:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U); 1763 .loc 1 643 3 is_stmt 1 view .LVU555 643:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_ACTIVEINPUT_TRC >> 16U); 1764 .loc 1 643 12 is_stmt 0 view .LVU556 1765 001e 23F0FF03 bic r3, r3, #255 1766 .LVL181: 644:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U); 1767 .loc 1 644 3 is_stmt 1 view .LVU557 644:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Filter >> 16U); 1768 .loc 1 644 12 is_stmt 0 view .LVU558 1769 0022 43F00303 orr r3, r3, #3 1770 .LVL182: 645:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); 1771 .loc 1 645 3 is_stmt 1 view .LVU559 645:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); 1772 .loc 1 645 62 is_stmt 0 view .LVU560 1773 0026 B1F80AC0 ldrh ip, [r1, #10] 645:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U); 1774 .loc 1 645 12 view .LVU561 1775 002a 4CEA030C orr ip, ip, r3 1776 .LVL183: 646:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1777 .loc 1 646 3 is_stmt 1 view .LVU562 646:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1778 .loc 1 646 65 is_stmt 0 view .LVU563 1779 002e CB88 ldrh r3, [r1, #6] 646:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1780 .loc 1 646 12 view .LVU564 1781 0030 43EA0C03 orr r3, r3, ip 1782 .LVL184: 649:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U); 1783 .loc 1 649 3 is_stmt 1 view .LVU565 649:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(LL_TIM_OCMODE_PWM2 << 8U); 1784 .loc 1 649 12 is_stmt 0 view .LVU566 1785 0034 23F47C43 bic r3, r3, #64512 1786 .LVL185: 650:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1787 .loc 1 650 3 is_stmt 1 view .LVU567 650:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1788 .loc 1 650 12 is_stmt 0 view .LVU568 1789 0038 43F4E043 orr r3, r3, #28672 1790 .LVL186: 653:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_HallSensorInitStruct->IC1Polarity); 1791 .loc 1 653 3 is_stmt 1 view .LVU569 653:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_HallSensorInitStruct->IC1Polarity); 1792 .loc 1 653 11 is_stmt 0 view .LVU570 ARM GAS /tmp/ccw6diWF.s page 142 1793 003c 22F0AA0C bic ip, r2, #170 1794 .LVL187: 654:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1795 .loc 1 654 3 is_stmt 1 view .LVU571 654:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1796 .loc 1 654 49 is_stmt 0 view .LVU572 1797 0040 0A68 ldr r2, [r1] 654:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); 1798 .loc 1 654 11 view .LVU573 1799 0042 42EA0C02 orr r2, r2, ip 1800 .LVL188: 655:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1801 .loc 1 655 3 is_stmt 1 view .LVU574 655:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1802 .loc 1 655 11 is_stmt 0 view .LVU575 1803 0046 42F01102 orr r2, r2, #17 1804 .LVL189: 658:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1805 .loc 1 658 3 is_stmt 1 view .LVU576 1806 004a 4560 str r5, [r0, #4] 661:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1807 .loc 1 661 3 view .LVU577 1808 004c 8460 str r4, [r0, #8] 664:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1809 .loc 1 664 3 view .LVU578 1810 004e 8361 str r3, [r0, #24] 667:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1811 .loc 1 667 3 view .LVU579 1812 0050 0262 str r2, [r0, #32] 670:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1813 .loc 1 670 3 view .LVU580 1814 0052 CB68 ldr r3, [r1, #12] 1815 .LVL190: 1816 .LBB80: 1817 .LBI80: 2050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** { 1818 .loc 2 2050 22 view .LVU581 1819 .LBB81: 2052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1820 .loc 2 2052 3 view .LVU582 1821 0054 8363 str r3, [r0, #56] 1822 .LVL191: 2052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h **** } 1823 .loc 2 2052 3 is_stmt 0 view .LVU583 1824 .LBE81: 1825 .LBE80: 672:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1826 .loc 1 672 3 is_stmt 1 view .LVU584 673:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1827 .loc 1 673 1 is_stmt 0 view .LVU585 1828 0056 0020 movs r0, #0 1829 .LVL192: 673:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1830 .loc 1 673 1 view .LVU586 1831 0058 30BC pop {r4, r5} 1832 .LCFI25: 1833 .cfi_restore 5 ARM GAS /tmp/ccw6diWF.s page 143 1834 .cfi_restore 4 1835 .cfi_def_cfa_offset 0 1836 .LVL193: 673:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1837 .loc 1 673 1 view .LVU587 1838 005a 7047 bx lr 1839 .cfi_endproc 1840 .LFE264: 1842 .section .text.LL_TIM_BDTR_StructInit,"ax",%progbits 1843 .align 1 1844 .global LL_TIM_BDTR_StructInit 1845 .syntax unified 1846 .thumb 1847 .thumb_func 1849 LL_TIM_BDTR_StructInit: 1850 .LVL194: 1851 .LFB265: 683:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /* Set the default configuration */ 1852 .loc 1 683 1 is_stmt 1 view -0 1853 .cfi_startproc 1854 @ args = 0, pretend = 0, frame = 0 1855 @ frame_needed = 0, uses_anonymous_args = 0 1856 @ link register save eliminated. 685:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->OSSIState = LL_TIM_OSSI_DISABLE; 1857 .loc 1 685 3 view .LVU589 685:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->OSSIState = LL_TIM_OSSI_DISABLE; 1858 .loc 1 685 39 is_stmt 0 view .LVU590 1859 0000 0023 movs r3, #0 1860 0002 0360 str r3, [r0] 686:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->LockLevel = LL_TIM_LOCKLEVEL_OFF; 1861 .loc 1 686 3 is_stmt 1 view .LVU591 686:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->LockLevel = LL_TIM_LOCKLEVEL_OFF; 1862 .loc 1 686 39 is_stmt 0 view .LVU592 1863 0004 4360 str r3, [r0, #4] 687:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; 1864 .loc 1 687 3 is_stmt 1 view .LVU593 687:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->DeadTime = (uint8_t)0x00; 1865 .loc 1 687 39 is_stmt 0 view .LVU594 1866 0006 8360 str r3, [r0, #8] 688:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; 1867 .loc 1 688 3 is_stmt 1 view .LVU595 688:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakState = LL_TIM_BREAK_DISABLE; 1868 .loc 1 688 39 is_stmt 0 view .LVU596 1869 0008 0373 strb r3, [r0, #12] 689:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakPolarity = LL_TIM_BREAK_POLARITY_LOW; 1870 .loc 1 689 3 is_stmt 1 view .LVU597 689:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->BreakPolarity = LL_TIM_BREAK_POLARITY_LOW; 1871 .loc 1 689 39 is_stmt 0 view .LVU598 1872 000a C381 strh r3, [r0, #14] @ movhi 690:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE; 1873 .loc 1 690 3 is_stmt 1 view .LVU599 690:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE; 1874 .loc 1 690 39 is_stmt 0 view .LVU600 1875 000c 0361 str r3, [r0, #16] 691:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1876 .loc 1 691 3 is_stmt 1 view .LVU601 691:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } ARM GAS /tmp/ccw6diWF.s page 144 1877 .loc 1 691 39 is_stmt 0 view .LVU602 1878 000e 4361 str r3, [r0, #20] 692:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1879 .loc 1 692 1 view .LVU603 1880 0010 7047 bx lr 1881 .cfi_endproc 1882 .LFE265: 1884 .section .text.LL_TIM_BDTR_Init,"ax",%progbits 1885 .align 1 1886 .global LL_TIM_BDTR_Init 1887 .syntax unified 1888 .thumb 1889 .thumb_func 1891 LL_TIM_BDTR_Init: 1892 .LVL195: 1893 .LFB266: 709:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** uint32_t tmpbdtr = 0; 1894 .loc 1 709 1 is_stmt 1 view -0 1895 .cfi_startproc 1896 @ args = 0, pretend = 0, frame = 0 1897 @ frame_needed = 0, uses_anonymous_args = 0 1898 @ link register save eliminated. 710:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1899 .loc 1 710 3 view .LVU605 713:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OSSR_STATE(TIM_BDTRInitStruct->OSSRState)); 1900 .loc 1 713 3 view .LVU606 714:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_OSSI_STATE(TIM_BDTRInitStruct->OSSIState)); 1901 .loc 1 714 3 view .LVU607 715:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->LockLevel)); 1902 .loc 1 715 3 view .LVU608 716:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_BREAK_STATE(TIM_BDTRInitStruct->BreakState)); 1903 .loc 1 716 3 view .LVU609 717:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->BreakPolarity)); 1904 .loc 1 717 3 view .LVU610 718:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** assert_param(IS_LL_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->AutomaticOutput)); 1905 .loc 1 718 3 view .LVU611 719:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1906 .loc 1 719 3 view .LVU612 725:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel); 1907 .loc 1 725 3 view .LVU613 726:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); 1908 .loc 1 726 3 view .LVU614 1909 0000 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 1910 .LVL196: 726:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState); 1911 .loc 1 726 3 is_stmt 0 view .LVU615 1912 0002 8A68 ldr r2, [r1, #8] 1913 0004 1343 orrs r3, r3, r2 1914 .LVL197: 727:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); 1915 .loc 1 727 3 is_stmt 1 view .LVU616 1916 0006 23F48063 bic r3, r3, #1024 1917 .LVL198: 727:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); 1918 .loc 1 727 3 is_stmt 0 view .LVU617 1919 000a 4A68 ldr r2, [r1, #4] 1920 .LVL199: ARM GAS /tmp/ccw6diWF.s page 145 727:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState); 1921 .loc 1 727 3 view .LVU618 1922 000c 1343 orrs r3, r3, r2 1923 .LVL200: 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); 1924 .loc 1 728 3 is_stmt 1 view .LVU619 1925 000e 23F40063 bic r3, r3, #2048 1926 .LVL201: 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); 1927 .loc 1 728 3 is_stmt 0 view .LVU620 1928 0012 0A68 ldr r2, [r1] 1929 .LVL202: 728:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState); 1930 .loc 1 728 3 view .LVU621 1931 0014 1343 orrs r3, r3, r2 1932 .LVL203: 729:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); 1933 .loc 1 729 3 is_stmt 1 view .LVU622 1934 0016 23F48053 bic r3, r3, #4096 1935 .LVL204: 729:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); 1936 .loc 1 729 3 is_stmt 0 view .LVU623 1937 001a CA89 ldrh r2, [r1, #14] 1938 .LVL205: 729:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, TIM_BDTRInitStruct->BreakPolarity); 1939 .loc 1 729 3 view .LVU624 1940 001c 1343 orrs r3, r3, r2 1941 .LVL206: 730:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); 1942 .loc 1 730 3 is_stmt 1 view .LVU625 1943 001e 23F40053 bic r3, r3, #8192 1944 .LVL207: 730:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); 1945 .loc 1 730 3 is_stmt 0 view .LVU626 1946 0022 0A69 ldr r2, [r1, #16] 1947 .LVL208: 730:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, TIM_BDTRInitStruct->AutomaticOutput); 1948 .loc 1 730 3 view .LVU627 1949 0024 1343 orrs r3, r3, r2 1950 .LVL209: 731:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1951 .loc 1 731 3 is_stmt 1 view .LVU628 1952 0026 23F48043 bic r3, r3, #16384 1953 .LVL210: 731:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1954 .loc 1 731 3 is_stmt 0 view .LVU629 1955 002a 4A69 ldr r2, [r1, #20] 1956 .LVL211: 731:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1957 .loc 1 731 3 view .LVU630 1958 002c 1343 orrs r3, r3, r2 1959 .LVL212: 734:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** 1960 .loc 1 734 3 is_stmt 1 view .LVU631 1961 002e 4364 str r3, [r0, #68] 736:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** } 1962 .loc 1 736 3 view .LVU632 ARM GAS /tmp/ccw6diWF.s page 146 737:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1963 .loc 1 737 1 is_stmt 0 view .LVU633 1964 0030 0020 movs r0, #0 1965 .LVL213: 737:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c **** /** 1966 .loc 1 737 1 view .LVU634 1967 0032 7047 bx lr 1968 .cfi_endproc 1969 .LFE266: 1971 .text 1972 .Letext0: 1973 .file 4 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h" 1974 .file 5 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h" 1975 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h" 1976 .file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h" ARM GAS /tmp/ccw6diWF.s page 147 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f1xx_ll_tim.c /tmp/ccw6diWF.s:18 .text.OC1Config:0000000000000000 $t /tmp/ccw6diWF.s:23 .text.OC1Config:0000000000000000 OC1Config /tmp/ccw6diWF.s:165 .text.OC1Config:0000000000000068 $d /tmp/ccw6diWF.s:170 .text.OC2Config:0000000000000000 $t /tmp/ccw6diWF.s:175 .text.OC2Config:0000000000000000 OC2Config /tmp/ccw6diWF.s:317 .text.OC2Config:0000000000000070 $d /tmp/ccw6diWF.s:322 .text.OC3Config:0000000000000000 $t /tmp/ccw6diWF.s:327 .text.OC3Config:0000000000000000 OC3Config /tmp/ccw6diWF.s:469 .text.OC3Config:000000000000006c $d /tmp/ccw6diWF.s:474 .text.OC4Config:0000000000000000 $t /tmp/ccw6diWF.s:479 .text.OC4Config:0000000000000000 OC4Config /tmp/ccw6diWF.s:598 .text.OC4Config:0000000000000050 $d /tmp/ccw6diWF.s:603 .text.IC1Config:0000000000000000 $t /tmp/ccw6diWF.s:608 .text.IC1Config:0000000000000000 IC1Config /tmp/ccw6diWF.s:662 .text.IC2Config:0000000000000000 $t /tmp/ccw6diWF.s:667 .text.IC2Config:0000000000000000 IC2Config /tmp/ccw6diWF.s:721 .text.IC3Config:0000000000000000 $t /tmp/ccw6diWF.s:726 .text.IC3Config:0000000000000000 IC3Config /tmp/ccw6diWF.s:780 .text.IC4Config:0000000000000000 $t /tmp/ccw6diWF.s:785 .text.IC4Config:0000000000000000 IC4Config /tmp/ccw6diWF.s:839 .text.LL_TIM_DeInit:0000000000000000 $t /tmp/ccw6diWF.s:845 .text.LL_TIM_DeInit:0000000000000000 LL_TIM_DeInit /tmp/ccw6diWF.s:1029 .text.LL_TIM_DeInit:000000000000007c $d /tmp/ccw6diWF.s:1039 .text.LL_TIM_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1045 .text.LL_TIM_StructInit:0000000000000000 LL_TIM_StructInit /tmp/ccw6diWF.s:1076 .text.LL_TIM_Init:0000000000000000 $t /tmp/ccw6diWF.s:1082 .text.LL_TIM_Init:0000000000000000 LL_TIM_Init /tmp/ccw6diWF.s:1219 .text.LL_TIM_Init:000000000000006c $d /tmp/ccw6diWF.s:1226 .text.LL_TIM_OC_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1232 .text.LL_TIM_OC_StructInit:0000000000000000 LL_TIM_OC_StructInit /tmp/ccw6diWF.s:1271 .text.LL_TIM_OC_Init:0000000000000000 $t /tmp/ccw6diWF.s:1277 .text.LL_TIM_OC_Init:0000000000000000 LL_TIM_OC_Init /tmp/ccw6diWF.s:1355 .text.LL_TIM_IC_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1361 .text.LL_TIM_IC_StructInit:0000000000000000 LL_TIM_IC_StructInit /tmp/ccw6diWF.s:1389 .text.LL_TIM_IC_Init:0000000000000000 $t /tmp/ccw6diWF.s:1395 .text.LL_TIM_IC_Init:0000000000000000 LL_TIM_IC_Init /tmp/ccw6diWF.s:1473 .text.LL_TIM_ENCODER_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1479 .text.LL_TIM_ENCODER_StructInit:0000000000000000 LL_TIM_ENCODER_StructInit /tmp/ccw6diWF.s:1523 .text.LL_TIM_ENCODER_Init:0000000000000000 $t /tmp/ccw6diWF.s:1529 .text.LL_TIM_ENCODER_Init:0000000000000000 LL_TIM_ENCODER_Init /tmp/ccw6diWF.s:1667 .text.LL_TIM_HALLSENSOR_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1673 .text.LL_TIM_HALLSENSOR_StructInit:0000000000000000 LL_TIM_HALLSENSOR_StructInit /tmp/ccw6diWF.s:1700 .text.LL_TIM_HALLSENSOR_Init:0000000000000000 $t /tmp/ccw6diWF.s:1706 .text.LL_TIM_HALLSENSOR_Init:0000000000000000 LL_TIM_HALLSENSOR_Init /tmp/ccw6diWF.s:1843 .text.LL_TIM_BDTR_StructInit:0000000000000000 $t /tmp/ccw6diWF.s:1849 .text.LL_TIM_BDTR_StructInit:0000000000000000 LL_TIM_BDTR_StructInit /tmp/ccw6diWF.s:1885 .text.LL_TIM_BDTR_Init:0000000000000000 $t /tmp/ccw6diWF.s:1891 .text.LL_TIM_BDTR_Init:0000000000000000 LL_TIM_BDTR_Init NO UNDEFINED SYMBOLS