stm32f1xx_ll_sdmmc.c 49 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_sdmmc.c
  4. * @author MCD Application Team
  5. * @brief SDMMC Low Layer HAL module driver.
  6. *
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the SDMMC peripheral:
  9. * + Initialization/de-initialization functions
  10. * + I/O operation functions
  11. * + Peripheral Control functions
  12. * + Peripheral State functions
  13. *
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * Copyright (c) 2016 STMicroelectronics.
  18. * All rights reserved.
  19. *
  20. * This software is licensed under terms that can be found in the LICENSE file
  21. * in the root directory of this software component.
  22. * If no LICENSE file comes with this software, it is provided AS-IS.
  23. *
  24. ******************************************************************************
  25. @verbatim
  26. ==============================================================================
  27. ##### SDMMC peripheral features #####
  28. ==============================================================================
  29. [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB
  30. peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  31. devices.
  32. [..] The SDMMC features include the following:
  33. (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  34. for three different databus modes: 1-bit (default), 4-bit and 8-bit
  35. (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  36. (+) Full compliance with SD Memory Card Specifications Version 2.0
  37. (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  38. different data bus modes: 1-bit (default) and 4-bit
  39. (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  40. Rev1.1)
  41. (+) Data transfer up to 48 MHz for the 8 bit mode
  42. (+) Data and command output enable signals to control external bidirectional drivers
  43. ##### How to use this driver #####
  44. ==============================================================================
  45. [..]
  46. This driver is a considered as a driver of service for external devices drivers
  47. that interfaces with the SDMMC peripheral.
  48. According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  49. is used in the device's driver to perform SDMMC operations and functionalities.
  50. This driver is almost transparent for the final user, it is only used to implement other
  51. functionalities of the external device.
  52. [..]
  53. (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output (MSI, PLLUSB1CLK,
  54. PLLUSB2CLK). Before start working with SDMMC peripheral make sure that the
  55. PLL is well configured.
  56. The SDMMC peripheral uses two clock signals:
  57. (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  58. (++) APB2 bus clock (PCLK2)
  59. -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  60. Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  61. (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  62. peripheral.
  63. (+) Enable the Power ON State using the SDIO_PowerState_ON()
  64. function and disable it using the function SDIO_PowerState_OFF().
  65. (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  66. (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT()
  67. and __SDIO_DISABLE_IT() if you need to use interrupt mode.
  68. (+) When using the DMA mode
  69. (++) Configure the DMA in the MSP layer of the external device
  70. (++) Active the needed channel Request
  71. (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  72. __SDIO_DMA_DISABLE().
  73. (+) To control the CPSM (Command Path State Machine) and send
  74. commands to the card use the SDIO_SendCommand(),
  75. SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  76. to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  77. to the selected command to be sent.
  78. The parameters that should be filled are:
  79. (++) Command Argument
  80. (++) Command Index
  81. (++) Command Response type
  82. (++) Command Wait
  83. (++) CPSM Status (Enable or Disable).
  84. -@@- To check if the command is well received, read the SDIO_CMDRESP
  85. register using the SDIO_GetCommandResponse().
  86. The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  87. SDIO_GetResponse() function.
  88. (+) To control the DPSM (Data Path State Machine) and send/receive
  89. data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
  90. SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
  91. *** Read Operations ***
  92. =======================
  93. [..]
  94. (#) First, user has to fill the data structure (pointer to
  95. SDIO_DataInitTypeDef) according to the selected data type to be received.
  96. The parameters that should be filled are:
  97. (++) Data TimeOut
  98. (++) Data Length
  99. (++) Data Block size
  100. (++) Data Transfer direction: should be from card (To SDMMC)
  101. (++) Data Transfer mode
  102. (++) DPSM Status (Enable or Disable)
  103. (#) Configure the SDMMC resources to receive the data from the card
  104. according to selected transfer mode (Refer to Step 8, 9 and 10).
  105. (#) Send the selected Read command (refer to step 11).
  106. (#) Use the SDIO flags/interrupts to check the transfer status.
  107. *** Write Operations ***
  108. ========================
  109. [..]
  110. (#) First, user has to fill the data structure (pointer to
  111. SDIO_DataInitTypeDef) according to the selected data type to be received.
  112. The parameters that should be filled are:
  113. (++) Data TimeOut
  114. (++) Data Length
  115. (++) Data Block size
  116. (++) Data Transfer direction: should be to card (To CARD)
  117. (++) Data Transfer mode
  118. (++) DPSM Status (Enable or Disable)
  119. (#) Configure the SDMMC resources to send the data to the card according to
  120. selected transfer mode.
  121. (#) Send the selected Write command.
  122. (#) Use the SDIO flags/interrupts to check the transfer status.
  123. *** Command management operations ***
  124. =====================================
  125. [..]
  126. (#) The commands used for Read/Write/Erase operations are managed in
  127. separate functions.
  128. Each function allows to send the needed command with the related argument,
  129. then check the response.
  130. By the same approach, you could implement a command and check the response.
  131. @endverbatim
  132. ******************************************************************************
  133. */
  134. /* Includes ------------------------------------------------------------------*/
  135. #include "stm32f1xx_hal.h"
  136. #if defined(SDIO)
  137. /** @addtogroup STM32F1xx_HAL_Driver
  138. * @{
  139. */
  140. /** @defgroup SDMMC_LL SDMMC Low Layer
  141. * @brief Low layer module for SD
  142. * @{
  143. */
  144. #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
  145. /* Private typedef -----------------------------------------------------------*/
  146. /* Private define ------------------------------------------------------------*/
  147. /* Private macro -------------------------------------------------------------*/
  148. /* Private variables ---------------------------------------------------------*/
  149. /* Private function prototypes -----------------------------------------------*/
  150. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
  151. /* Exported functions --------------------------------------------------------*/
  152. /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
  153. * @{
  154. */
  155. /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
  156. * @brief Initialization and Configuration functions
  157. *
  158. @verbatim
  159. ===============================================================================
  160. ##### Initialization/de-initialization functions #####
  161. ===============================================================================
  162. [..] This section provides functions allowing to:
  163. @endverbatim
  164. * @{
  165. */
  166. /**
  167. * @brief Initializes the SDMMC according to the specified
  168. * parameters in the SDMMC_InitTypeDef and create the associated handle.
  169. * @param SDIOx: Pointer to SDMMC register base
  170. * @param Init: SDMMC initialization structure
  171. * @retval HAL status
  172. */
  173. HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
  174. {
  175. uint32_t tmpreg = 0;
  176. /* Check the parameters */
  177. assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
  178. assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
  179. assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
  180. assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
  181. assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
  182. assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
  183. assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
  184. /* Set SDMMC configuration parameters */
  185. tmpreg |= (Init.ClockEdge |\
  186. Init.ClockBypass |\
  187. Init.ClockPowerSave |\
  188. Init.BusWide |\
  189. Init.HardwareFlowControl |\
  190. Init.ClockDiv
  191. );
  192. /* Write to SDMMC CLKCR */
  193. MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
  194. return HAL_OK;
  195. }
  196. /**
  197. * @}
  198. */
  199. /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
  200. * @brief Data transfers functions
  201. *
  202. @verbatim
  203. ===============================================================================
  204. ##### I/O operation functions #####
  205. ===============================================================================
  206. [..]
  207. This subsection provides a set of functions allowing to manage the SDMMC data
  208. transfers.
  209. @endverbatim
  210. * @{
  211. */
  212. /**
  213. * @brief Read data (word) from Rx FIFO in blocking mode (polling)
  214. * @param SDIOx: Pointer to SDMMC register base
  215. * @retval HAL status
  216. */
  217. uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
  218. {
  219. /* Read data from Rx FIFO */
  220. return (SDIOx->FIFO);
  221. }
  222. /**
  223. * @brief Write data (word) to Tx FIFO in blocking mode (polling)
  224. * @param SDIOx: Pointer to SDMMC register base
  225. * @param pWriteData: pointer to data to write
  226. * @retval HAL status
  227. */
  228. HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
  229. {
  230. /* Write data to FIFO */
  231. SDIOx->FIFO = *pWriteData;
  232. return HAL_OK;
  233. }
  234. /**
  235. * @}
  236. */
  237. /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
  238. * @brief management functions
  239. *
  240. @verbatim
  241. ===============================================================================
  242. ##### Peripheral Control functions #####
  243. ===============================================================================
  244. [..]
  245. This subsection provides a set of functions allowing to control the SDMMC data
  246. transfers.
  247. @endverbatim
  248. * @{
  249. */
  250. /**
  251. * @brief Set SDMMC Power state to ON.
  252. * @param SDIOx: Pointer to SDMMC register base
  253. * @retval HAL status
  254. */
  255. HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
  256. {
  257. /* Set power state to ON */
  258. SDIOx->POWER = SDIO_POWER_PWRCTRL;
  259. return HAL_OK;
  260. }
  261. /**
  262. * @brief Set SDMMC Power state to OFF.
  263. * @param SDIOx: Pointer to SDMMC register base
  264. * @retval HAL status
  265. */
  266. HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
  267. {
  268. /* Set power state to OFF */
  269. SDIOx->POWER = (uint32_t)0x00000000;
  270. return HAL_OK;
  271. }
  272. /**
  273. * @brief Get SDMMC Power state.
  274. * @param SDIOx: Pointer to SDMMC register base
  275. * @retval Power status of the controller. The returned value can be one of the
  276. * following values:
  277. * - 0x00: Power OFF
  278. * - 0x02: Power UP
  279. * - 0x03: Power ON
  280. */
  281. uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
  282. {
  283. return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
  284. }
  285. /**
  286. * @brief Configure the SDMMC command path according to the specified parameters in
  287. * SDIO_CmdInitTypeDef structure and send the command
  288. * @param SDIOx: Pointer to SDMMC register base
  289. * @param Command: pointer to a SDIO_CmdInitTypeDef structure that contains
  290. * the configuration information for the SDMMC command
  291. * @retval HAL status
  292. */
  293. HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
  294. {
  295. uint32_t tmpreg = 0;
  296. /* Check the parameters */
  297. assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
  298. assert_param(IS_SDIO_RESPONSE(Command->Response));
  299. assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
  300. assert_param(IS_SDIO_CPSM(Command->CPSM));
  301. /* Set the SDMMC Argument value */
  302. SDIOx->ARG = Command->Argument;
  303. /* Set SDMMC command parameters */
  304. tmpreg |= (uint32_t)(Command->CmdIndex |\
  305. Command->Response |\
  306. Command->WaitForInterrupt |\
  307. Command->CPSM);
  308. /* Write to SDMMC CMD register */
  309. MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
  310. return HAL_OK;
  311. }
  312. /**
  313. * @brief Return the command index of last command for which response received
  314. * @param SDIOx: Pointer to SDMMC register base
  315. * @retval Command index of the last command response received
  316. */
  317. uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
  318. {
  319. return (uint8_t)(SDIOx->RESPCMD);
  320. }
  321. /**
  322. * @brief Return the response received from the card for the last command
  323. * @param SDIOx: Pointer to SDMMC register base
  324. * @param Response: Specifies the SDMMC response register.
  325. * This parameter can be one of the following values:
  326. * @arg SDIO_RESP1: Response Register 1
  327. * @arg SDIO_RESP2: Response Register 2
  328. * @arg SDIO_RESP3: Response Register 3
  329. * @arg SDIO_RESP4: Response Register 4
  330. * @retval The Corresponding response register value
  331. */
  332. uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
  333. {
  334. uint32_t tmp;
  335. /* Check the parameters */
  336. assert_param(IS_SDIO_RESP(Response));
  337. /* Get the response */
  338. tmp = (uint32_t)(&(SDIOx->RESP1)) + Response;
  339. return (*(__IO uint32_t *) tmp);
  340. }
  341. /**
  342. * @brief Configure the SDMMC data path according to the specified
  343. * parameters in the SDIO_DataInitTypeDef.
  344. * @param SDIOx: Pointer to SDIO register base
  345. * @param Data : pointer to a SDIO_DataInitTypeDef structure
  346. * that contains the configuration information for the SDMMC data.
  347. * @retval HAL status
  348. */
  349. HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
  350. {
  351. uint32_t tmpreg = 0;
  352. /* Check the parameters */
  353. assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
  354. assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
  355. assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
  356. assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
  357. assert_param(IS_SDIO_DPSM(Data->DPSM));
  358. /* Set the SDMMC Data TimeOut value */
  359. SDIOx->DTIMER = Data->DataTimeOut;
  360. /* Set the SDMMC DataLength value */
  361. SDIOx->DLEN = Data->DataLength;
  362. /* Set the SDMMC data configuration parameters */
  363. tmpreg |= (uint32_t)(Data->DataBlockSize |\
  364. Data->TransferDir |\
  365. Data->TransferMode |\
  366. Data->DPSM);
  367. /* Write to SDMMC DCTRL */
  368. MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
  369. return HAL_OK;
  370. }
  371. /**
  372. * @brief Returns number of remaining data bytes to be transferred.
  373. * @param SDIOx: Pointer to SDIO register base
  374. * @retval Number of remaining data bytes to be transferred
  375. */
  376. uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
  377. {
  378. return (SDIOx->DCOUNT);
  379. }
  380. /**
  381. * @brief Get the FIFO data
  382. * @param SDIOx: Pointer to SDIO register base
  383. * @retval Data received
  384. */
  385. uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
  386. {
  387. return (SDIOx->FIFO);
  388. }
  389. /**
  390. * @brief Sets one of the two options of inserting read wait interval.
  391. * @param SDIOx: Pointer to SDIO register base
  392. * @param SDIO_ReadWaitMode: SDMMC Read Wait operation mode.
  393. * This parameter can be:
  394. * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
  395. * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
  396. * @retval None
  397. */
  398. HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
  399. {
  400. /* Check the parameters */
  401. assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
  402. /* Set SDMMC read wait mode */
  403. MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
  404. return HAL_OK;
  405. }
  406. /**
  407. * @}
  408. */
  409. /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
  410. * @brief Data transfers functions
  411. *
  412. @verbatim
  413. ===============================================================================
  414. ##### Commands management functions #####
  415. ===============================================================================
  416. [..]
  417. This subsection provides a set of functions allowing to manage the needed commands.
  418. @endverbatim
  419. * @{
  420. */
  421. /**
  422. * @brief Send the Data Block Length command and check the response
  423. * @param SDIOx: Pointer to SDIO register base
  424. * @retval HAL status
  425. */
  426. uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
  427. {
  428. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  429. uint32_t errorstate;
  430. /* Set Block Size for Card */
  431. sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
  432. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
  433. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  434. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  435. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  436. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  437. /* Check for error conditions */
  438. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
  439. return errorstate;
  440. }
  441. /**
  442. * @brief Send the Read Single Block command and check the response
  443. * @param SDIOx: Pointer to SDIO register base
  444. * @retval HAL status
  445. */
  446. uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  447. {
  448. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  449. uint32_t errorstate;
  450. /* Set Block Size for Card */
  451. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  452. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
  453. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  454. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  455. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  456. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  457. /* Check for error conditions */
  458. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  459. return errorstate;
  460. }
  461. /**
  462. * @brief Send the Read Multi Block command and check the response
  463. * @param SDIOx: Pointer to SDIO register base
  464. * @retval HAL status
  465. */
  466. uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
  467. {
  468. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  469. uint32_t errorstate;
  470. /* Set Block Size for Card */
  471. sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
  472. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
  473. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  474. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  475. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  476. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  477. /* Check for error conditions */
  478. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
  479. return errorstate;
  480. }
  481. /**
  482. * @brief Send the Write Single Block command and check the response
  483. * @param SDIOx: Pointer to SDIO register base
  484. * @retval HAL status
  485. */
  486. uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  487. {
  488. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  489. uint32_t errorstate;
  490. /* Set Block Size for Card */
  491. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  492. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
  493. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  494. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  495. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  496. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  497. /* Check for error conditions */
  498. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
  499. return errorstate;
  500. }
  501. /**
  502. * @brief Send the Write Multi Block command and check the response
  503. * @param SDIOx: Pointer to SDIO register base
  504. * @retval HAL status
  505. */
  506. uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
  507. {
  508. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  509. uint32_t errorstate;
  510. /* Set Block Size for Card */
  511. sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
  512. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
  513. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  514. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  515. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  516. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  517. /* Check for error conditions */
  518. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
  519. return errorstate;
  520. }
  521. /**
  522. * @brief Send the Start Address Erase command for SD and check the response
  523. * @param SDIOx: Pointer to SDIO register base
  524. * @retval HAL status
  525. */
  526. uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  527. {
  528. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  529. uint32_t errorstate;
  530. /* Set Block Size for Card */
  531. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  532. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
  533. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  534. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  535. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  536. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  537. /* Check for error conditions */
  538. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  539. return errorstate;
  540. }
  541. /**
  542. * @brief Send the End Address Erase command for SD and check the response
  543. * @param SDIOx: Pointer to SDIO register base
  544. * @retval HAL status
  545. */
  546. uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  547. {
  548. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  549. uint32_t errorstate;
  550. /* Set Block Size for Card */
  551. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  552. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
  553. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  554. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  555. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  556. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  557. /* Check for error conditions */
  558. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  559. return errorstate;
  560. }
  561. /**
  562. * @brief Send the Start Address Erase command and check the response
  563. * @param SDIOx: Pointer to SDIO register base
  564. * @retval HAL status
  565. */
  566. uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
  567. {
  568. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  569. uint32_t errorstate;
  570. /* Set Block Size for Card */
  571. sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
  572. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
  573. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  574. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  575. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  576. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  577. /* Check for error conditions */
  578. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
  579. return errorstate;
  580. }
  581. /**
  582. * @brief Send the End Address Erase command and check the response
  583. * @param SDIOx: Pointer to SDIO register base
  584. * @retval HAL status
  585. */
  586. uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
  587. {
  588. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  589. uint32_t errorstate;
  590. /* Set Block Size for Card */
  591. sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
  592. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
  593. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  594. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  595. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  596. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  597. /* Check for error conditions */
  598. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
  599. return errorstate;
  600. }
  601. /**
  602. * @brief Send the Erase command and check the response
  603. * @param SDIOx: Pointer to SDIO register base
  604. * @retval HAL status
  605. */
  606. uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
  607. {
  608. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  609. uint32_t errorstate;
  610. /* Set Block Size for Card */
  611. sdmmc_cmdinit.Argument = 0U;
  612. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
  613. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  614. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  615. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  616. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  617. /* Check for error conditions */
  618. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT);
  619. return errorstate;
  620. }
  621. /**
  622. * @brief Send the Stop Transfer command and check the response.
  623. * @param SDIOx: Pointer to SDIO register base
  624. * @retval HAL status
  625. */
  626. uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
  627. {
  628. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  629. uint32_t errorstate;
  630. /* Send CMD12 STOP_TRANSMISSION */
  631. sdmmc_cmdinit.Argument = 0U;
  632. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
  633. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  634. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  635. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  636. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  637. /* Check for error conditions */
  638. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, SDIO_STOPTRANSFERTIMEOUT);
  639. return errorstate;
  640. }
  641. /**
  642. * @brief Send the Select Deselect command and check the response.
  643. * @param SDIOx: Pointer to SDIO register base
  644. * @param addr: Address of the card to be selected
  645. * @retval HAL status
  646. */
  647. uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
  648. {
  649. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  650. uint32_t errorstate;
  651. /* Send CMD7 SDMMC_SEL_DESEL_CARD */
  652. sdmmc_cmdinit.Argument = (uint32_t)Addr;
  653. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
  654. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  655. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  656. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  657. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  658. /* Check for error conditions */
  659. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
  660. return errorstate;
  661. }
  662. /**
  663. * @brief Send the Go Idle State command and check the response.
  664. * @param SDIOx: Pointer to SDIO register base
  665. * @retval HAL status
  666. */
  667. uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
  668. {
  669. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  670. uint32_t errorstate;
  671. sdmmc_cmdinit.Argument = 0U;
  672. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
  673. sdmmc_cmdinit.Response = SDIO_RESPONSE_NO;
  674. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  675. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  676. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  677. /* Check for error conditions */
  678. errorstate = SDMMC_GetCmdError(SDIOx);
  679. return errorstate;
  680. }
  681. /**
  682. * @brief Send the Operating Condition command and check the response.
  683. * @param SDIOx: Pointer to SDIO register base
  684. * @retval HAL status
  685. */
  686. uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
  687. {
  688. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  689. uint32_t errorstate;
  690. /* Send CMD8 to verify SD card interface operating condition */
  691. /* Argument: - [31:12]: Reserved (shall be set to '0')
  692. - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
  693. - [7:0]: Check Pattern (recommended 0xAA) */
  694. /* CMD Response: R7 */
  695. sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
  696. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  697. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  698. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  699. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  700. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  701. /* Check for error conditions */
  702. errorstate = SDMMC_GetCmdResp7(SDIOx);
  703. return errorstate;
  704. }
  705. /**
  706. * @brief Send the Application command to verify that that the next command
  707. * is an application specific com-mand rather than a standard command
  708. * and check the response.
  709. * @param SDIOx: Pointer to SDIO register base
  710. * @param Argument: Command Argument
  711. * @retval HAL status
  712. */
  713. uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  714. {
  715. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  716. uint32_t errorstate;
  717. sdmmc_cmdinit.Argument = (uint32_t)Argument;
  718. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
  719. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  720. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  721. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  722. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  723. /* Check for error conditions */
  724. /* If there is a HAL_ERROR, it is a MMC card, else
  725. it is a SD card: SD card 2.0 (voltage range mismatch)
  726. or SD card 1.x */
  727. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
  728. return errorstate;
  729. }
  730. /**
  731. * @brief Send the command asking the accessed card to send its operating
  732. * condition register (OCR)
  733. * @param SDIOx: Pointer to SDIO register base
  734. * @param Argument: Command Argument
  735. * @retval HAL status
  736. */
  737. uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
  738. {
  739. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  740. uint32_t errorstate;
  741. sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
  742. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
  743. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  744. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  745. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  746. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  747. /* Check for error conditions */
  748. errorstate = SDMMC_GetCmdResp3(SDIOx);
  749. return errorstate;
  750. }
  751. /**
  752. * @brief Send the Bus Width command and check the response.
  753. * @param SDIOx: Pointer to SDIO register base
  754. * @param BusWidth: BusWidth
  755. * @retval HAL status
  756. */
  757. uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
  758. {
  759. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  760. uint32_t errorstate;
  761. sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
  762. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
  763. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  764. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  765. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  766. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  767. /* Check for error conditions */
  768. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
  769. return errorstate;
  770. }
  771. /**
  772. * @brief Send the Send SCR command and check the response.
  773. * @param SDIOx: Pointer to SDIO register base
  774. * @retval HAL status
  775. */
  776. uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
  777. {
  778. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  779. uint32_t errorstate;
  780. /* Send CMD51 SD_APP_SEND_SCR */
  781. sdmmc_cmdinit.Argument = 0U;
  782. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
  783. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  784. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  785. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  786. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  787. /* Check for error conditions */
  788. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
  789. return errorstate;
  790. }
  791. /**
  792. * @brief Send the Send CID command and check the response.
  793. * @param SDIOx: Pointer to SDIO register base
  794. * @retval HAL status
  795. */
  796. uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
  797. {
  798. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  799. uint32_t errorstate;
  800. /* Send CMD2 ALL_SEND_CID */
  801. sdmmc_cmdinit.Argument = 0U;
  802. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
  803. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  804. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  805. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  806. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  807. /* Check for error conditions */
  808. errorstate = SDMMC_GetCmdResp2(SDIOx);
  809. return errorstate;
  810. }
  811. /**
  812. * @brief Send the Send CSD command and check the response.
  813. * @param SDIOx: Pointer to SDIO register base
  814. * @param Argument: Command Argument
  815. * @retval HAL status
  816. */
  817. uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
  818. {
  819. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  820. uint32_t errorstate;
  821. /* Send CMD9 SEND_CSD */
  822. sdmmc_cmdinit.Argument = Argument;
  823. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
  824. sdmmc_cmdinit.Response = SDIO_RESPONSE_LONG;
  825. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  826. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  827. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  828. /* Check for error conditions */
  829. errorstate = SDMMC_GetCmdResp2(SDIOx);
  830. return errorstate;
  831. }
  832. /**
  833. * @brief Send the Send CSD command and check the response.
  834. * @param SDIOx: Pointer to SDIO register base
  835. * @param pRCA: Card RCA
  836. * @retval HAL status
  837. */
  838. uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
  839. {
  840. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  841. uint32_t errorstate;
  842. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  843. sdmmc_cmdinit.Argument = 0U;
  844. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  845. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  846. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  847. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  848. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  849. /* Check for error conditions */
  850. errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
  851. return errorstate;
  852. }
  853. /**
  854. * @brief Send the Set Relative Address command to MMC card (not SD card).
  855. * @param SDIOx Pointer to SDIO register base
  856. * @param RCA Card RCA
  857. * @retval HAL status
  858. */
  859. uint32_t SDMMC_CmdSetRelAddMmc(SDIO_TypeDef *SDIOx, uint16_t RCA)
  860. {
  861. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  862. uint32_t errorstate;
  863. /* Send CMD3 SD_CMD_SET_REL_ADDR */
  864. sdmmc_cmdinit.Argument = ((uint32_t)RCA << 16U);
  865. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
  866. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  867. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  868. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  869. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  870. /* Check for error conditions */
  871. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_REL_ADDR, SDIO_CMDTIMEOUT);
  872. return errorstate;
  873. }
  874. /**
  875. * @brief Send the Status command and check the response.
  876. * @param SDIOx: Pointer to SDIO register base
  877. * @param Argument: Command Argument
  878. * @retval HAL status
  879. */
  880. uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
  881. {
  882. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  883. uint32_t errorstate;
  884. sdmmc_cmdinit.Argument = Argument;
  885. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
  886. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  887. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  888. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  889. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  890. /* Check for error conditions */
  891. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
  892. return errorstate;
  893. }
  894. /**
  895. * @brief Send the Status register command and check the response.
  896. * @param SDIOx: Pointer to SDIO register base
  897. * @retval HAL status
  898. */
  899. uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
  900. {
  901. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  902. uint32_t errorstate;
  903. sdmmc_cmdinit.Argument = 0U;
  904. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
  905. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  906. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  907. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  908. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  909. /* Check for error conditions */
  910. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
  911. return errorstate;
  912. }
  913. /**
  914. * @brief Sends host capacity support information and activates the card's
  915. * initialization process. Send SDMMC_CMD_SEND_OP_COND command
  916. * @param SDIOx: Pointer to SDIO register base
  917. * @parame Argument: Argument used for the command
  918. * @retval HAL status
  919. */
  920. uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
  921. {
  922. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  923. uint32_t errorstate;
  924. sdmmc_cmdinit.Argument = Argument;
  925. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
  926. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  927. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  928. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  929. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  930. /* Check for error conditions */
  931. errorstate = SDMMC_GetCmdResp3(SDIOx);
  932. return errorstate;
  933. }
  934. /**
  935. * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH command
  936. * @param SDIOx: Pointer to SDIO register base
  937. * @parame Argument: Argument used for the command
  938. * @retval HAL status
  939. */
  940. uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
  941. {
  942. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  943. uint32_t errorstate;
  944. /* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */
  945. /* CMD Response: R1 */
  946. sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN */
  947. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
  948. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  949. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  950. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  951. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  952. /* Check for error conditions */
  953. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
  954. return errorstate;
  955. }
  956. /**
  957. * @brief Send the Send EXT_CSD command and check the response.
  958. * @param SDIOx Pointer to SDMMC register base
  959. * @param Argument Command Argument
  960. * @retval HAL status
  961. */
  962. uint32_t SDMMC_CmdSendEXTCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
  963. {
  964. SDIO_CmdInitTypeDef sdmmc_cmdinit;
  965. uint32_t errorstate;
  966. /* Send CMD9 SEND_CSD */
  967. sdmmc_cmdinit.Argument = Argument;
  968. sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
  969. sdmmc_cmdinit.Response = SDIO_RESPONSE_SHORT;
  970. sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
  971. sdmmc_cmdinit.CPSM = SDIO_CPSM_ENABLE;
  972. (void)SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
  973. /* Check for error conditions */
  974. errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SEND_EXT_CSD,SDIO_CMDTIMEOUT);
  975. return errorstate;
  976. }
  977. /**
  978. * @}
  979. */
  980. /** @defgroup HAL_SDMMC_LL_Group5 Responses management functions
  981. * @brief Responses functions
  982. *
  983. @verbatim
  984. ===============================================================================
  985. ##### Responses management functions #####
  986. ===============================================================================
  987. [..]
  988. This subsection provides a set of functions allowing to manage the needed responses.
  989. @endverbatim
  990. * @{
  991. */
  992. /**
  993. * @brief Checks for error conditions for R1 response.
  994. * @param SDIOx Pointer to SDMMC register base
  995. * @param SD_CMD: The sent command index
  996. * @retval SD Card error state
  997. */
  998. uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
  999. {
  1000. uint32_t response_r1;
  1001. uint32_t sta_reg;
  1002. /* 8 is the number of required instructions cycles for the below loop statement.
  1003. The Timeout is expressed in ms */
  1004. uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
  1005. do
  1006. {
  1007. if (count-- == 0U)
  1008. {
  1009. return SDMMC_ERROR_TIMEOUT;
  1010. }
  1011. sta_reg = SDIOx->STA;
  1012. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1013. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1014. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1015. {
  1016. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1017. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1018. }
  1019. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1020. {
  1021. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1022. return SDMMC_ERROR_CMD_CRC_FAIL;
  1023. }
  1024. else
  1025. {
  1026. /* Nothing to do */
  1027. }
  1028. /* Clear all the static flags */
  1029. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1030. /* Check response received is of desired command */
  1031. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1032. {
  1033. return SDMMC_ERROR_CMD_CRC_FAIL;
  1034. }
  1035. /* We have received response, retrieve it for analysis */
  1036. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1037. if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
  1038. {
  1039. return SDMMC_ERROR_NONE;
  1040. }
  1041. else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
  1042. {
  1043. return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
  1044. }
  1045. else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
  1046. {
  1047. return SDMMC_ERROR_ADDR_MISALIGNED;
  1048. }
  1049. else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
  1050. {
  1051. return SDMMC_ERROR_BLOCK_LEN_ERR;
  1052. }
  1053. else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
  1054. {
  1055. return SDMMC_ERROR_ERASE_SEQ_ERR;
  1056. }
  1057. else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
  1058. {
  1059. return SDMMC_ERROR_BAD_ERASE_PARAM;
  1060. }
  1061. else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
  1062. {
  1063. return SDMMC_ERROR_WRITE_PROT_VIOLATION;
  1064. }
  1065. else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
  1066. {
  1067. return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
  1068. }
  1069. else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
  1070. {
  1071. return SDMMC_ERROR_COM_CRC_FAILED;
  1072. }
  1073. else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
  1074. {
  1075. return SDMMC_ERROR_ILLEGAL_CMD;
  1076. }
  1077. else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
  1078. {
  1079. return SDMMC_ERROR_CARD_ECC_FAILED;
  1080. }
  1081. else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
  1082. {
  1083. return SDMMC_ERROR_CC_ERR;
  1084. }
  1085. else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
  1086. {
  1087. return SDMMC_ERROR_STREAM_READ_UNDERRUN;
  1088. }
  1089. else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
  1090. {
  1091. return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
  1092. }
  1093. else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
  1094. {
  1095. return SDMMC_ERROR_CID_CSD_OVERWRITE;
  1096. }
  1097. else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
  1098. {
  1099. return SDMMC_ERROR_WP_ERASE_SKIP;
  1100. }
  1101. else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
  1102. {
  1103. return SDMMC_ERROR_CARD_ECC_DISABLED;
  1104. }
  1105. else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
  1106. {
  1107. return SDMMC_ERROR_ERASE_RESET;
  1108. }
  1109. else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
  1110. {
  1111. return SDMMC_ERROR_AKE_SEQ_ERR;
  1112. }
  1113. else
  1114. {
  1115. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1116. }
  1117. }
  1118. /**
  1119. * @brief Checks for error conditions for R2 (CID or CSD) response.
  1120. * @param SDIOx Pointer to SDMMC register base
  1121. * @retval SD Card error state
  1122. */
  1123. uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
  1124. {
  1125. uint32_t sta_reg;
  1126. /* 8 is the number of required instructions cycles for the below loop statement.
  1127. The SDIO_CMDTIMEOUT is expressed in ms */
  1128. uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1129. do
  1130. {
  1131. if (count-- == 0U)
  1132. {
  1133. return SDMMC_ERROR_TIMEOUT;
  1134. }
  1135. sta_reg = SDIOx->STA;
  1136. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1137. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1138. if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1139. {
  1140. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1141. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1142. }
  1143. else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1144. {
  1145. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1146. return SDMMC_ERROR_CMD_CRC_FAIL;
  1147. }
  1148. else
  1149. {
  1150. /* No error flag set */
  1151. /* Clear all the static flags */
  1152. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1153. }
  1154. return SDMMC_ERROR_NONE;
  1155. }
  1156. /**
  1157. * @brief Checks for error conditions for R3 (OCR) response.
  1158. * @param SDIOx Pointer to SDMMC register base
  1159. * @retval SD Card error state
  1160. */
  1161. uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
  1162. {
  1163. uint32_t sta_reg;
  1164. /* 8 is the number of required instructions cycles for the below loop statement.
  1165. The SDIO_CMDTIMEOUT is expressed in ms */
  1166. uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1167. do
  1168. {
  1169. if (count-- == 0U)
  1170. {
  1171. return SDMMC_ERROR_TIMEOUT;
  1172. }
  1173. sta_reg = SDIOx->STA;
  1174. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1175. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1176. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1177. {
  1178. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1179. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1180. }
  1181. else
  1182. {
  1183. /* Clear all the static flags */
  1184. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1185. }
  1186. return SDMMC_ERROR_NONE;
  1187. }
  1188. /**
  1189. * @brief Checks for error conditions for R6 (RCA) response.
  1190. * @param SDIOx Pointer to SDMMC register base
  1191. * @param SD_CMD: The sent command index
  1192. * @param pRCA: Pointer to the variable that will contain the SD card relative
  1193. * address RCA
  1194. * @retval SD Card error state
  1195. */
  1196. uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
  1197. {
  1198. uint32_t response_r1;
  1199. uint32_t sta_reg;
  1200. /* 8 is the number of required instructions cycles for the below loop statement.
  1201. The SDIO_CMDTIMEOUT is expressed in ms */
  1202. uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1203. do
  1204. {
  1205. if (count-- == 0U)
  1206. {
  1207. return SDMMC_ERROR_TIMEOUT;
  1208. }
  1209. sta_reg = SDIOx->STA;
  1210. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1211. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1212. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1213. {
  1214. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1215. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1216. }
  1217. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1218. {
  1219. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1220. return SDMMC_ERROR_CMD_CRC_FAIL;
  1221. }
  1222. else
  1223. {
  1224. /* Nothing to do */
  1225. }
  1226. /* Check response received is of desired command */
  1227. if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
  1228. {
  1229. return SDMMC_ERROR_CMD_CRC_FAIL;
  1230. }
  1231. /* Clear all the static flags */
  1232. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1233. /* We have received response, retrieve it. */
  1234. response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
  1235. if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
  1236. {
  1237. *pRCA = (uint16_t) (response_r1 >> 16);
  1238. return SDMMC_ERROR_NONE;
  1239. }
  1240. else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
  1241. {
  1242. return SDMMC_ERROR_ILLEGAL_CMD;
  1243. }
  1244. else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
  1245. {
  1246. return SDMMC_ERROR_COM_CRC_FAILED;
  1247. }
  1248. else
  1249. {
  1250. return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
  1251. }
  1252. }
  1253. /**
  1254. * @brief Checks for error conditions for R7 response.
  1255. * @param SDIOx Pointer to SDMMC register base
  1256. * @retval SD Card error state
  1257. */
  1258. uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
  1259. {
  1260. uint32_t sta_reg;
  1261. /* 8 is the number of required instructions cycles for the below loop statement.
  1262. The SDIO_CMDTIMEOUT is expressed in ms */
  1263. uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1264. do
  1265. {
  1266. if (count-- == 0U)
  1267. {
  1268. return SDMMC_ERROR_TIMEOUT;
  1269. }
  1270. sta_reg = SDIOx->STA;
  1271. }while(((sta_reg & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) == 0U) ||
  1272. ((sta_reg & SDIO_FLAG_CMDACT) != 0U ));
  1273. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
  1274. {
  1275. /* Card is SD V2.0 compliant */
  1276. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
  1277. return SDMMC_ERROR_CMD_RSP_TIMEOUT;
  1278. }
  1279. else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
  1280. {
  1281. /* Card is SD V2.0 compliant */
  1282. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
  1283. return SDMMC_ERROR_CMD_CRC_FAIL;
  1284. }
  1285. else
  1286. {
  1287. /* Nothing to do */
  1288. }
  1289. if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
  1290. {
  1291. /* Card is SD V2.0 compliant */
  1292. __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
  1293. }
  1294. return SDMMC_ERROR_NONE;
  1295. }
  1296. /**
  1297. * @}
  1298. */
  1299. /* Private function ----------------------------------------------------------*/
  1300. /** @addtogroup SD_Private_Functions
  1301. * @{
  1302. */
  1303. /**
  1304. * @brief Checks for error conditions for CMD0.
  1305. * @param SDIOx Pointer to SDMMC register base
  1306. * @retval SD Card error state
  1307. */
  1308. static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
  1309. {
  1310. /* 8 is the number of required instructions cycles for the below loop statement.
  1311. The SDIO_CMDTIMEOUT is expressed in ms */
  1312. uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
  1313. do
  1314. {
  1315. if (count-- == 0U)
  1316. {
  1317. return SDMMC_ERROR_TIMEOUT;
  1318. }
  1319. }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
  1320. /* Clear all the static flags */
  1321. __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_CMD_FLAGS);
  1322. return SDMMC_ERROR_NONE;
  1323. }
  1324. /**
  1325. * @}
  1326. */
  1327. #endif /* HAL_SD_MODULE_ENABLED || HAL_MMC_MODULE_ENABLED */
  1328. /**
  1329. * @}
  1330. */
  1331. /**
  1332. * @}
  1333. */
  1334. #endif /* SDIO */