STM32_RFDA4005/build/RFDAproto.lst

ARM GAS  /tmp/cchZupNE.s 			page 1


   1              		.cpu cortex-m3
   2              		.arch armv7-m
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 1
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.file	"RFDAproto.c"
  14              		.text
  15              	.Ltext0:
  16              		.cfi_sections	.debug_frame
  17              		.file 1 "Core/Src/RFDAproto.c"
  18              		.section	.text.PWM_init,"ax",%progbits
  19              		.align	1
  20              		.global	PWM_init
  21              		.syntax unified
  22              		.thumb
  23              		.thumb_func
  25              	PWM_init:
  26              	.LFB655:
   1:Core/Src/RFDAproto.c **** #include "RFDAproto.h"
   2:Core/Src/RFDAproto.c **** #include "usbd_cdc_if.h"
   3:Core/Src/RFDAproto.c **** 
   4:Core/Src/RFDAproto.c **** #define RFDA_TIM TIM1 //timer [CH1] --- PA8
   5:Core/Src/RFDAproto.c **** #define RFDA_TIM_ARR 10U
   6:Core/Src/RFDAproto.c **** #define RFDA_TIM_CCR1 7U
   7:Core/Src/RFDAproto.c **** 
   8:Core/Src/RFDAproto.c **** #define LE_AND_DATA_PORT GPIOA
   9:Core/Src/RFDAproto.c **** #define LE_S GPIO_BSRR_BS1 //[LE] --- PA1
  10:Core/Src/RFDAproto.c **** #define LE_R GPIO_BSRR_BR1
  11:Core/Src/RFDAproto.c **** #define DATA_S GPIO_BSRR_BS2 //[DATA] --- PA2
  12:Core/Src/RFDAproto.c **** #define DATA_R GPIO_BSRR_BR2
  13:Core/Src/RFDAproto.c **** #define DMA_CH DMA1_Channel5
  14:Core/Src/RFDAproto.c **** #define BUF_LEN 7U
  15:Core/Src/RFDAproto.c **** uint32_t buf[BUF_LEN];
  16:Core/Src/RFDAproto.c **** uint8_t i;
  17:Core/Src/RFDAproto.c **** 
  18:Core/Src/RFDAproto.c **** void PWM_init(void){
  27              		.loc 1 18 20 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
  19:Core/Src/RFDAproto.c **** 
  20:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->BDTR,TIM_BDTR_MOE);//OUTPUT ENABLE
  32              		.loc 1 20 2 view .LVU1
  33 0000 044B     		ldr	r3, .L2
  34 0002 5A6C     		ldr	r2, [r3, #68]
  35 0004 42F40042 		orr	r2, r2, #32768
  36 0008 5A64     		str	r2, [r3, #68]
  21:Core/Src/RFDAproto.c **** 
  22:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //Capture/Compare 1 output enable
ARM GAS  /tmp/cchZupNE.s 			page 2


  37              		.loc 1 22 2 view .LVU2
  38 000a 1A6A     		ldr	r2, [r3, #32]
  39 000c 42F00102 		orr	r2, r2, #1
  40 0010 1A62     		str	r2, [r3, #32]
  23:Core/Src/RFDAproto.c **** }
  41              		.loc 1 23 1 is_stmt 0 view .LVU3
  42 0012 7047     		bx	lr
  43              	.L3:
  44              		.align	2
  45              	.L2:
  46 0014 002C0140 		.word	1073818624
  47              		.cfi_endproc
  48              	.LFE655:
  50              		.section	.text.PWM,"ax",%progbits
  51              		.align	1
  52              		.global	PWM
  53              		.syntax unified
  54              		.thumb
  55              		.thumb_func
  57              	PWM:
  58              	.LVL0:
  59              	.LFB656:
  24:Core/Src/RFDAproto.c **** void PWM(uint8_t ar,uint8_t cc){
  60              		.loc 1 24 32 is_stmt 1 view -0
  61              		.cfi_startproc
  62              		@ args = 0, pretend = 0, frame = 0
  63              		@ frame_needed = 0, uses_anonymous_args = 0
  64              		@ link register save eliminated.
  25:Core/Src/RFDAproto.c **** 	//TIM CFG
  26:Core/Src/RFDAproto.c ****     CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN); //turn off counter
  65              		.loc 1 26 5 view .LVU5
  66 0000 0C4B     		ldr	r3, .L5
  67 0002 1A68     		ldr	r2, [r3]
  68 0004 22F00102 		bic	r2, r2, #1
  69 0008 1A60     		str	r2, [r3]
  27:Core/Src/RFDAproto.c ****     CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //disable data OUTPUT
  70              		.loc 1 27 5 view .LVU6
  71 000a 1A6A     		ldr	r2, [r3, #32]
  72 000c 22F00102 		bic	r2, r2, #1
  73 0010 1A62     		str	r2, [r3, #32]
  28:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->ARR,ar); //SET autoreload value
  74              		.loc 1 28 2 view .LVU7
  75 0012 D862     		str	r0, [r3, #44]
  29:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CCR1,cc);//SET capture-compare value
  76              		.loc 1 29 2 view .LVU8
  77 0014 5963     		str	r1, [r3, #52]
  30:Core/Src/RFDAproto.c **** 	WRITE_REG(RFDA_TIM->CNT,0U); //Set TIM counter to zero
  78              		.loc 1 30 2 view .LVU9
  79 0016 0022     		movs	r2, #0
  80 0018 5A62     		str	r2, [r3, #36]
  31:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //enable data OUTPUT
  81              		.loc 1 31 2 view .LVU10
  82 001a 1A6A     		ldr	r2, [r3, #32]
  83 001c 42F00102 		orr	r2, r2, #1
  84 0020 1A62     		str	r2, [r3, #32]
  32:Core/Src/RFDAproto.c ****     SET_BIT(RFDA_TIM->EGR, TIM_EGR_UG); //update gen
  85              		.loc 1 32 5 view .LVU11
ARM GAS  /tmp/cchZupNE.s 			page 3


  86 0022 5A69     		ldr	r2, [r3, #20]
  87 0024 42F00102 		orr	r2, r2, #1
  88 0028 5A61     		str	r2, [r3, #20]
  33:Core/Src/RFDAproto.c **** 	SET_BIT(RFDA_TIM->CR1,TIM_CR1_CEN); //enable counter
  89              		.loc 1 33 2 view .LVU12
  90 002a 1A68     		ldr	r2, [r3]
  91 002c 42F00102 		orr	r2, r2, #1
  92 0030 1A60     		str	r2, [r3]
  34:Core/Src/RFDAproto.c **** 
  35:Core/Src/RFDAproto.c **** }
  93              		.loc 1 35 1 is_stmt 0 view .LVU13
  94 0032 7047     		bx	lr
  95              	.L6:
  96              		.align	2
  97              	.L5:
  98 0034 002C0140 		.word	1073818624
  99              		.cfi_endproc
 100              	.LFE656:
 102              		.section	.text.DMA1_Channel5_IRQHandler,"ax",%progbits
 103              		.align	1
 104              		.global	DMA1_Channel5_IRQHandler
 105              		.syntax unified
 106              		.thumb
 107              		.thumb_func
 109              	DMA1_Channel5_IRQHandler:
 110              	.LFB657:
  36:Core/Src/RFDAproto.c **** 
  37:Core/Src/RFDAproto.c **** /**
  38:Core/Src/RFDAproto.c ****   * @brief This function handles DMA1 channel2 global interrupt.
  39:Core/Src/RFDAproto.c ****   */
  40:Core/Src/RFDAproto.c **** void DMA1_Channel5_IRQHandler(void)
  41:Core/Src/RFDAproto.c **** {
 111              		.loc 1 41 1 is_stmt 1 view -0
 112              		.cfi_startproc
 113              		@ args = 0, pretend = 0, frame = 0
 114              		@ frame_needed = 0, uses_anonymous_args = 0
 115              		@ link register save eliminated.
  42:Core/Src/RFDAproto.c ****   /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
  43:Core/Src/RFDAproto.c **** //	CLEAR_BIT(RFDA_TIM->CR1, TIM_CR1_CEN); //turn off counter
  44:Core/Src/RFDAproto.c **** //	CLEAR_BIT(RFDA_TIM->CCER, TIM_CCER_CC1E); //disable data channel
  45:Core/Src/RFDAproto.c **** //	WRITE_REG(LE_AND_DATA_PORT->BSRR,LE_S|DATA_R); //LE SET and DATA RESET at the END of transfer
  46:Core/Src/RFDAproto.c **** //	SET_BIT(DMA1->IFCR, DMA_IFCR_CTCIF5); //CTCIFx: Channel x transfer complete flag clear (x = 1 ..
  47:Core/Src/RFDAproto.c ****   /* USER CODE END DMA1_Channel2_IRQn 0 */
  48:Core/Src/RFDAproto.c **** 
  49:Core/Src/RFDAproto.c ****   /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
  50:Core/Src/RFDAproto.c **** 
  51:Core/Src/RFDAproto.c **** 
  52:Core/Src/RFDAproto.c ****   /* USER CODE END DMA1_Channel2_IRQn 1 */
  53:Core/Src/RFDAproto.c **** }
 116              		.loc 1 53 1 view .LVU15
 117 0000 7047     		bx	lr
 118              		.cfi_endproc
 119              	.LFE657:
 121              		.global	i
 122              		.section	.bss.i,"aw",%nobits
 125              	i:
 126 0000 00       		.space	1
ARM GAS  /tmp/cchZupNE.s 			page 4


 127              		.global	buf
 128              		.section	.bss.buf,"aw",%nobits
 129              		.align	2
 132              	buf:
 133 0000 00000000 		.space	28
 133      00000000 
 133      00000000 
 133      00000000 
 133      00000000 
 134              		.text
 135              	.Letext0:
 136              		.file 2 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
 137              		.file 3 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
 138              		.file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
 139              		.file 5 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h"
 140              		.file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h"
ARM GAS  /tmp/cchZupNE.s 			page 5


DEFINED SYMBOLS
                            *ABS*:00000000 RFDAproto.c
     /tmp/cchZupNE.s:19     .text.PWM_init:00000000 $t
     /tmp/cchZupNE.s:25     .text.PWM_init:00000000 PWM_init
     /tmp/cchZupNE.s:46     .text.PWM_init:00000014 $d
     /tmp/cchZupNE.s:51     .text.PWM:00000000 $t
     /tmp/cchZupNE.s:57     .text.PWM:00000000 PWM
     /tmp/cchZupNE.s:98     .text.PWM:00000034 $d
     /tmp/cchZupNE.s:103    .text.DMA1_Channel5_IRQHandler:00000000 $t
     /tmp/cchZupNE.s:109    .text.DMA1_Channel5_IRQHandler:00000000 DMA1_Channel5_IRQHandler
     /tmp/cchZupNE.s:125    .bss.i:00000000 i
     /tmp/cchZupNE.s:126    .bss.i:00000000 $d
     /tmp/cchZupNE.s:132    .bss.buf:00000000 buf
     /tmp/cchZupNE.s:129    .bss.buf:00000000 $d

NO UNDEFINED SYMBOLS