stm32f1xx_hal_gpio.lst 104 KB

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  1. ARM GAS /tmp/ccoCvX6R.s page 1
  2. 1 .cpu cortex-m3
  3. 2 .arch armv7-m
  4. 3 .fpu softvfp
  5. 4 .eabi_attribute 20, 1
  6. 5 .eabi_attribute 21, 1
  7. 6 .eabi_attribute 23, 3
  8. 7 .eabi_attribute 24, 1
  9. 8 .eabi_attribute 25, 1
  10. 9 .eabi_attribute 26, 1
  11. 10 .eabi_attribute 30, 1
  12. 11 .eabi_attribute 34, 1
  13. 12 .eabi_attribute 18, 4
  14. 13 .file "stm32f1xx_hal_gpio.c"
  15. 14 .text
  16. 15 .Ltext0:
  17. 16 .cfi_sections .debug_frame
  18. 17 .section .text.HAL_GPIO_Init,"ax",%progbits
  19. 18 .align 1
  20. 19 .global HAL_GPIO_Init
  21. 20 .syntax unified
  22. 21 .thumb
  23. 22 .thumb_func
  24. 24 HAL_GPIO_Init:
  25. 25 .LVL0:
  26. 26 .LFB65:
  27. 27 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c"
  28. 1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  29. 2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
  30. 3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @file stm32f1xx_hal_gpio.c
  31. 4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @author MCD Application Team
  32. 5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO HAL module driver.
  33. 6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This file provides firmware functions to manage the following
  34. 7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral:
  35. 8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * + Initialization and de-initialization functions
  36. 9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * + IO operation functions
  37. 10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  38. 11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
  39. 12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @attention
  40. 13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  41. 14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * Copyright (c) 2016 STMicroelectronics.
  42. 15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * All rights reserved.
  43. 16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  44. 17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This software is licensed under terms that can be found in the LICENSE file
  45. 18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * in the root directory of this software component.
  46. 19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
  47. 20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  48. 21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
  49. 22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
  50. 23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
  51. 24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### GPIO Peripheral features #####
  52. 25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
  53. 26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  54. 27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
  55. 28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
  56. 29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in several modes:
  57. 30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Input mode
  58. 31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Analog mode
  59. ARM GAS /tmp/ccoCvX6R.s page 2
  60. 32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Output mode
  61. 33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Alternate function mode
  62. 34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) External interrupt/event lines
  63. 35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  64. 36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  65. 37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** During and just after reset, the alternate functions and external interrupt
  66. 38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode.
  67. 39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  68. 40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  69. 41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** All GPIO pins have weak internal pull-up and pull-down resistors, which can be
  70. 42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** activated or not.
  71. 43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  72. 44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  73. 45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** In Output or Alternate mode, each IO can be configured on open-drain or push-pull
  74. 46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value.
  75. 47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  76. 48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  77. 49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** All ports have external interrupt/event capability. To use external interrupt
  78. 50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are
  79. 51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
  80. 52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  81. 53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  82. 54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** The external interrupt/event controller consists of up to 20 edge detectors in connectivity
  83. 55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** line devices, or 19 edge detectors in other devices for generating event/interrupt requests.
  84. 56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** Each input line can be independently configured to select the type (event or interrupt) and
  85. 57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). Each line can also masked
  86. 58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** independently. A pending register maintains the status line of the interrupt requests
  87. 59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  88. 60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### How to use this driver #####
  89. 61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
  90. 62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  91. 63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) Enable the GPIO APB2 clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE().
  92. 64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  93. 65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
  94. 66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
  95. 67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
  96. 68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** structure.
  97. 69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is
  98. 70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure
  99. 71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel
  100. 72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** or DAC output.
  101. 73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from
  102. 74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and
  103. 75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both).
  104. 76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  105. 77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
  106. 78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
  107. 79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_NVIC_EnableIRQ().
  108. 80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  109. 81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
  110. 82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  111. 83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use
  112. 84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
  113. 85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  114. 86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
  115. 87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  116. 88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not
  117. ARM GAS /tmp/ccoCvX6R.s page 3
  118. 89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG
  119. 90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** pins).
  120. 91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  121. 92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
  122. 93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
  123. 94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** priority over the GPIO function.
  124. 95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  125. 96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
  126. 97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** general purpose PD0 and PD1, respectively, when the HSE oscillator is off.
  127. 98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** The HSE has priority over the GPIO function.
  128. 99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  129. 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
  130. 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
  131. 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  132. 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  133. 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/
  134. 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #include "stm32f1xx_hal.h"
  135. 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  136. 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @addtogroup STM32F1xx_HAL_Driver
  137. 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  138. 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  139. 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  140. 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO GPIO
  141. 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO HAL module driver
  142. 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  143. 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  144. 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  145. 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED
  146. 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  147. 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/
  148. 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private define ------------------------------------------------------------*/
  149. 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @addtogroup GPIO_Private_Constants GPIO Private Constants
  150. 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  151. 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  152. 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE 0x00000003u
  153. 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define EXTI_MODE 0x10000000u
  154. 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE_IT 0x00010000u
  155. 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE_EVT 0x00020000u
  156. 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define RISING_EDGE 0x00100000u
  157. 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define FALLING_EDGE 0x00200000u
  158. 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_OUTPUT_TYPE 0x00000010u
  159. 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  160. 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_NUMBER 16u
  161. 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  162. 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Definitions for bit manipulation of CRL and CRH register */
  163. 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_MODE_INPUT 0x00000000u /*!< 00: Input mode (reset state) */
  164. 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_ANALOG 0x00000000u /*!< 00: Analog mode */
  165. 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_INPUT_FLOATING 0x00000004u /*!< 01: Floating input (reset state) */
  166. 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_INPUT_PU_PD 0x00000008u /*!< 10: Input with pull-up / pull-down */
  167. 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_GP_OUTPUT_PP 0x00000000u /*!< 00: General purpose output push-pull */
  168. 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_GP_OUTPUT_OD 0x00000004u /*!< 01: General purpose output Open-drain */
  169. 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_AF_OUTPUT_PP 0x00000008u /*!< 10: Alternate function output Push-pull */
  170. 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_AF_OUTPUT_OD 0x0000000Cu /*!< 11: Alternate function output Open-drain */
  171. 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  172. 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  173. 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @}
  174. 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  175. ARM GAS /tmp/ccoCvX6R.s page 4
  176. 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private macro -------------------------------------------------------------*/
  177. 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/
  178. 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/
  179. 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private functions ---------------------------------------------------------*/
  180. 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/
  181. 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
  182. 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  183. 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  184. 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  185. 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
  186. 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Initialization and Configuration functions
  187. 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  188. 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
  189. 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
  190. 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### Initialization and de-initialization functions #####
  191. 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
  192. 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  193. 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** This section provides functions allowing to initialize and de-initialize the GPIOs
  194. 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** to be ready for use.
  195. 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  196. 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
  197. 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  198. 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  199. 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  200. 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  201. 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  202. 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init
  203. 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  204. 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
  205. 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral.
  206. 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  207. 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  208. 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
  209. 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  210. 28 .loc 1 179 1 view -0
  211. 29 .cfi_startproc
  212. 30 @ args = 0, pretend = 0, frame = 8
  213. 31 @ frame_needed = 0, uses_anonymous_args = 0
  214. 32 .loc 1 179 1 is_stmt 0 view .LVU1
  215. 33 0000 70B5 push {r4, r5, r6, lr}
  216. 34 .LCFI0:
  217. 35 .cfi_def_cfa_offset 16
  218. 36 .cfi_offset 4, -16
  219. 37 .cfi_offset 5, -12
  220. 38 .cfi_offset 6, -8
  221. 39 .cfi_offset 14, -4
  222. 40 0002 82B0 sub sp, sp, #8
  223. 41 .LCFI1:
  224. 42 .cfi_def_cfa_offset 24
  225. 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
  226. 43 .loc 1 180 3 is_stmt 1 view .LVU2
  227. 44 .LVL1:
  228. 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t ioposition;
  229. 45 .loc 1 181 3 view .LVU3
  230. 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
  231. 46 .loc 1 182 3 view .LVU4
  232. 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t temp;
  233. ARM GAS /tmp/ccoCvX6R.s page 5
  234. 47 .loc 1 183 3 view .LVU5
  235. 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t config = 0x00u;
  236. 48 .loc 1 184 3 view .LVU6
  237. 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
  238. 49 .loc 1 185 3 view .LVU7
  239. 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t registeroffset; /* offset used during computation of CNF and MODE bits placement i
  240. 50 .loc 1 186 3 view .LVU8
  241. 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  242. 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  243. 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  244. 51 .loc 1 189 3 view .LVU9
  245. 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
  246. 52 .loc 1 190 3 view .LVU10
  247. 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
  248. 53 .loc 1 191 3 view .LVU11
  249. 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  250. 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the port pins */
  251. 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u)
  252. 54 .loc 1 194 3 view .LVU12
  253. 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
  254. 55 .loc 1 184 12 is_stmt 0 view .LVU13
  255. 56 0004 0024 movs r4, #0
  256. 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t ioposition;
  257. 57 .loc 1 180 12 view .LVU14
  258. 58 0006 A446 mov ip, r4
  259. 59 .loc 1 194 9 view .LVU15
  260. 60 0008 A6E0 b .L2
  261. 61 .LVL2:
  262. 62 .L4:
  263. 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  264. 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get the IO position */
  265. 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ioposition = (0x01uL << position);
  266. 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  267. 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get the current IO position */
  268. 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
  269. 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  270. 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (iocurrent == ioposition)
  271. 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  272. 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the Alternate function parameters */
  273. 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
  274. 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  275. 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] correspo
  276. 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** switch (GPIO_Init->Mode)
  277. 63 .loc 1 208 7 view .LVU16
  278. 64 000a 804D ldr r5, .L40
  279. 65 000c AA42 cmp r2, r5
  280. 66 000e 10D0 beq .L12
  281. 67 0010 07D9 bls .L35
  282. 68 0012 7F4D ldr r5, .L40+4
  283. 69 0014 AA42 cmp r2, r5
  284. 70 0016 0CD0 beq .L12
  285. 71 0018 05F58035 add r5, r5, #65536
  286. 72 001c AA42 cmp r2, r5
  287. 73 001e 08D0 beq .L12
  288. 74 0020 13E0 b .L9
  289. 75 .L35:
  290. 76 0022 A5F58015 sub r5, r5, #1048576
  291. ARM GAS /tmp/ccoCvX6R.s page 6
  292. 77 0026 AA42 cmp r2, r5
  293. 78 0028 03D0 beq .L12
  294. 79 002a 05F57025 add r5, r5, #983040
  295. 80 002e AA42 cmp r2, r5
  296. 81 0030 07D1 bne .L36
  297. 82 .L12:
  298. 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  299. 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in OUTPUT push-pull mode */
  300. 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_OUTPUT_PP:
  301. 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
  302. 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
  303. 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
  304. 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  305. 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  306. 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in OUTPUT open-drain mode */
  307. 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_OUTPUT_OD:
  308. 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
  309. 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
  310. 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
  311. 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  312. 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  313. 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in ALTERNATE FUNCTION push-pull mode */
  314. 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_AF_PP:
  315. 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
  316. 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
  317. 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
  318. 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  319. 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  320. 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in ALTERNATE FUNCTION open-drain mode */
  321. 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_AF_OD:
  322. 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
  323. 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
  324. 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
  325. 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  326. 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  327. 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in INPUT (also applicable to EVENT and IT mode) */
  328. 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_INPUT:
  329. 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_RISING:
  330. 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_FALLING:
  331. 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_RISING_FALLING:
  332. 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_RISING:
  333. 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_FALLING:
  334. 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_RISING_FALLING:
  335. 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO pull parameter */
  336. 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
  337. 83 .loc 1 247 11 is_stmt 1 view .LVU17
  338. 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (GPIO_Init->Pull == GPIO_NOPULL)
  339. 84 .loc 1 248 11 view .LVU18
  340. 85 .loc 1 248 24 is_stmt 0 view .LVU19
  341. 86 0032 8A68 ldr r2, [r1, #8]
  342. 87 .loc 1 248 14 view .LVU20
  343. 88 0034 002A cmp r2, #0
  344. 89 0036 58D0 beq .L29
  345. 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  346. 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
  347. 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  348. 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else if (GPIO_Init->Pull == GPIO_PULLUP)
  349. ARM GAS /tmp/ccoCvX6R.s page 7
  350. 90 .loc 1 252 16 is_stmt 1 view .LVU21
  351. 91 .loc 1 252 19 is_stmt 0 view .LVU22
  352. 92 0038 012A cmp r2, #1
  353. 93 003a 51D0 beq .L37
  354. 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  355. 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
  356. 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  357. 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set the corresponding ODR bit */
  358. 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = ioposition;
  359. 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  360. 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else /* GPIO_PULLDOWN */
  361. 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  362. 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
  363. 94 .loc 1 261 13 is_stmt 1 view .LVU23
  364. 95 .LVL3:
  365. 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  366. 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Reset the corresponding ODR bit */
  367. 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BRR = ioposition;
  368. 96 .loc 1 264 13 view .LVU24
  369. 97 .loc 1 264 24 is_stmt 0 view .LVU25
  370. 98 003c 4361 str r3, [r0, #20]
  371. 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  372. 99 .loc 1 261 20 view .LVU26
  373. 100 003e 0824 movs r4, #8
  374. 101 0040 03E0 b .L9
  375. 102 .LVL4:
  376. 103 .L36:
  377. 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  378. 104 .loc 1 208 7 view .LVU27
  379. 105 0042 A5F58015 sub r5, r5, #1048576
  380. 106 0046 AA42 cmp r2, r5
  381. 107 0048 F3D0 beq .L12
  382. 108 .LVL5:
  383. 109 .L9:
  384. 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  385. 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  386. 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  387. 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in INPUT analog mode */
  388. 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_ANALOG:
  389. 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
  390. 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  391. 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  392. 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Parameters are checked with assert_param */
  393. 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** default:
  394. 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  395. 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  396. 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  397. 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check if the current bit belongs to first half or last half of the pin count number
  398. 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in order to address CRH or CRL register*/
  399. 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  400. 110 .loc 1 280 7 is_stmt 1 view .LVU28
  401. 111 .loc 1 280 67 is_stmt 0 view .LVU29
  402. 112 004a BEF1FF0F cmp lr, #255
  403. 113 004e 4ED8 bhi .L15
  404. 114 .loc 1 280 67 discriminator 1 view .LVU30
  405. 115 0050 0646 mov r6, r0
  406. 116 .L16:
  407. ARM GAS /tmp/ccoCvX6R.s page 8
  408. 117 .LVL6:
  409. 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
  410. 118 .loc 1 281 7 is_stmt 1 discriminator 4 view .LVU31
  411. 119 .loc 1 281 68 is_stmt 0 discriminator 4 view .LVU32
  412. 120 0052 BEF1FF0F cmp lr, #255
  413. 121 0056 4CD8 bhi .L17
  414. 122 .loc 1 281 68 discriminator 1 view .LVU33
  415. 123 0058 4FEA8C02 lsl r2, ip, #2
  416. 124 .L18:
  417. 125 .LVL7:
  418. 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  419. 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Apply the new configuration of the pin to the register */
  420. 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config <
  421. 126 .loc 1 284 7 is_stmt 1 discriminator 4 view .LVU34
  422. 127 005c 3368 ldr r3, [r6]
  423. 128 .LVL8:
  424. 129 .loc 1 284 7 is_stmt 0 discriminator 4 view .LVU35
  425. 130 005e 0F25 movs r5, #15
  426. 131 0060 9540 lsls r5, r5, r2
  427. 132 0062 23EA0503 bic r3, r3, r5
  428. 133 0066 04FA02F2 lsl r2, r4, r2
  429. 134 .LVL9:
  430. 135 .loc 1 284 7 discriminator 4 view .LVU36
  431. 136 006a 1343 orrs r3, r3, r2
  432. 137 006c 3360 str r3, [r6]
  433. 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  434. 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/
  435. 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */
  436. 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
  437. 138 .loc 1 288 7 is_stmt 1 discriminator 4 view .LVU37
  438. 139 .loc 1 288 21 is_stmt 0 discriminator 4 view .LVU38
  439. 140 006e 4B68 ldr r3, [r1, #4]
  440. 141 .loc 1 288 10 discriminator 4 view .LVU39
  441. 142 0070 13F0805F tst r3, #268435456
  442. 143 0074 6ED0 beq .L3
  443. 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  444. 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable AFIO Clock */
  445. 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __HAL_RCC_AFIO_CLK_ENABLE();
  446. 144 .loc 1 291 9 is_stmt 1 view .LVU40
  447. 145 .LBB2:
  448. 146 .loc 1 291 9 view .LVU41
  449. 147 .loc 1 291 9 view .LVU42
  450. 148 0076 674B ldr r3, .L40+8
  451. 149 0078 9A69 ldr r2, [r3, #24]
  452. 150 007a 42F00102 orr r2, r2, #1
  453. 151 007e 9A61 str r2, [r3, #24]
  454. 152 .loc 1 291 9 view .LVU43
  455. 153 0080 9B69 ldr r3, [r3, #24]
  456. 154 0082 03F00103 and r3, r3, #1
  457. 155 0086 0193 str r3, [sp, #4]
  458. 156 .loc 1 291 9 view .LVU44
  459. 157 0088 019B ldr r3, [sp, #4]
  460. 158 .LBE2:
  461. 159 .loc 1 291 9 view .LVU45
  462. 292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** temp = AFIO->EXTICR[position >> 2u];
  463. 160 .loc 1 292 9 view .LVU46
  464. 161 .loc 1 292 38 is_stmt 0 view .LVU47
  465. ARM GAS /tmp/ccoCvX6R.s page 9
  466. 162 008a 4FEA9C02 lsr r2, ip, #2
  467. 163 .loc 1 292 14 view .LVU48
  468. 164 008e 951C adds r5, r2, #2
  469. 165 0090 614B ldr r3, .L40+12
  470. 166 0092 53F82560 ldr r6, [r3, r5, lsl #2]
  471. 167 .LVL10:
  472. 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
  473. 168 .loc 1 293 9 is_stmt 1 view .LVU49
  474. 169 0096 0CF00303 and r3, ip, #3
  475. 170 009a 9D00 lsls r5, r3, #2
  476. 171 009c 0F23 movs r3, #15
  477. 172 009e AB40 lsls r3, r3, r5
  478. 173 00a0 26EA0306 bic r6, r6, r3
  479. 174 .LVL11:
  480. 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
  481. 175 .loc 1 294 9 view .LVU50
  482. 176 00a4 5D4B ldr r3, .L40+16
  483. 177 00a6 9842 cmp r0, r3
  484. 178 00a8 29D0 beq .L30
  485. 179 .loc 1 294 9 is_stmt 0 discriminator 1 view .LVU51
  486. 180 00aa 03F58063 add r3, r3, #1024
  487. 181 00ae 9842 cmp r0, r3
  488. 182 00b0 00F08E80 beq .L31
  489. 183 .loc 1 294 9 discriminator 3 view .LVU52
  490. 184 00b4 03F58063 add r3, r3, #1024
  491. 185 00b8 9842 cmp r0, r3
  492. 186 00ba 00F08B80 beq .L32
  493. 187 .loc 1 294 9 discriminator 5 view .LVU53
  494. 188 00be 03F58063 add r3, r3, #1024
  495. 189 00c2 9842 cmp r0, r3
  496. 190 00c4 19D0 beq .L38
  497. 191 .loc 1 294 9 view .LVU54
  498. 192 00c6 0423 movs r3, #4
  499. 193 00c8 1AE0 b .L19
  500. 194 .LVL12:
  501. 195 .L11:
  502. 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
  503. 196 .loc 1 213 11 is_stmt 1 view .LVU55
  504. 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  505. 197 .loc 1 214 11 view .LVU56
  506. 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  507. 198 .loc 1 214 18 is_stmt 0 view .LVU57
  508. 199 00ca CC68 ldr r4, [r1, #12]
  509. 200 .LVL13:
  510. 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  511. 201 .loc 1 215 11 is_stmt 1 view .LVU58
  512. 202 00cc BDE7 b .L9
  513. 203 .L8:
  514. 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
  515. 204 .loc 1 220 11 view .LVU59
  516. 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  517. 205 .loc 1 221 11 view .LVU60
  518. 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  519. 206 .loc 1 221 29 is_stmt 0 view .LVU61
  520. 207 00ce CC68 ldr r4, [r1, #12]
  521. 208 .LVL14:
  522. 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  523. ARM GAS /tmp/ccoCvX6R.s page 10
  524. 209 .loc 1 221 18 view .LVU62
  525. 210 00d0 0434 adds r4, r4, #4
  526. 211 .LVL15:
  527. 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  528. 212 .loc 1 222 11 is_stmt 1 view .LVU63
  529. 213 00d2 BAE7 b .L9
  530. 214 .L10:
  531. 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
  532. 215 .loc 1 227 11 view .LVU64
  533. 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  534. 216 .loc 1 228 11 view .LVU65
  535. 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  536. 217 .loc 1 228 29 is_stmt 0 view .LVU66
  537. 218 00d4 CC68 ldr r4, [r1, #12]
  538. 219 .LVL16:
  539. 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  540. 220 .loc 1 228 18 view .LVU67
  541. 221 00d6 0834 adds r4, r4, #8
  542. 222 .LVL17:
  543. 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  544. 223 .loc 1 229 11 is_stmt 1 view .LVU68
  545. 224 00d8 B7E7 b .L9
  546. 225 .L6:
  547. 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
  548. 226 .loc 1 234 11 view .LVU69
  549. 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  550. 227 .loc 1 235 11 view .LVU70
  551. 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  552. 228 .loc 1 235 29 is_stmt 0 view .LVU71
  553. 229 00da CC68 ldr r4, [r1, #12]
  554. 230 .LVL18:
  555. 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  556. 231 .loc 1 235 18 view .LVU72
  557. 232 00dc 0C34 adds r4, r4, #12
  558. 233 .LVL19:
  559. 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  560. 234 .loc 1 236 11 is_stmt 1 view .LVU73
  561. 235 00de B4E7 b .L9
  562. 236 .L37:
  563. 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  564. 237 .loc 1 254 13 view .LVU74
  565. 238 .LVL20:
  566. 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  567. 239 .loc 1 257 13 view .LVU75
  568. 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  569. 240 .loc 1 257 25 is_stmt 0 view .LVU76
  570. 241 00e0 0361 str r3, [r0, #16]
  571. 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  572. 242 .loc 1 254 20 view .LVU77
  573. 243 00e2 0824 movs r4, #8
  574. 244 00e4 B1E7 b .L9
  575. 245 .LVL21:
  576. 246 .L28:
  577. 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  578. 247 .loc 1 270 18 view .LVU78
  579. 248 00e6 0024 movs r4, #0
  580. 249 .LVL22:
  581. ARM GAS /tmp/ccoCvX6R.s page 11
  582. 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
  583. 250 .loc 1 270 18 view .LVU79
  584. 251 00e8 AFE7 b .L9
  585. 252 .LVL23:
  586. 253 .L29:
  587. 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  588. 254 .loc 1 250 20 view .LVU80
  589. 255 00ea 0424 movs r4, #4
  590. 256 .LVL24:
  591. 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  592. 257 .loc 1 250 20 view .LVU81
  593. 258 00ec ADE7 b .L9
  594. 259 .LVL25:
  595. 260 .L15:
  596. 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
  597. 261 .loc 1 280 67 discriminator 2 view .LVU82
  598. 262 00ee 061D adds r6, r0, #4
  599. 263 00f0 AFE7 b .L16
  600. 264 .LVL26:
  601. 265 .L17:
  602. 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  603. 266 .loc 1 281 81 discriminator 2 view .LVU83
  604. 267 00f2 ACF10802 sub r2, ip, #8
  605. 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  606. 268 .loc 1 281 68 discriminator 2 view .LVU84
  607. 269 00f6 9200 lsls r2, r2, #2
  608. 270 00f8 B0E7 b .L18
  609. 271 .LVL27:
  610. 272 .L38:
  611. 273 .loc 1 294 9 view .LVU85
  612. 274 00fa 0323 movs r3, #3
  613. 275 00fc 00E0 b .L19
  614. 276 .L30:
  615. 277 00fe 0023 movs r3, #0
  616. 278 .L19:
  617. 279 .loc 1 294 9 discriminator 16 view .LVU86
  618. 280 0100 AB40 lsls r3, r3, r5
  619. 281 0102 3343 orrs r3, r3, r6
  620. 282 .LVL28:
  621. 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
  622. 283 .loc 1 295 9 is_stmt 1 discriminator 16 view .LVU87
  623. 284 .loc 1 295 38 is_stmt 0 discriminator 16 view .LVU88
  624. 285 0104 0232 adds r2, r2, #2
  625. 286 0106 444D ldr r5, .L40+12
  626. 287 0108 45F82230 str r3, [r5, r2, lsl #2]
  627. 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  628. 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  629. 298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable or disable the rising trigger */
  630. 299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
  631. 288 .loc 1 299 9 is_stmt 1 discriminator 16 view .LVU89
  632. 289 .loc 1 299 23 is_stmt 0 discriminator 16 view .LVU90
  633. 290 010c 4B68 ldr r3, [r1, #4]
  634. 291 .LVL29:
  635. 292 .loc 1 299 12 discriminator 16 view .LVU91
  636. 293 010e 13F4801F tst r3, #1048576
  637. 294 0112 61D0 beq .L20
  638. 300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  639. ARM GAS /tmp/ccoCvX6R.s page 12
  640. 301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->RTSR, iocurrent);
  641. 295 .loc 1 301 11 is_stmt 1 view .LVU92
  642. 296 0114 424A ldr r2, .L40+20
  643. 297 .LVL30:
  644. 298 .loc 1 301 11 is_stmt 0 view .LVU93
  645. 299 0116 9368 ldr r3, [r2, #8]
  646. 300 0118 43EA0E03 orr r3, r3, lr
  647. 301 011c 9360 str r3, [r2, #8]
  648. 302 .LVL31:
  649. 303 .L21:
  650. 302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  651. 303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  652. 304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  653. 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->RTSR, iocurrent);
  654. 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  655. 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  656. 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable or disable the falling trigger */
  657. 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
  658. 304 .loc 1 309 9 is_stmt 1 view .LVU94
  659. 305 .loc 1 309 23 is_stmt 0 view .LVU95
  660. 306 011e 4B68 ldr r3, [r1, #4]
  661. 307 .loc 1 309 12 view .LVU96
  662. 308 0120 13F4001F tst r3, #2097152
  663. 309 0124 5ED0 beq .L22
  664. 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  665. 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->FTSR, iocurrent);
  666. 310 .loc 1 311 11 is_stmt 1 view .LVU97
  667. 311 0126 3E4A ldr r2, .L40+20
  668. 312 0128 D368 ldr r3, [r2, #12]
  669. 313 012a 43EA0E03 orr r3, r3, lr
  670. 314 012e D360 str r3, [r2, #12]
  671. 315 .L23:
  672. 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  673. 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  674. 314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  675. 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->FTSR, iocurrent);
  676. 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  677. 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  678. 318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the event mask */
  679. 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
  680. 316 .loc 1 319 9 view .LVU98
  681. 317 .loc 1 319 23 is_stmt 0 view .LVU99
  682. 318 0130 4B68 ldr r3, [r1, #4]
  683. 319 .loc 1 319 12 view .LVU100
  684. 320 0132 13F4003F tst r3, #131072
  685. 321 0136 5BD0 beq .L24
  686. 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  687. 321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->EMR, iocurrent);
  688. 322 .loc 1 321 11 is_stmt 1 view .LVU101
  689. 323 0138 394A ldr r2, .L40+20
  690. 324 013a 5368 ldr r3, [r2, #4]
  691. 325 013c 43EA0E03 orr r3, r3, lr
  692. 326 0140 5360 str r3, [r2, #4]
  693. 327 .L25:
  694. 322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  695. 323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  696. 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  697. ARM GAS /tmp/ccoCvX6R.s page 13
  698. 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, iocurrent);
  699. 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  700. 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  701. 328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the interrupt mask */
  702. 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
  703. 328 .loc 1 329 9 view .LVU102
  704. 329 .loc 1 329 23 is_stmt 0 view .LVU103
  705. 330 0142 4B68 ldr r3, [r1, #4]
  706. 331 .loc 1 329 12 view .LVU104
  707. 332 0144 13F4803F tst r3, #65536
  708. 333 0148 58D0 beq .L26
  709. 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  710. 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->IMR, iocurrent);
  711. 334 .loc 1 331 11 is_stmt 1 view .LVU105
  712. 335 014a 354A ldr r2, .L40+20
  713. 336 014c 1368 ldr r3, [r2]
  714. 337 014e 43EA0E03 orr r3, r3, lr
  715. 338 0152 1360 str r3, [r2]
  716. 339 .L3:
  717. 332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  718. 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  719. 334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  720. 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->IMR, iocurrent);
  721. 336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  722. 337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  723. 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  724. 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  725. 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** position++;
  726. 340 .loc 1 340 2 view .LVU106
  727. 341 .loc 1 340 10 is_stmt 0 view .LVU107
  728. 342 0154 0CF1010C add ip, ip, #1
  729. 343 .LVL32:
  730. 344 .L2:
  731. 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  732. 345 .loc 1 194 9 is_stmt 1 view .LVU108
  733. 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  734. 346 .loc 1 194 21 is_stmt 0 view .LVU109
  735. 347 0158 0A68 ldr r2, [r1]
  736. 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  737. 348 .loc 1 194 9 view .LVU110
  738. 349 015a 32FA0CF3 lsrs r3, r2, ip
  739. 350 015e 53D0 beq .L39
  740. 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  741. 351 .loc 1 197 5 is_stmt 1 view .LVU111
  742. 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  743. 352 .loc 1 197 16 is_stmt 0 view .LVU112
  744. 353 0160 0123 movs r3, #1
  745. 354 0162 03FA0CF3 lsl r3, r3, ip
  746. 355 .LVL33:
  747. 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  748. 356 .loc 1 200 5 is_stmt 1 view .LVU113
  749. 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  750. 357 .loc 1 200 15 is_stmt 0 view .LVU114
  751. 358 0166 02EA030E and lr, r2, r3
  752. 359 .LVL34:
  753. 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  754. 360 .loc 1 202 5 is_stmt 1 view .LVU115
  755. ARM GAS /tmp/ccoCvX6R.s page 14
  756. 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  757. 361 .loc 1 202 8 is_stmt 0 view .LVU116
  758. 362 016a 33EA0202 bics r2, r3, r2
  759. 363 016e F1D1 bne .L3
  760. 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  761. 364 .loc 1 205 7 is_stmt 1 view .LVU117
  762. 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  763. 365 .loc 1 208 7 view .LVU118
  764. 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  765. 366 .loc 1 208 24 is_stmt 0 view .LVU119
  766. 367 0170 4A68 ldr r2, [r1, #4]
  767. 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  768. 368 .loc 1 208 7 view .LVU120
  769. 369 0172 122A cmp r2, #18
  770. 370 0174 3FF649AF bhi .L4
  771. 371 0178 122A cmp r2, #18
  772. 372 017a 3FF666AF bhi .L9
  773. 373 017e 01A5 adr r5, .L7
  774. 374 0180 55F822F0 ldr pc, [r5, r2, lsl #2]
  775. 375 .p2align 2
  776. 376 .L7:
  777. 377 0184 33000000 .word .L12+1
  778. 378 0188 CB000000 .word .L11+1
  779. 379 018c D5000000 .word .L10+1
  780. 380 0190 E7000000 .word .L28+1
  781. 381 0194 4B000000 .word .L9+1
  782. 382 0198 4B000000 .word .L9+1
  783. 383 019c 4B000000 .word .L9+1
  784. 384 01a0 4B000000 .word .L9+1
  785. 385 01a4 4B000000 .word .L9+1
  786. 386 01a8 4B000000 .word .L9+1
  787. 387 01ac 4B000000 .word .L9+1
  788. 388 01b0 4B000000 .word .L9+1
  789. 389 01b4 4B000000 .word .L9+1
  790. 390 01b8 4B000000 .word .L9+1
  791. 391 01bc 4B000000 .word .L9+1
  792. 392 01c0 4B000000 .word .L9+1
  793. 393 01c4 4B000000 .word .L9+1
  794. 394 01c8 CF000000 .word .L8+1
  795. 395 01cc DB000000 .word .L6+1
  796. 396 .LVL35:
  797. 397 .p2align 1
  798. 398 .L31:
  799. 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
  800. 399 .loc 1 294 9 view .LVU121
  801. 400 01d0 0123 movs r3, #1
  802. 401 .LVL36:
  803. 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
  804. 402 .loc 1 294 9 view .LVU122
  805. 403 01d2 95E7 b .L19
  806. 404 .LVL37:
  807. 405 .L32:
  808. 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
  809. 406 .loc 1 294 9 view .LVU123
  810. 407 01d4 0223 movs r3, #2
  811. 408 01d6 93E7 b .L19
  812. 409 .LVL38:
  813. ARM GAS /tmp/ccoCvX6R.s page 15
  814. 410 .L20:
  815. 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  816. 411 .loc 1 305 11 is_stmt 1 view .LVU124
  817. 412 01d8 114A ldr r2, .L40+20
  818. 413 .LVL39:
  819. 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  820. 414 .loc 1 305 11 is_stmt 0 view .LVU125
  821. 415 01da 9368 ldr r3, [r2, #8]
  822. 416 01dc 23EA0E03 bic r3, r3, lr
  823. 417 01e0 9360 str r3, [r2, #8]
  824. 418 .LVL40:
  825. 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  826. 419 .loc 1 305 11 view .LVU126
  827. 420 01e2 9CE7 b .L21
  828. 421 .L22:
  829. 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  830. 422 .loc 1 315 11 is_stmt 1 view .LVU127
  831. 423 01e4 0E4A ldr r2, .L40+20
  832. 424 01e6 D368 ldr r3, [r2, #12]
  833. 425 01e8 23EA0E03 bic r3, r3, lr
  834. 426 01ec D360 str r3, [r2, #12]
  835. 427 01ee 9FE7 b .L23
  836. 428 .L24:
  837. 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  838. 429 .loc 1 325 11 view .LVU128
  839. 430 01f0 0B4A ldr r2, .L40+20
  840. 431 01f2 5368 ldr r3, [r2, #4]
  841. 432 01f4 23EA0E03 bic r3, r3, lr
  842. 433 01f8 5360 str r3, [r2, #4]
  843. 434 01fa A2E7 b .L25
  844. 435 .L26:
  845. 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  846. 436 .loc 1 335 11 view .LVU129
  847. 437 01fc 084A ldr r2, .L40+20
  848. 438 01fe 1368 ldr r3, [r2]
  849. 439 0200 23EA0E03 bic r3, r3, lr
  850. 440 0204 1360 str r3, [r2]
  851. 441 0206 A5E7 b .L3
  852. 442 .LVL41:
  853. 443 .L39:
  854. 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  855. 342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  856. 444 .loc 1 342 1 is_stmt 0 view .LVU130
  857. 445 0208 02B0 add sp, sp, #8
  858. 446 .LCFI2:
  859. 447 .cfi_def_cfa_offset 16
  860. 448 @ sp needed
  861. 449 020a 70BD pop {r4, r5, r6, pc}
  862. 450 .LVL42:
  863. 451 .L41:
  864. 452 .loc 1 342 1 view .LVU131
  865. 453 .align 2
  866. 454 .L40:
  867. 455 020c 00002210 .word 270663680
  868. 456 0210 00003110 .word 271646720
  869. 457 0214 00100240 .word 1073876992
  870. 458 0218 00000140 .word 1073807360
  871. ARM GAS /tmp/ccoCvX6R.s page 16
  872. 459 021c 00080140 .word 1073809408
  873. 460 0220 00040140 .word 1073808384
  874. 461 .cfi_endproc
  875. 462 .LFE65:
  876. 464 .section .text.HAL_GPIO_DeInit,"ax",%progbits
  877. 465 .align 1
  878. 466 .global HAL_GPIO_DeInit
  879. 467 .syntax unified
  880. 468 .thumb
  881. 469 .thumb_func
  882. 471 HAL_GPIO_DeInit:
  883. 472 .LVL43:
  884. 473 .LFB66:
  885. 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  886. 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  887. 345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief De-initializes the GPIOx peripheral registers to their default reset values.
  888. 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  889. 347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written.
  890. 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15).
  891. 349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  892. 350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  893. 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
  894. 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  895. 474 .loc 1 352 1 is_stmt 1 view -0
  896. 475 .cfi_startproc
  897. 476 @ args = 0, pretend = 0, frame = 0
  898. 477 @ frame_needed = 0, uses_anonymous_args = 0
  899. 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
  900. 478 .loc 1 353 3 view .LVU133
  901. 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
  902. 479 .loc 1 354 3 view .LVU134
  903. 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t tmp;
  904. 480 .loc 1 355 3 view .LVU135
  905. 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
  906. 481 .loc 1 356 3 view .LVU136
  907. 357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t registeroffset;
  908. 482 .loc 1 357 3 view .LVU137
  909. 358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  910. 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  911. 360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
  912. 483 .loc 1 360 3 view .LVU138
  913. 361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
  914. 484 .loc 1 361 3 view .LVU139
  915. 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  916. 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the port pins */
  917. 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0u)
  918. 485 .loc 1 364 3 view .LVU140
  919. 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
  920. 486 .loc 1 353 12 is_stmt 0 view .LVU141
  921. 487 0000 0022 movs r2, #0
  922. 488 .loc 1 364 9 view .LVU142
  923. 489 0002 6DE0 b .L57
  924. 490 .LVL44:
  925. 491 .L64:
  926. 492 .LCFI3:
  927. 493 .cfi_def_cfa_offset 20
  928. 494 .cfi_offset 4, -20
  929. ARM GAS /tmp/ccoCvX6R.s page 17
  930. 495 .cfi_offset 5, -16
  931. 496 .cfi_offset 6, -12
  932. 497 .cfi_offset 7, -8
  933. 498 .cfi_offset 14, -4
  934. 365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  935. 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get current io position */
  936. 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position);
  937. 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  938. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (iocurrent)
  939. 370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  940. 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/
  941. 372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */
  942. 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  943. 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = AFIO->EXTICR[position >> 2u];
  944. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
  945. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  946. 499 .loc 1 376 19 view .LVU143
  947. 500 0004 0325 movs r5, #3
  948. 501 0006 00E0 b .L45
  949. 502 .L52:
  950. 503 0008 0025 movs r5, #0
  951. 504 .L45:
  952. 505 .loc 1 376 41 discriminator 16 view .LVU144
  953. 506 000a 05FA04F4 lsl r4, r5, r4
  954. 507 .loc 1 376 10 discriminator 16 view .LVU145
  955. 508 000e 6445 cmp r4, ip
  956. 509 0010 42D0 beq .L62
  957. 510 .LVL45:
  958. 511 .L46:
  959. 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  960. 378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear EXTI line configuration */
  961. 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
  962. 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
  963. 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  964. 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */
  965. 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
  966. 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
  967. 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  968. 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u));
  969. 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
  970. 388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  971. 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/
  972. 390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check if the current bit belongs to first half or last half of the pin count number
  973. 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in order to address CRH or CRL register */
  974. 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
  975. 512 .loc 1 392 7 is_stmt 1 view .LVU146
  976. 513 .loc 1 392 67 is_stmt 0 view .LVU147
  977. 514 0012 FF2B cmp r3, #255
  978. 515 0014 5BD8 bhi .L47
  979. 516 .loc 1 392 67 discriminator 1 view .LVU148
  980. 517 0016 0646 mov r6, r0
  981. 518 .L48:
  982. 519 .LVL46:
  983. 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
  984. 520 .loc 1 393 7 is_stmt 1 discriminator 4 view .LVU149
  985. 521 .loc 1 393 68 is_stmt 0 discriminator 4 view .LVU150
  986. 522 0018 FF2B cmp r3, #255
  987. ARM GAS /tmp/ccoCvX6R.s page 18
  988. 523 001a 5AD8 bhi .L49
  989. 524 .loc 1 393 68 discriminator 1 view .LVU151
  990. 525 001c 9500 lsls r5, r2, #2
  991. 526 .L50:
  992. 527 .LVL47:
  993. 394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  994. 395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* CRL/CRH default value is floating input(0x04) shifted to correct position */
  995. 396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CN
  996. 528 .loc 1 396 7 is_stmt 1 discriminator 4 view .LVU152
  997. 529 001e 3468 ldr r4, [r6]
  998. 530 0020 4FF00F0E mov lr, #15
  999. 531 0024 0EFA05FE lsl lr, lr, r5
  1000. 532 0028 24EA0E04 bic r4, r4, lr
  1001. 533 002c 4FF0040C mov ip, #4
  1002. 534 0030 0CFA05FC lsl ip, ip, r5
  1003. 535 0034 44EA0C04 orr r4, r4, ip
  1004. 536 0038 3460 str r4, [r6]
  1005. 397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1006. 398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* ODR default value is 0 */
  1007. 399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(GPIOx->ODR, iocurrent);
  1008. 537 .loc 1 399 7 discriminator 4 view .LVU153
  1009. 538 003a C468 ldr r4, [r0, #12]
  1010. 539 003c 24EA0303 bic r3, r4, r3
  1011. 540 .LVL48:
  1012. 541 .loc 1 399 7 is_stmt 0 discriminator 4 view .LVU154
  1013. 542 0040 C360 str r3, [r0, #12]
  1014. 543 .L44:
  1015. 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1016. 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1017. 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** position++;
  1018. 544 .loc 1 402 5 is_stmt 1 view .LVU155
  1019. 545 .loc 1 402 13 is_stmt 0 view .LVU156
  1020. 546 0042 0132 adds r2, r2, #1
  1021. 547 .LVL49:
  1022. 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1023. 548 .loc 1 364 9 is_stmt 1 view .LVU157
  1024. 549 0044 31FA02F3 lsrs r3, r1, r2
  1025. 550 0048 48D0 beq .L63
  1026. 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1027. 551 .loc 1 367 5 view .LVU158
  1028. 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1029. 552 .loc 1 367 35 is_stmt 0 view .LVU159
  1030. 553 004a 0123 movs r3, #1
  1031. 554 004c 9340 lsls r3, r3, r2
  1032. 555 .LVL50:
  1033. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1034. 556 .loc 1 369 5 is_stmt 1 view .LVU160
  1035. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1036. 557 .loc 1 369 8 is_stmt 0 view .LVU161
  1037. 558 004e 0B40 ands r3, r3, r1
  1038. 559 .LVL51:
  1039. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1040. 560 .loc 1 369 8 view .LVU162
  1041. 561 0050 F7D0 beq .L44
  1042. 562 .LVL52:
  1043. 563 .L58:
  1044. 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
  1045. ARM GAS /tmp/ccoCvX6R.s page 19
  1046. 564 .loc 1 374 7 is_stmt 1 view .LVU163
  1047. 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
  1048. 565 .loc 1 374 35 is_stmt 0 view .LVU164
  1049. 566 0052 4FEA920E lsr lr, r2, #2
  1050. 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
  1051. 567 .loc 1 374 11 view .LVU165
  1052. 568 0056 0EF10205 add r5, lr, #2
  1053. 569 005a 264C ldr r4, .L67
  1054. 570 005c 54F82550 ldr r5, [r4, r5, lsl #2]
  1055. 571 .LVL53:
  1056. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  1057. 572 .loc 1 375 7 is_stmt 1 view .LVU166
  1058. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  1059. 573 .loc 1 375 40 is_stmt 0 view .LVU167
  1060. 574 0060 02F00304 and r4, r2, #3
  1061. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  1062. 575 .loc 1 375 28 view .LVU168
  1063. 576 0064 A400 lsls r4, r4, #2
  1064. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  1065. 577 .loc 1 375 21 view .LVU169
  1066. 578 0066 0F26 movs r6, #15
  1067. 579 0068 A640 lsls r6, r6, r4
  1068. 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
  1069. 580 .loc 1 375 11 view .LVU170
  1070. 581 006a 06EA050C and ip, r6, r5
  1071. 582 .LVL54:
  1072. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1073. 583 .loc 1 376 7 is_stmt 1 view .LVU171
  1074. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1075. 584 .loc 1 376 19 is_stmt 0 view .LVU172
  1076. 585 006e 224D ldr r5, .L67+4
  1077. 586 0070 A842 cmp r0, r5
  1078. 587 0072 C9D0 beq .L52
  1079. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1080. 588 .loc 1 376 19 discriminator 1 view .LVU173
  1081. 589 0074 05F58065 add r5, r5, #1024
  1082. 590 0078 A842 cmp r0, r5
  1083. 591 007a 09D0 beq .L53
  1084. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1085. 592 .loc 1 376 19 discriminator 3 view .LVU174
  1086. 593 007c 05F58065 add r5, r5, #1024
  1087. 594 0080 A842 cmp r0, r5
  1088. 595 0082 07D0 beq .L54
  1089. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1090. 596 .loc 1 376 19 discriminator 5 view .LVU175
  1091. 597 0084 05F58065 add r5, r5, #1024
  1092. 598 0088 A842 cmp r0, r5
  1093. 599 008a BBD0 beq .L64
  1094. 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1095. 600 .loc 1 376 19 view .LVU176
  1096. 601 008c 0425 movs r5, #4
  1097. 602 008e BCE7 b .L45
  1098. 603 .L53:
  1099. 604 0090 0125 movs r5, #1
  1100. 605 0092 BAE7 b .L45
  1101. 606 .L54:
  1102. 607 0094 0225 movs r5, #2
  1103. ARM GAS /tmp/ccoCvX6R.s page 20
  1104. 608 0096 B8E7 b .L45
  1105. 609 .L62:
  1106. 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
  1107. 610 .loc 1 379 9 is_stmt 1 view .LVU177
  1108. 611 0098 184C ldr r4, .L67+8
  1109. 612 009a 2568 ldr r5, [r4]
  1110. 613 009c 25EA0305 bic r5, r5, r3
  1111. 614 00a0 2560 str r5, [r4]
  1112. 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1113. 615 .loc 1 380 9 view .LVU178
  1114. 616 00a2 6568 ldr r5, [r4, #4]
  1115. 617 00a4 25EA0305 bic r5, r5, r3
  1116. 618 00a8 6560 str r5, [r4, #4]
  1117. 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
  1118. 619 .loc 1 383 9 view .LVU179
  1119. 620 00aa E568 ldr r5, [r4, #12]
  1120. 621 00ac 25EA0305 bic r5, r5, r3
  1121. 622 00b0 E560 str r5, [r4, #12]
  1122. 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1123. 623 .loc 1 384 9 view .LVU180
  1124. 624 00b2 A568 ldr r5, [r4, #8]
  1125. 625 00b4 25EA0305 bic r5, r5, r3
  1126. 626 00b8 A560 str r5, [r4, #8]
  1127. 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
  1128. 627 .loc 1 386 9 view .LVU181
  1129. 628 .LVL55:
  1130. 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1131. 629 .loc 1 387 9 view .LVU182
  1132. 630 00ba 0E4F ldr r7, .L67
  1133. 631 00bc 0EF10204 add r4, lr, #2
  1134. 632 00c0 57F82450 ldr r5, [r7, r4, lsl #2]
  1135. 633 00c4 25EA0606 bic r6, r5, r6
  1136. 634 .LVL56:
  1137. 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1138. 635 .loc 1 387 9 is_stmt 0 view .LVU183
  1139. 636 00c8 47F82460 str r6, [r7, r4, lsl #2]
  1140. 637 00cc A1E7 b .L46
  1141. 638 .LVL57:
  1142. 639 .L47:
  1143. 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
  1144. 640 .loc 1 392 67 discriminator 2 view .LVU184
  1145. 641 00ce 061D adds r6, r0, #4
  1146. 642 00d0 A2E7 b .L48
  1147. 643 .LVL58:
  1148. 644 .L49:
  1149. 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1150. 645 .loc 1 393 81 discriminator 2 view .LVU185
  1151. 646 00d2 A2F1080C sub ip, r2, #8
  1152. 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1153. 647 .loc 1 393 68 discriminator 2 view .LVU186
  1154. 648 00d6 4FEA8C05 lsl r5, ip, #2
  1155. 649 00da A0E7 b .L50
  1156. 650 .LVL59:
  1157. 651 .L63:
  1158. 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1159. 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1160. 652 .loc 1 404 1 view .LVU187
  1161. ARM GAS /tmp/ccoCvX6R.s page 21
  1162. 653 00dc F0BD pop {r4, r5, r6, r7, pc}
  1163. 654 .LVL60:
  1164. 655 .L66:
  1165. 656 .LCFI4:
  1166. 657 .cfi_def_cfa_offset 0
  1167. 658 .cfi_restore 4
  1168. 659 .cfi_restore 5
  1169. 660 .cfi_restore 6
  1170. 661 .cfi_restore 7
  1171. 662 .cfi_restore 14
  1172. 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1173. 663 .loc 1 402 5 is_stmt 1 view .LVU188
  1174. 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1175. 664 .loc 1 402 13 is_stmt 0 view .LVU189
  1176. 665 00de 0132 adds r2, r2, #1
  1177. 666 .LVL61:
  1178. 667 .L57:
  1179. 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1180. 668 .loc 1 364 9 is_stmt 1 view .LVU190
  1181. 669 00e0 31FA02F3 lsrs r3, r1, r2
  1182. 670 00e4 05D0 beq .L65
  1183. 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1184. 671 .loc 1 367 5 view .LVU191
  1185. 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1186. 672 .loc 1 367 35 is_stmt 0 view .LVU192
  1187. 673 00e6 0123 movs r3, #1
  1188. 674 00e8 9340 lsls r3, r3, r2
  1189. 675 .LVL62:
  1190. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1191. 676 .loc 1 369 5 is_stmt 1 view .LVU193
  1192. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1193. 677 .loc 1 369 8 is_stmt 0 view .LVU194
  1194. 678 00ea 0B40 ands r3, r3, r1
  1195. 679 .LVL63:
  1196. 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1197. 680 .loc 1 369 8 view .LVU195
  1198. 681 00ec F7D0 beq .L66
  1199. 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
  1200. 682 .loc 1 352 1 view .LVU196
  1201. 683 00ee F0B5 push {r4, r5, r6, r7, lr}
  1202. 684 .LCFI5:
  1203. 685 .cfi_def_cfa_offset 20
  1204. 686 .cfi_offset 4, -20
  1205. 687 .cfi_offset 5, -16
  1206. 688 .cfi_offset 6, -12
  1207. 689 .cfi_offset 7, -8
  1208. 690 .cfi_offset 14, -4
  1209. 691 00f0 AFE7 b .L58
  1210. 692 .LVL64:
  1211. 693 .L65:
  1212. 694 .LCFI6:
  1213. 695 .cfi_def_cfa_offset 0
  1214. 696 .cfi_restore 4
  1215. 697 .cfi_restore 5
  1216. 698 .cfi_restore 6
  1217. 699 .cfi_restore 7
  1218. 700 .cfi_restore 14
  1219. ARM GAS /tmp/ccoCvX6R.s page 22
  1220. 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
  1221. 701 .loc 1 352 1 view .LVU197
  1222. 702 00f2 7047 bx lr
  1223. 703 .L68:
  1224. 704 .align 2
  1225. 705 .L67:
  1226. 706 00f4 00000140 .word 1073807360
  1227. 707 00f8 00080140 .word 1073809408
  1228. 708 00fc 00040140 .word 1073808384
  1229. 709 .cfi_endproc
  1230. 710 .LFE66:
  1231. 712 .section .text.HAL_GPIO_ReadPin,"ax",%progbits
  1232. 713 .align 1
  1233. 714 .global HAL_GPIO_ReadPin
  1234. 715 .syntax unified
  1235. 716 .thumb
  1236. 717 .thumb_func
  1237. 719 HAL_GPIO_ReadPin:
  1238. 720 .LVL65:
  1239. 721 .LFB67:
  1240. 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1241. 406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1242. 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @}
  1243. 408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1244. 409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1245. 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
  1246. 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO Read and Write
  1247. 412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  1248. 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
  1249. 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
  1250. 415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### IO operation functions #####
  1251. 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
  1252. 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
  1253. 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** This subsection provides a set of functions allowing to manage the GPIOs.
  1254. 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1255. 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
  1256. 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
  1257. 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1258. 423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1259. 424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1260. 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Reads the specified input port pin.
  1261. 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  1262. 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to read.
  1263. 428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15).
  1264. 429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval The input port pin value.
  1265. 430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1266. 431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  1267. 432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1268. 722 .loc 1 432 1 is_stmt 1 view -0
  1269. 723 .cfi_startproc
  1270. 724 @ args = 0, pretend = 0, frame = 0
  1271. 725 @ frame_needed = 0, uses_anonymous_args = 0
  1272. 726 @ link register save eliminated.
  1273. 433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_PinState bitstatus;
  1274. 727 .loc 1 433 3 view .LVU199
  1275. 434:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1276. 435:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  1277. ARM GAS /tmp/ccoCvX6R.s page 23
  1278. 436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
  1279. 728 .loc 1 436 3 view .LVU200
  1280. 437:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1281. 438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
  1282. 729 .loc 1 438 3 view .LVU201
  1283. 730 .loc 1 438 13 is_stmt 0 view .LVU202
  1284. 731 0000 8368 ldr r3, [r0, #8]
  1285. 732 .loc 1 438 6 view .LVU203
  1286. 733 0002 1942 tst r1, r3
  1287. 734 0004 01D0 beq .L71
  1288. 439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1289. 440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET;
  1290. 735 .loc 1 440 15 view .LVU204
  1291. 736 0006 0120 movs r0, #1
  1292. 737 .LVL66:
  1293. 738 .loc 1 440 15 view .LVU205
  1294. 739 0008 7047 bx lr
  1295. 740 .LVL67:
  1296. 741 .L71:
  1297. 441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1298. 442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  1299. 443:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1300. 444:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET;
  1301. 742 .loc 1 444 15 view .LVU206
  1302. 743 000a 0020 movs r0, #0
  1303. 744 .LVL68:
  1304. 445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1305. 446:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return bitstatus;
  1306. 745 .loc 1 446 3 is_stmt 1 view .LVU207
  1307. 447:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1308. 746 .loc 1 447 1 is_stmt 0 view .LVU208
  1309. 747 000c 7047 bx lr
  1310. 748 .cfi_endproc
  1311. 749 .LFE67:
  1312. 751 .section .text.HAL_GPIO_WritePin,"ax",%progbits
  1313. 752 .align 1
  1314. 753 .global HAL_GPIO_WritePin
  1315. 754 .syntax unified
  1316. 755 .thumb
  1317. 756 .thumb_func
  1318. 758 HAL_GPIO_WritePin:
  1319. 759 .LVL69:
  1320. 760 .LFB68:
  1321. 448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1322. 449:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1323. 450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Sets or clears the selected data port bit.
  1324. 451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  1325. 452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR register to allow atomic read/modify
  1326. 453:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between
  1327. 454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the read and the modify access.
  1328. 455:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
  1329. 456:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  1330. 457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written.
  1331. 458:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15).
  1332. 459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param PinState: specifies the value to be written to the selected bit.
  1333. 460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values:
  1334. 461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin
  1335. ARM GAS /tmp/ccoCvX6R.s page 24
  1336. 462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin
  1337. 463:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  1338. 464:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1339. 465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
  1340. 466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1341. 761 .loc 1 466 1 is_stmt 1 view -0
  1342. 762 .cfi_startproc
  1343. 763 @ args = 0, pretend = 0, frame = 0
  1344. 764 @ frame_needed = 0, uses_anonymous_args = 0
  1345. 765 @ link register save eliminated.
  1346. 467:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  1347. 468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
  1348. 766 .loc 1 468 3 view .LVU210
  1349. 469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState));
  1350. 767 .loc 1 469 3 view .LVU211
  1351. 470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1352. 471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET)
  1353. 768 .loc 1 471 3 view .LVU212
  1354. 769 .loc 1 471 6 is_stmt 0 view .LVU213
  1355. 770 0000 0AB1 cbz r2, .L73
  1356. 472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1357. 473:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = GPIO_Pin;
  1358. 771 .loc 1 473 5 is_stmt 1 view .LVU214
  1359. 772 .loc 1 473 17 is_stmt 0 view .LVU215
  1360. 773 0002 0161 str r1, [r0, #16]
  1361. 774 0004 7047 bx lr
  1362. 775 .L73:
  1363. 474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1364. 475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  1365. 476:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1366. 477:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
  1367. 776 .loc 1 477 5 is_stmt 1 view .LVU216
  1368. 777 .loc 1 477 38 is_stmt 0 view .LVU217
  1369. 778 0006 0904 lsls r1, r1, #16
  1370. 779 .LVL70:
  1371. 780 .loc 1 477 17 view .LVU218
  1372. 781 0008 0161 str r1, [r0, #16]
  1373. 478:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1374. 479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1375. 782 .loc 1 479 1 view .LVU219
  1376. 783 000a 7047 bx lr
  1377. 784 .cfi_endproc
  1378. 785 .LFE68:
  1379. 787 .section .text.HAL_GPIO_TogglePin,"ax",%progbits
  1380. 788 .align 1
  1381. 789 .global HAL_GPIO_TogglePin
  1382. 790 .syntax unified
  1383. 791 .thumb
  1384. 792 .thumb_func
  1385. 794 HAL_GPIO_TogglePin:
  1386. 795 .LVL71:
  1387. 796 .LFB69:
  1388. 480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1389. 481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1390. 482:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Toggles the specified GPIO pin
  1391. 483:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  1392. 484:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins to be toggled.
  1393. ARM GAS /tmp/ccoCvX6R.s page 25
  1394. 485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  1395. 486:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1396. 487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  1397. 488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1398. 797 .loc 1 488 1 is_stmt 1 view -0
  1399. 798 .cfi_startproc
  1400. 799 @ args = 0, pretend = 0, frame = 0
  1401. 800 @ frame_needed = 0, uses_anonymous_args = 0
  1402. 801 @ link register save eliminated.
  1403. 489:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t odr;
  1404. 802 .loc 1 489 3 view .LVU221
  1405. 490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1406. 491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  1407. 492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
  1408. 803 .loc 1 492 3 view .LVU222
  1409. 493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1410. 494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* get current Output Data Register value */
  1411. 495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** odr = GPIOx->ODR;
  1412. 804 .loc 1 495 3 view .LVU223
  1413. 805 .loc 1 495 7 is_stmt 0 view .LVU224
  1414. 806 0000 C368 ldr r3, [r0, #12]
  1415. 807 .LVL72:
  1416. 496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1417. 497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */
  1418. 498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
  1419. 808 .loc 1 498 3 is_stmt 1 view .LVU225
  1420. 809 .loc 1 498 23 is_stmt 0 view .LVU226
  1421. 810 0002 01EA0302 and r2, r1, r3
  1422. 811 .loc 1 498 59 view .LVU227
  1423. 812 0006 21EA0301 bic r1, r1, r3
  1424. 813 .LVL73:
  1425. 814 .loc 1 498 51 view .LVU228
  1426. 815 000a 41EA0241 orr r1, r1, r2, lsl #16
  1427. 816 .loc 1 498 15 view .LVU229
  1428. 817 000e 0161 str r1, [r0, #16]
  1429. 499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1430. 818 .loc 1 499 1 view .LVU230
  1431. 819 0010 7047 bx lr
  1432. 820 .cfi_endproc
  1433. 821 .LFE69:
  1434. 823 .section .text.HAL_GPIO_LockPin,"ax",%progbits
  1435. 824 .align 1
  1436. 825 .global HAL_GPIO_LockPin
  1437. 826 .syntax unified
  1438. 827 .thumb
  1439. 828 .thumb_func
  1440. 830 HAL_GPIO_LockPin:
  1441. 831 .LVL74:
  1442. 832 .LFB70:
  1443. 500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1444. 501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1445. 502:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers.
  1446. 503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @note The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence
  1447. 504:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * has been applied on a port bit, it is no longer possible to modify the value of the port
  1448. 505:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the next reset.
  1449. 506:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
  1450. 507:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be locked.
  1451. ARM GAS /tmp/ccoCvX6R.s page 26
  1452. 508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  1453. 509:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  1454. 510:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1455. 511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
  1456. 512:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1457. 833 .loc 1 512 1 is_stmt 1 view -0
  1458. 834 .cfi_startproc
  1459. 835 @ args = 0, pretend = 0, frame = 8
  1460. 836 @ frame_needed = 0, uses_anonymous_args = 0
  1461. 837 @ link register save eliminated.
  1462. 838 .loc 1 512 1 is_stmt 0 view .LVU232
  1463. 839 0000 82B0 sub sp, sp, #8
  1464. 840 .LCFI7:
  1465. 841 .cfi_def_cfa_offset 8
  1466. 513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK;
  1467. 842 .loc 1 513 3 is_stmt 1 view .LVU233
  1468. 843 .loc 1 513 17 is_stmt 0 view .LVU234
  1469. 844 0002 4FF48033 mov r3, #65536
  1470. 845 0006 0193 str r3, [sp, #4]
  1471. 514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1472. 515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
  1473. 516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
  1474. 846 .loc 1 516 3 is_stmt 1 view .LVU235
  1475. 517:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
  1476. 847 .loc 1 517 3 view .LVU236
  1477. 518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1478. 519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Apply lock key write sequence */
  1479. 520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin);
  1480. 848 .loc 1 520 3 view .LVU237
  1481. 849 0008 019B ldr r3, [sp, #4]
  1482. 850 000a 0B43 orrs r3, r3, r1
  1483. 851 000c 0193 str r3, [sp, #4]
  1484. 521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
  1485. 522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = tmp;
  1486. 852 .loc 1 522 3 view .LVU238
  1487. 853 .loc 1 522 15 is_stmt 0 view .LVU239
  1488. 854 000e 019B ldr r3, [sp, #4]
  1489. 855 0010 8361 str r3, [r0, #24]
  1490. 523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
  1491. 524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin;
  1492. 856 .loc 1 524 3 is_stmt 1 view .LVU240
  1493. 857 .loc 1 524 15 is_stmt 0 view .LVU241
  1494. 858 0012 8161 str r1, [r0, #24]
  1495. 525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
  1496. 526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = tmp;
  1497. 859 .loc 1 526 3 is_stmt 1 view .LVU242
  1498. 860 .loc 1 526 15 is_stmt 0 view .LVU243
  1499. 861 0014 019B ldr r3, [sp, #4]
  1500. 862 0016 8361 str r3, [r0, #24]
  1501. 527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */
  1502. 528:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = GPIOx->LCKR;
  1503. 863 .loc 1 528 3 is_stmt 1 view .LVU244
  1504. 864 .loc 1 528 14 is_stmt 0 view .LVU245
  1505. 865 0018 8369 ldr r3, [r0, #24]
  1506. 866 .loc 1 528 7 view .LVU246
  1507. 867 001a 0193 str r3, [sp, #4]
  1508. 529:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1509. ARM GAS /tmp/ccoCvX6R.s page 27
  1510. 530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* read again in order to confirm lock is active */
  1511. 531:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((uint32_t)(GPIOx->LCKR & GPIO_LCKR_LCKK))
  1512. 868 .loc 1 531 3 is_stmt 1 view .LVU247
  1513. 869 .loc 1 531 23 is_stmt 0 view .LVU248
  1514. 870 001c 8369 ldr r3, [r0, #24]
  1515. 871 .loc 1 531 6 view .LVU249
  1516. 872 001e 13F4803F tst r3, #65536
  1517. 873 0022 02D0 beq .L78
  1518. 532:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1519. 533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return HAL_OK;
  1520. 874 .loc 1 533 12 view .LVU250
  1521. 875 0024 0020 movs r0, #0
  1522. 876 .LVL75:
  1523. 877 .L77:
  1524. 534:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1525. 535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
  1526. 536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1527. 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return HAL_ERROR;
  1528. 538:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1529. 539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1530. 878 .loc 1 539 1 view .LVU251
  1531. 879 0026 02B0 add sp, sp, #8
  1532. 880 .LCFI8:
  1533. 881 .cfi_remember_state
  1534. 882 .cfi_def_cfa_offset 0
  1535. 883 @ sp needed
  1536. 884 0028 7047 bx lr
  1537. 885 .LVL76:
  1538. 886 .L78:
  1539. 887 .LCFI9:
  1540. 888 .cfi_restore_state
  1541. 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1542. 889 .loc 1 537 12 view .LVU252
  1543. 890 002a 0120 movs r0, #1
  1544. 891 .LVL77:
  1545. 537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1546. 892 .loc 1 537 12 view .LVU253
  1547. 893 002c FBE7 b .L77
  1548. 894 .cfi_endproc
  1549. 895 .LFE70:
  1550. 897 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits
  1551. 898 .align 1
  1552. 899 .weak HAL_GPIO_EXTI_Callback
  1553. 900 .syntax unified
  1554. 901 .thumb
  1555. 902 .thumb_func
  1556. 904 HAL_GPIO_EXTI_Callback:
  1557. 905 .LVL78:
  1558. 906 .LFB72:
  1559. 540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1560. 541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1561. 542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief This function handles EXTI interrupt request.
  1562. 543:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected EXTI line
  1563. 544:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  1564. 545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1565. 546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
  1566. 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1567. ARM GAS /tmp/ccoCvX6R.s page 28
  1568. 548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
  1569. 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u)
  1570. 550:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1571. 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
  1572. 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin);
  1573. 553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1574. 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1575. 555:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1576. 556:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
  1577. 557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief EXTI line detection callbacks.
  1578. 558:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected EXTI line
  1579. 559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
  1580. 560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1581. 561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
  1582. 562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1583. 907 .loc 1 562 1 is_stmt 1 view -0
  1584. 908 .cfi_startproc
  1585. 909 @ args = 0, pretend = 0, frame = 0
  1586. 910 @ frame_needed = 0, uses_anonymous_args = 0
  1587. 911 @ link register save eliminated.
  1588. 563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */
  1589. 564:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** UNUSED(GPIO_Pin);
  1590. 912 .loc 1 564 3 view .LVU255
  1591. 565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* NOTE: This function Should not be modified, when the callback is needed,
  1592. 566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file
  1593. 567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
  1594. 568:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1595. 913 .loc 1 568 1 is_stmt 0 view .LVU256
  1596. 914 0000 7047 bx lr
  1597. 915 .cfi_endproc
  1598. 916 .LFE72:
  1599. 918 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits
  1600. 919 .align 1
  1601. 920 .global HAL_GPIO_EXTI_IRQHandler
  1602. 921 .syntax unified
  1603. 922 .thumb
  1604. 923 .thumb_func
  1605. 925 HAL_GPIO_EXTI_IRQHandler:
  1606. 926 .LVL79:
  1607. 927 .LFB71:
  1608. 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
  1609. 928 .loc 1 547 1 is_stmt 1 view -0
  1610. 929 .cfi_startproc
  1611. 930 @ args = 0, pretend = 0, frame = 0
  1612. 931 @ frame_needed = 0, uses_anonymous_args = 0
  1613. 547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
  1614. 932 .loc 1 547 1 is_stmt 0 view .LVU258
  1615. 933 0000 08B5 push {r3, lr}
  1616. 934 .LCFI10:
  1617. 935 .cfi_def_cfa_offset 8
  1618. 936 .cfi_offset 3, -8
  1619. 937 .cfi_offset 14, -4
  1620. 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1621. 938 .loc 1 549 3 is_stmt 1 view .LVU259
  1622. 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1623. 939 .loc 1 549 7 is_stmt 0 view .LVU260
  1624. 940 0002 054B ldr r3, .L85
  1625. ARM GAS /tmp/ccoCvX6R.s page 29
  1626. 941 0004 5B69 ldr r3, [r3, #20]
  1627. 549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
  1628. 942 .loc 1 549 6 view .LVU261
  1629. 943 0006 0342 tst r3, r0
  1630. 944 0008 00D1 bne .L84
  1631. 945 .LVL80:
  1632. 946 .L81:
  1633. 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1634. 947 .loc 1 554 1 view .LVU262
  1635. 948 000a 08BD pop {r3, pc}
  1636. 949 .LVL81:
  1637. 950 .L84:
  1638. 551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin);
  1639. 951 .loc 1 551 5 is_stmt 1 view .LVU263
  1640. 952 000c 024B ldr r3, .L85
  1641. 953 000e 5861 str r0, [r3, #20]
  1642. 552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
  1643. 954 .loc 1 552 5 view .LVU264
  1644. 955 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback
  1645. 956 .LVL82:
  1646. 554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
  1647. 957 .loc 1 554 1 is_stmt 0 view .LVU265
  1648. 958 0014 F9E7 b .L81
  1649. 959 .L86:
  1650. 960 0016 00BF .align 2
  1651. 961 .L85:
  1652. 962 0018 00040140 .word 1073808384
  1653. 963 .cfi_endproc
  1654. 964 .LFE71:
  1655. 966 .text
  1656. 967 .Letext0:
  1657. 968 .file 2 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
  1658. 969 .file 3 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
  1659. 970 .file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
  1660. 971 .file 5 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
  1661. 972 .file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
  1662. ARM GAS /tmp/ccoCvX6R.s page 30
  1663. DEFINED SYMBOLS
  1664. *ABS*:0000000000000000 stm32f1xx_hal_gpio.c
  1665. /tmp/ccoCvX6R.s:18 .text.HAL_GPIO_Init:0000000000000000 $t
  1666. /tmp/ccoCvX6R.s:24 .text.HAL_GPIO_Init:0000000000000000 HAL_GPIO_Init
  1667. /tmp/ccoCvX6R.s:377 .text.HAL_GPIO_Init:0000000000000184 $d
  1668. /tmp/ccoCvX6R.s:397 .text.HAL_GPIO_Init:00000000000001d0 $t
  1669. /tmp/ccoCvX6R.s:455 .text.HAL_GPIO_Init:000000000000020c $d
  1670. /tmp/ccoCvX6R.s:465 .text.HAL_GPIO_DeInit:0000000000000000 $t
  1671. /tmp/ccoCvX6R.s:471 .text.HAL_GPIO_DeInit:0000000000000000 HAL_GPIO_DeInit
  1672. /tmp/ccoCvX6R.s:706 .text.HAL_GPIO_DeInit:00000000000000f4 $d
  1673. /tmp/ccoCvX6R.s:713 .text.HAL_GPIO_ReadPin:0000000000000000 $t
  1674. /tmp/ccoCvX6R.s:719 .text.HAL_GPIO_ReadPin:0000000000000000 HAL_GPIO_ReadPin
  1675. /tmp/ccoCvX6R.s:752 .text.HAL_GPIO_WritePin:0000000000000000 $t
  1676. /tmp/ccoCvX6R.s:758 .text.HAL_GPIO_WritePin:0000000000000000 HAL_GPIO_WritePin
  1677. /tmp/ccoCvX6R.s:788 .text.HAL_GPIO_TogglePin:0000000000000000 $t
  1678. /tmp/ccoCvX6R.s:794 .text.HAL_GPIO_TogglePin:0000000000000000 HAL_GPIO_TogglePin
  1679. /tmp/ccoCvX6R.s:824 .text.HAL_GPIO_LockPin:0000000000000000 $t
  1680. /tmp/ccoCvX6R.s:830 .text.HAL_GPIO_LockPin:0000000000000000 HAL_GPIO_LockPin
  1681. /tmp/ccoCvX6R.s:898 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t
  1682. /tmp/ccoCvX6R.s:904 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback
  1683. /tmp/ccoCvX6R.s:919 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 $t
  1684. /tmp/ccoCvX6R.s:925 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 HAL_GPIO_EXTI_IRQHandler
  1685. /tmp/ccoCvX6R.s:962 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000018 $d
  1686. NO UNDEFINED SYMBOLS