STM32_RFDA4005/build/stm32f1xx_it.lst

ARM GAS  /tmp/ccXQSgQH.s 			page 1


   1              		.cpu cortex-m3
   2              		.arch armv7-m
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 1
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.file	"stm32f1xx_it.c"
  14              		.text
  15              	.Ltext0:
  16              		.cfi_sections	.debug_frame
  17              		.section	.text.NMI_Handler,"ax",%progbits
  18              		.align	1
  19              		.global	NMI_Handler
  20              		.syntax unified
  21              		.thumb
  22              		.thumb_func
  24              	NMI_Handler:
  25              	.LFB652:
  26              		.file 1 "Core/Src/stm32f1xx_it.c"
   1:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32f1xx_it.c **** /**
   3:Core/Src/stm32f1xx_it.c ****   ******************************************************************************
   4:Core/Src/stm32f1xx_it.c ****   * @file    stm32f1xx_it.c
   5:Core/Src/stm32f1xx_it.c ****   * @brief   Interrupt Service Routines.
   6:Core/Src/stm32f1xx_it.c ****   ******************************************************************************
   7:Core/Src/stm32f1xx_it.c ****   * @attention
   8:Core/Src/stm32f1xx_it.c ****   *
   9:Core/Src/stm32f1xx_it.c ****   * Copyright (c) 2024 STMicroelectronics.
  10:Core/Src/stm32f1xx_it.c ****   * All rights reserved.
  11:Core/Src/stm32f1xx_it.c ****   *
  12:Core/Src/stm32f1xx_it.c ****   * This software is licensed under terms that can be found in the LICENSE file
  13:Core/Src/stm32f1xx_it.c ****   * in the root directory of this software component.
  14:Core/Src/stm32f1xx_it.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Core/Src/stm32f1xx_it.c ****   *
  16:Core/Src/stm32f1xx_it.c ****   ******************************************************************************
  17:Core/Src/stm32f1xx_it.c ****   */
  18:Core/Src/stm32f1xx_it.c **** /* USER CODE END Header */
  19:Core/Src/stm32f1xx_it.c **** 
  20:Core/Src/stm32f1xx_it.c **** /* Includes ------------------------------------------------------------------*/
  21:Core/Src/stm32f1xx_it.c **** #include "main.h"
  22:Core/Src/stm32f1xx_it.c **** #include "stm32f1xx_it.h"
  23:Core/Src/stm32f1xx_it.c **** /* Private includes ----------------------------------------------------------*/
  24:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN Includes */
  25:Core/Src/stm32f1xx_it.c **** /* USER CODE END Includes */
  26:Core/Src/stm32f1xx_it.c **** 
  27:Core/Src/stm32f1xx_it.c **** /* Private typedef -----------------------------------------------------------*/
  28:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN TD */
  29:Core/Src/stm32f1xx_it.c **** 
  30:Core/Src/stm32f1xx_it.c **** /* USER CODE END TD */
  31:Core/Src/stm32f1xx_it.c **** 
  32:Core/Src/stm32f1xx_it.c **** /* Private define ------------------------------------------------------------*/
ARM GAS  /tmp/ccXQSgQH.s 			page 2


  33:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN PD */
  34:Core/Src/stm32f1xx_it.c **** 
  35:Core/Src/stm32f1xx_it.c **** /* USER CODE END PD */
  36:Core/Src/stm32f1xx_it.c **** 
  37:Core/Src/stm32f1xx_it.c **** /* Private macro -------------------------------------------------------------*/
  38:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN PM */
  39:Core/Src/stm32f1xx_it.c **** 
  40:Core/Src/stm32f1xx_it.c **** /* USER CODE END PM */
  41:Core/Src/stm32f1xx_it.c **** 
  42:Core/Src/stm32f1xx_it.c **** /* Private variables ---------------------------------------------------------*/
  43:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN PV */
  44:Core/Src/stm32f1xx_it.c **** 
  45:Core/Src/stm32f1xx_it.c **** /* USER CODE END PV */
  46:Core/Src/stm32f1xx_it.c **** 
  47:Core/Src/stm32f1xx_it.c **** /* Private function prototypes -----------------------------------------------*/
  48:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN PFP */
  49:Core/Src/stm32f1xx_it.c **** 
  50:Core/Src/stm32f1xx_it.c **** /* USER CODE END PFP */
  51:Core/Src/stm32f1xx_it.c **** 
  52:Core/Src/stm32f1xx_it.c **** /* Private user code ---------------------------------------------------------*/
  53:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN 0 */
  54:Core/Src/stm32f1xx_it.c **** 
  55:Core/Src/stm32f1xx_it.c **** /* USER CODE END 0 */
  56:Core/Src/stm32f1xx_it.c **** 
  57:Core/Src/stm32f1xx_it.c **** /* External variables --------------------------------------------------------*/
  58:Core/Src/stm32f1xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_FS;
  59:Core/Src/stm32f1xx_it.c **** /* USER CODE BEGIN EV */
  60:Core/Src/stm32f1xx_it.c **** 
  61:Core/Src/stm32f1xx_it.c **** /* USER CODE END EV */
  62:Core/Src/stm32f1xx_it.c **** 
  63:Core/Src/stm32f1xx_it.c **** /******************************************************************************/
  64:Core/Src/stm32f1xx_it.c **** /*           Cortex-M3 Processor Interruption and Exception Handlers          */
  65:Core/Src/stm32f1xx_it.c **** /******************************************************************************/
  66:Core/Src/stm32f1xx_it.c **** /**
  67:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Non maskable interrupt.
  68:Core/Src/stm32f1xx_it.c ****   */
  69:Core/Src/stm32f1xx_it.c **** void NMI_Handler(void)
  70:Core/Src/stm32f1xx_it.c **** {
  27              		.loc 1 70 1 view -0
  28              		.cfi_startproc
  29              		@ Volatile: function does not return.
  30              		@ args = 0, pretend = 0, frame = 0
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32              		@ link register save eliminated.
  33              	.L2:
  71:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  72:Core/Src/stm32f1xx_it.c **** 
  73:Core/Src/stm32f1xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
  74:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  75:Core/Src/stm32f1xx_it.c ****   while (1)
  34              		.loc 1 75 3 discriminator 1 view .LVU1
  76:Core/Src/stm32f1xx_it.c ****   {
  77:Core/Src/stm32f1xx_it.c ****   }
  35              		.loc 1 77 3 discriminator 1 view .LVU2
  75:Core/Src/stm32f1xx_it.c ****   {
  36              		.loc 1 75 9 discriminator 1 view .LVU3
  37 0000 FEE7     		b	.L2
ARM GAS  /tmp/ccXQSgQH.s 			page 3


  38              		.cfi_endproc
  39              	.LFE652:
  41              		.section	.text.HardFault_Handler,"ax",%progbits
  42              		.align	1
  43              		.global	HardFault_Handler
  44              		.syntax unified
  45              		.thumb
  46              		.thumb_func
  48              	HardFault_Handler:
  49              	.LFB653:
  78:Core/Src/stm32f1xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
  79:Core/Src/stm32f1xx_it.c **** }
  80:Core/Src/stm32f1xx_it.c **** 
  81:Core/Src/stm32f1xx_it.c **** /**
  82:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Hard fault interrupt.
  83:Core/Src/stm32f1xx_it.c ****   */
  84:Core/Src/stm32f1xx_it.c **** void HardFault_Handler(void)
  85:Core/Src/stm32f1xx_it.c **** {
  50              		.loc 1 85 1 view -0
  51              		.cfi_startproc
  52              		@ Volatile: function does not return.
  53              		@ args = 0, pretend = 0, frame = 0
  54              		@ frame_needed = 0, uses_anonymous_args = 0
  55              		@ link register save eliminated.
  56              	.L4:
  86:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
  87:Core/Src/stm32f1xx_it.c **** 
  88:Core/Src/stm32f1xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
  89:Core/Src/stm32f1xx_it.c ****   while (1)
  57              		.loc 1 89 3 discriminator 1 view .LVU5
  90:Core/Src/stm32f1xx_it.c ****   {
  91:Core/Src/stm32f1xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  92:Core/Src/stm32f1xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
  93:Core/Src/stm32f1xx_it.c ****   }
  58              		.loc 1 93 3 discriminator 1 view .LVU6
  89:Core/Src/stm32f1xx_it.c ****   {
  59              		.loc 1 89 9 discriminator 1 view .LVU7
  60 0000 FEE7     		b	.L4
  61              		.cfi_endproc
  62              	.LFE653:
  64              		.section	.text.MemManage_Handler,"ax",%progbits
  65              		.align	1
  66              		.global	MemManage_Handler
  67              		.syntax unified
  68              		.thumb
  69              		.thumb_func
  71              	MemManage_Handler:
  72              	.LFB654:
  94:Core/Src/stm32f1xx_it.c **** }
  95:Core/Src/stm32f1xx_it.c **** 
  96:Core/Src/stm32f1xx_it.c **** /**
  97:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Memory management fault.
  98:Core/Src/stm32f1xx_it.c ****   */
  99:Core/Src/stm32f1xx_it.c **** void MemManage_Handler(void)
 100:Core/Src/stm32f1xx_it.c **** {
  73              		.loc 1 100 1 view -0
  74              		.cfi_startproc
ARM GAS  /tmp/ccXQSgQH.s 			page 4


  75              		@ Volatile: function does not return.
  76              		@ args = 0, pretend = 0, frame = 0
  77              		@ frame_needed = 0, uses_anonymous_args = 0
  78              		@ link register save eliminated.
  79              	.L6:
 101:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 102:Core/Src/stm32f1xx_it.c **** 
 103:Core/Src/stm32f1xx_it.c ****   /* USER CODE END MemoryManagement_IRQn 0 */
 104:Core/Src/stm32f1xx_it.c ****   while (1)
  80              		.loc 1 104 3 discriminator 1 view .LVU9
 105:Core/Src/stm32f1xx_it.c ****   {
 106:Core/Src/stm32f1xx_it.c ****     /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
 107:Core/Src/stm32f1xx_it.c ****     /* USER CODE END W1_MemoryManagement_IRQn 0 */
 108:Core/Src/stm32f1xx_it.c ****   }
  81              		.loc 1 108 3 discriminator 1 view .LVU10
 104:Core/Src/stm32f1xx_it.c ****   {
  82              		.loc 1 104 9 discriminator 1 view .LVU11
  83 0000 FEE7     		b	.L6
  84              		.cfi_endproc
  85              	.LFE654:
  87              		.section	.text.BusFault_Handler,"ax",%progbits
  88              		.align	1
  89              		.global	BusFault_Handler
  90              		.syntax unified
  91              		.thumb
  92              		.thumb_func
  94              	BusFault_Handler:
  95              	.LFB655:
 109:Core/Src/stm32f1xx_it.c **** }
 110:Core/Src/stm32f1xx_it.c **** 
 111:Core/Src/stm32f1xx_it.c **** /**
 112:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Prefetch fault, memory access fault.
 113:Core/Src/stm32f1xx_it.c ****   */
 114:Core/Src/stm32f1xx_it.c **** void BusFault_Handler(void)
 115:Core/Src/stm32f1xx_it.c **** {
  96              		.loc 1 115 1 view -0
  97              		.cfi_startproc
  98              		@ Volatile: function does not return.
  99              		@ args = 0, pretend = 0, frame = 0
 100              		@ frame_needed = 0, uses_anonymous_args = 0
 101              		@ link register save eliminated.
 102              	.L8:
 116:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN BusFault_IRQn 0 */
 117:Core/Src/stm32f1xx_it.c **** 
 118:Core/Src/stm32f1xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
 119:Core/Src/stm32f1xx_it.c ****   while (1)
 103              		.loc 1 119 3 discriminator 1 view .LVU13
 120:Core/Src/stm32f1xx_it.c ****   {
 121:Core/Src/stm32f1xx_it.c ****     /* USER CODE BEGIN W1_BusFault_IRQn 0 */
 122:Core/Src/stm32f1xx_it.c ****     /* USER CODE END W1_BusFault_IRQn 0 */
 123:Core/Src/stm32f1xx_it.c ****   }
 104              		.loc 1 123 3 discriminator 1 view .LVU14
 119:Core/Src/stm32f1xx_it.c ****   {
 105              		.loc 1 119 9 discriminator 1 view .LVU15
 106 0000 FEE7     		b	.L8
 107              		.cfi_endproc
 108              	.LFE655:
ARM GAS  /tmp/ccXQSgQH.s 			page 5


 110              		.section	.text.UsageFault_Handler,"ax",%progbits
 111              		.align	1
 112              		.global	UsageFault_Handler
 113              		.syntax unified
 114              		.thumb
 115              		.thumb_func
 117              	UsageFault_Handler:
 118              	.LFB656:
 124:Core/Src/stm32f1xx_it.c **** }
 125:Core/Src/stm32f1xx_it.c **** 
 126:Core/Src/stm32f1xx_it.c **** /**
 127:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Undefined instruction or illegal state.
 128:Core/Src/stm32f1xx_it.c ****   */
 129:Core/Src/stm32f1xx_it.c **** void UsageFault_Handler(void)
 130:Core/Src/stm32f1xx_it.c **** {
 119              		.loc 1 130 1 view -0
 120              		.cfi_startproc
 121              		@ Volatile: function does not return.
 122              		@ args = 0, pretend = 0, frame = 0
 123              		@ frame_needed = 0, uses_anonymous_args = 0
 124              		@ link register save eliminated.
 125              	.L10:
 131:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN UsageFault_IRQn 0 */
 132:Core/Src/stm32f1xx_it.c **** 
 133:Core/Src/stm32f1xx_it.c ****   /* USER CODE END UsageFault_IRQn 0 */
 134:Core/Src/stm32f1xx_it.c ****   while (1)
 126              		.loc 1 134 3 discriminator 1 view .LVU17
 135:Core/Src/stm32f1xx_it.c ****   {
 136:Core/Src/stm32f1xx_it.c ****     /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
 137:Core/Src/stm32f1xx_it.c ****     /* USER CODE END W1_UsageFault_IRQn 0 */
 138:Core/Src/stm32f1xx_it.c ****   }
 127              		.loc 1 138 3 discriminator 1 view .LVU18
 134:Core/Src/stm32f1xx_it.c ****   {
 128              		.loc 1 134 9 discriminator 1 view .LVU19
 129 0000 FEE7     		b	.L10
 130              		.cfi_endproc
 131              	.LFE656:
 133              		.section	.text.SVC_Handler,"ax",%progbits
 134              		.align	1
 135              		.global	SVC_Handler
 136              		.syntax unified
 137              		.thumb
 138              		.thumb_func
 140              	SVC_Handler:
 141              	.LFB657:
 139:Core/Src/stm32f1xx_it.c **** }
 140:Core/Src/stm32f1xx_it.c **** 
 141:Core/Src/stm32f1xx_it.c **** /**
 142:Core/Src/stm32f1xx_it.c ****   * @brief This function handles System service call via SWI instruction.
 143:Core/Src/stm32f1xx_it.c ****   */
 144:Core/Src/stm32f1xx_it.c **** void SVC_Handler(void)
 145:Core/Src/stm32f1xx_it.c **** {
 142              		.loc 1 145 1 view -0
 143              		.cfi_startproc
 144              		@ args = 0, pretend = 0, frame = 0
 145              		@ frame_needed = 0, uses_anonymous_args = 0
 146              		@ link register save eliminated.
ARM GAS  /tmp/ccXQSgQH.s 			page 6


 146:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 0 */
 147:Core/Src/stm32f1xx_it.c **** 
 148:Core/Src/stm32f1xx_it.c ****   /* USER CODE END SVCall_IRQn 0 */
 149:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 1 */
 150:Core/Src/stm32f1xx_it.c **** 
 151:Core/Src/stm32f1xx_it.c ****   /* USER CODE END SVCall_IRQn 1 */
 152:Core/Src/stm32f1xx_it.c **** }
 147              		.loc 1 152 1 view .LVU21
 148 0000 7047     		bx	lr
 149              		.cfi_endproc
 150              	.LFE657:
 152              		.section	.text.DebugMon_Handler,"ax",%progbits
 153              		.align	1
 154              		.global	DebugMon_Handler
 155              		.syntax unified
 156              		.thumb
 157              		.thumb_func
 159              	DebugMon_Handler:
 160              	.LFB658:
 153:Core/Src/stm32f1xx_it.c **** 
 154:Core/Src/stm32f1xx_it.c **** /**
 155:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Debug monitor.
 156:Core/Src/stm32f1xx_it.c ****   */
 157:Core/Src/stm32f1xx_it.c **** void DebugMon_Handler(void)
 158:Core/Src/stm32f1xx_it.c **** {
 161              		.loc 1 158 1 view -0
 162              		.cfi_startproc
 163              		@ args = 0, pretend = 0, frame = 0
 164              		@ frame_needed = 0, uses_anonymous_args = 0
 165              		@ link register save eliminated.
 159:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
 160:Core/Src/stm32f1xx_it.c **** 
 161:Core/Src/stm32f1xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 0 */
 162:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 163:Core/Src/stm32f1xx_it.c **** 
 164:Core/Src/stm32f1xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 1 */
 165:Core/Src/stm32f1xx_it.c **** }
 166              		.loc 1 165 1 view .LVU23
 167 0000 7047     		bx	lr
 168              		.cfi_endproc
 169              	.LFE658:
 171              		.section	.text.PendSV_Handler,"ax",%progbits
 172              		.align	1
 173              		.global	PendSV_Handler
 174              		.syntax unified
 175              		.thumb
 176              		.thumb_func
 178              	PendSV_Handler:
 179              	.LFB659:
 166:Core/Src/stm32f1xx_it.c **** 
 167:Core/Src/stm32f1xx_it.c **** /**
 168:Core/Src/stm32f1xx_it.c ****   * @brief This function handles Pendable request for system service.
 169:Core/Src/stm32f1xx_it.c ****   */
 170:Core/Src/stm32f1xx_it.c **** void PendSV_Handler(void)
 171:Core/Src/stm32f1xx_it.c **** {
 180              		.loc 1 171 1 view -0
 181              		.cfi_startproc
ARM GAS  /tmp/ccXQSgQH.s 			page 7


 182              		@ args = 0, pretend = 0, frame = 0
 183              		@ frame_needed = 0, uses_anonymous_args = 0
 184              		@ link register save eliminated.
 172:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
 173:Core/Src/stm32f1xx_it.c **** 
 174:Core/Src/stm32f1xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
 175:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
 176:Core/Src/stm32f1xx_it.c **** 
 177:Core/Src/stm32f1xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
 178:Core/Src/stm32f1xx_it.c **** }
 185              		.loc 1 178 1 view .LVU25
 186 0000 7047     		bx	lr
 187              		.cfi_endproc
 188              	.LFE659:
 190              		.section	.text.SysTick_Handler,"ax",%progbits
 191              		.align	1
 192              		.global	SysTick_Handler
 193              		.syntax unified
 194              		.thumb
 195              		.thumb_func
 197              	SysTick_Handler:
 198              	.LFB660:
 179:Core/Src/stm32f1xx_it.c **** 
 180:Core/Src/stm32f1xx_it.c **** /**
 181:Core/Src/stm32f1xx_it.c ****   * @brief This function handles System tick timer.
 182:Core/Src/stm32f1xx_it.c ****   */
 183:Core/Src/stm32f1xx_it.c **** void SysTick_Handler(void)
 184:Core/Src/stm32f1xx_it.c **** {
 199              		.loc 1 184 1 view -0
 200              		.cfi_startproc
 201              		@ args = 0, pretend = 0, frame = 0
 202              		@ frame_needed = 0, uses_anonymous_args = 0
 203 0000 08B5     		push	{r3, lr}
 204              	.LCFI0:
 205              		.cfi_def_cfa_offset 8
 206              		.cfi_offset 3, -8
 207              		.cfi_offset 14, -4
 185:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
 186:Core/Src/stm32f1xx_it.c **** 
 187:Core/Src/stm32f1xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
 188:Core/Src/stm32f1xx_it.c ****   HAL_IncTick();
 208              		.loc 1 188 3 view .LVU27
 209 0002 FFF7FEFF 		bl	HAL_IncTick
 210              	.LVL0:
 189:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
 190:Core/Src/stm32f1xx_it.c **** 
 191:Core/Src/stm32f1xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
 192:Core/Src/stm32f1xx_it.c **** }
 211              		.loc 1 192 1 is_stmt 0 view .LVU28
 212 0006 08BD     		pop	{r3, pc}
 213              		.cfi_endproc
 214              	.LFE660:
 216              		.section	.text.USB_LP_CAN1_RX0_IRQHandler,"ax",%progbits
 217              		.align	1
 218              		.global	USB_LP_CAN1_RX0_IRQHandler
 219              		.syntax unified
 220              		.thumb
ARM GAS  /tmp/ccXQSgQH.s 			page 8


 221              		.thumb_func
 223              	USB_LP_CAN1_RX0_IRQHandler:
 224              	.LFB661:
 193:Core/Src/stm32f1xx_it.c **** 
 194:Core/Src/stm32f1xx_it.c **** /******************************************************************************/
 195:Core/Src/stm32f1xx_it.c **** /* STM32F1xx Peripheral Interrupt Handlers                                    */
 196:Core/Src/stm32f1xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals.                  */
 197:Core/Src/stm32f1xx_it.c **** /* For the available peripheral interrupt handler names,                      */
 198:Core/Src/stm32f1xx_it.c **** /* please refer to the startup file (startup_stm32f1xx.s).                    */
 199:Core/Src/stm32f1xx_it.c **** /******************************************************************************/
 200:Core/Src/stm32f1xx_it.c **** 
 201:Core/Src/stm32f1xx_it.c **** /**
 202:Core/Src/stm32f1xx_it.c ****   * @brief This function handles DMA1 channel5 global interrupt.
 203:Core/Src/stm32f1xx_it.c ****   */
 204:Core/Src/stm32f1xx_it.c **** 
 205:Core/Src/stm32f1xx_it.c **** /**
 206:Core/Src/stm32f1xx_it.c ****   * @brief This function handles USB low priority or CAN RX0 interrupts.
 207:Core/Src/stm32f1xx_it.c ****   */
 208:Core/Src/stm32f1xx_it.c **** void USB_LP_CAN1_RX0_IRQHandler(void)
 209:Core/Src/stm32f1xx_it.c **** {
 225              		.loc 1 209 1 is_stmt 1 view -0
 226              		.cfi_startproc
 227              		@ args = 0, pretend = 0, frame = 0
 228              		@ frame_needed = 0, uses_anonymous_args = 0
 229 0000 08B5     		push	{r3, lr}
 230              	.LCFI1:
 231              		.cfi_def_cfa_offset 8
 232              		.cfi_offset 3, -8
 233              		.cfi_offset 14, -4
 210:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
 211:Core/Src/stm32f1xx_it.c **** 
 212:Core/Src/stm32f1xx_it.c ****   /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
 213:Core/Src/stm32f1xx_it.c ****   HAL_PCD_IRQHandler(&hpcd_USB_FS);
 234              		.loc 1 213 3 view .LVU30
 235 0002 0248     		ldr	r0, .L18
 236 0004 FFF7FEFF 		bl	HAL_PCD_IRQHandler
 237              	.LVL1:
 214:Core/Src/stm32f1xx_it.c ****   /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
 215:Core/Src/stm32f1xx_it.c **** 
 216:Core/Src/stm32f1xx_it.c ****   /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
 217:Core/Src/stm32f1xx_it.c **** }
 238              		.loc 1 217 1 is_stmt 0 view .LVU31
 239 0008 08BD     		pop	{r3, pc}
 240              	.L19:
 241 000a 00BF     		.align	2
 242              	.L18:
 243 000c 00000000 		.word	hpcd_USB_FS
 244              		.cfi_endproc
 245              	.LFE661:
 247              		.text
 248              	.Letext0:
 249              		.file 2 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
 250              		.file 3 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
 251              		.file 4 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
 252              		.file 5 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
 253              		.file 6 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usb.h"
 254              		.file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h"
ARM GAS  /tmp/ccXQSgQH.s 			page 9


 255              		.file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h"
 256              		.file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h"
 257              		.file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS  /tmp/ccXQSgQH.s 			page 10


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32f1xx_it.c
     /tmp/ccXQSgQH.s:18     .text.NMI_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:24     .text.NMI_Handler:0000000000000000 NMI_Handler
     /tmp/ccXQSgQH.s:42     .text.HardFault_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:48     .text.HardFault_Handler:0000000000000000 HardFault_Handler
     /tmp/ccXQSgQH.s:65     .text.MemManage_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:71     .text.MemManage_Handler:0000000000000000 MemManage_Handler
     /tmp/ccXQSgQH.s:88     .text.BusFault_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:94     .text.BusFault_Handler:0000000000000000 BusFault_Handler
     /tmp/ccXQSgQH.s:111    .text.UsageFault_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:117    .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
     /tmp/ccXQSgQH.s:134    .text.SVC_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:140    .text.SVC_Handler:0000000000000000 SVC_Handler
     /tmp/ccXQSgQH.s:153    .text.DebugMon_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:159    .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
     /tmp/ccXQSgQH.s:172    .text.PendSV_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:178    .text.PendSV_Handler:0000000000000000 PendSV_Handler
     /tmp/ccXQSgQH.s:191    .text.SysTick_Handler:0000000000000000 $t
     /tmp/ccXQSgQH.s:197    .text.SysTick_Handler:0000000000000000 SysTick_Handler
     /tmp/ccXQSgQH.s:217    .text.USB_LP_CAN1_RX0_IRQHandler:0000000000000000 $t
     /tmp/ccXQSgQH.s:223    .text.USB_LP_CAN1_RX0_IRQHandler:0000000000000000 USB_LP_CAN1_RX0_IRQHandler
     /tmp/ccXQSgQH.s:243    .text.USB_LP_CAN1_RX0_IRQHandler:000000000000000c $d

UNDEFINED SYMBOLS
HAL_IncTick
HAL_PCD_IRQHandler
hpcd_USB_FS