STM32_RFDA4005/build/stm32f1xx_ll_rcc.lst

ARM GAS  /tmp/cc2ZcXc2.s 			page 1


   1              		.cpu cortex-m3
   2              		.arch armv7-m
   3              		.fpu softvfp
   4              		.eabi_attribute 20, 1
   5              		.eabi_attribute 21, 1
   6              		.eabi_attribute 23, 3
   7              		.eabi_attribute 24, 1
   8              		.eabi_attribute 25, 1
   9              		.eabi_attribute 26, 1
  10              		.eabi_attribute 30, 1
  11              		.eabi_attribute 34, 1
  12              		.eabi_attribute 18, 4
  13              		.file	"stm32f1xx_ll_rcc.c"
  14              		.text
  15              	.Ltext0:
  16              		.cfi_sections	.debug_frame
  17              		.section	.text.LL_RCC_DeInit,"ax",%progbits
  18              		.align	1
  19              		.global	LL_RCC_DeInit
  20              		.syntax unified
  21              		.thumb
  22              		.thumb_func
  24              	LL_RCC_DeInit:
  25              	.LFB147:
  26              		.file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c"
   1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
   2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   ******************************************************************************
   3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @file    stm32f1xx_ll_rcc.c
   4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @author  MCD Application Team
   5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief   RCC LL module driver.
   6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   ******************************************************************************
   7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @attention
   8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *
   9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * Copyright (c) 2016 STMicroelectronics.
  10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * All rights reserved.
  11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *
  12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * This software is licensed under terms that can be found in the LICENSE file in
  13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * the root directory of this software component.
  14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   ******************************************************************************
  16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(USE_FULL_LL_DRIVER)
  19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Includes ------------------------------------------------------------------*/
  21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #include "stm32f1xx_ll_rcc.h"
  22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #ifdef  USE_FULL_ASSERT
  23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #include "stm32_assert.h"
  24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #else
  25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #define assert_param(expr) ((void)0U)
  26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* USE_FULL_ASSERT */
  27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup STM32F1xx_LL_Driver
  28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC)
  32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 2


  33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @defgroup RCC_LL RCC
  34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Private types -------------------------------------------------------------*/
  38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Private variables ---------------------------------------------------------*/
  39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Private constants ---------------------------------------------------------*/
  40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Private macros ------------------------------------------------------------*/
  41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup RCC_LL_Private_Macros
  42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_PLLI2S_SUPPORT)
  45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__)     (((__VALUE__) == LL_RCC_I2S2_CLKSOURCE) \
  46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****                                              || ((__VALUE__) == LL_RCC_I2S3_CLKSOURCE))
  47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_PLLI2S_SUPPORT */
  48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(USB) || defined(USB_OTG_FS)
  50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #define IS_LL_RCC_USB_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_USB_CLKSOURCE))
  51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* USB */
  52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #define IS_LL_RCC_ADC_CLKSOURCE(__VALUE__)    (((__VALUE__) == LL_RCC_ADC_CLKSOURCE))
  54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
  55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @}
  56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Private function prototypes -----------------------------------------------*/
  59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @defgroup RCC_LL_Private_Functions RCC Private functions
  60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetSystemClockFreq(void);
  63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency);
  64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency);
  65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency);
  66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_PLL_GetFreqDomain_SYS(void);
  67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_PLLI2S_SUPPORT)
  68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_PLLI2S_GetFreqDomain_I2S(void);
  69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_PLLI2S_SUPPORT */
  70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_PLL2_SUPPORT)
  71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_PLL2_GetFreqClockFreq(void);
  72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_PLL2_SUPPORT */
  73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
  74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @}
  75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /* Exported functions --------------------------------------------------------*/
  78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup RCC_LL_Exported_Functions
  79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup RCC_LL_EF_Init
  83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
  84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
  85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
  86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
  87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Reset the RCC clock configuration to the default reset state.
  88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   The default reset state of the clock configuration is given below:
  89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - HSI ON and used as system clock source
ARM GAS  /tmp/cc2ZcXc2.s 			page 3


  90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - HSE PLL, PLL2 & PLL3 are OFF
  91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - AHB, APB1 and APB2 prescaler set to 1.
  92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - CSS, MCO OFF
  93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - All interrupts disabled
  94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   This function doesn't modify the configuration of the
  95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - Peripheral clocks
  96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - LSI, LSE and RTC clocks
  97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval An ErrorStatus enumeration value:
  98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - SUCCESS: RCC registers are de-initialized
  99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         - ERROR: not applicable
 100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** ErrorStatus LL_RCC_DeInit(void)
 102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
  27              		.loc 1 102 1 view -0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
 103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Set HSION bit */
 104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_HSI_Enable();
  32              		.loc 1 104 3 view .LVU1
  33              	.LBB42:
  34              	.LBI42:
  35              		.file 2 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h"
   1:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
   2:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   ******************************************************************************
   3:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @file    stm32f1xx_ll_rcc.h
   4:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @author  MCD Application Team
   5:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief   Header file of RCC LL module.
   6:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   ******************************************************************************
   7:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @attention
   8:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
   9:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * Copyright (c) 2016 STMicroelectronics.
  10:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * All rights reserved.
  11:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
  12:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * This software is licensed under terms that can be found in the LICENSE file in
  13:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * the root directory of this software component.
  14:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * If no LICENSE file comes with this software, it is provided AS-IS.
  15:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   ******************************************************************************
  16:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  17:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  18:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Define to prevent recursive inclusion -------------------------------------*/
  19:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #ifndef __STM32F1xx_LL_RCC_H
  20:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __STM32F1xx_LL_RCC_H
  21:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  22:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #ifdef __cplusplus
  23:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** extern "C" {
  24:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif
  25:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  26:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Includes ------------------------------------------------------------------*/
  27:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #include "stm32f1xx.h"
  28:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  29:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @addtogroup STM32F1xx_LL_Driver
  30:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  31:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  32:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  33:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC)
ARM GAS  /tmp/cc2ZcXc2.s 			page 4


  34:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  35:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL RCC
  36:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  37:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  38:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  39:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Private types -------------------------------------------------------------*/
  40:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Private variables ---------------------------------------------------------*/
  41:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Private constants ---------------------------------------------------------*/
  42:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Private macros ------------------------------------------------------------*/
  43:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
  44:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_Private_Macros RCC Private Macros
  45:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  46:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  47:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
  48:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
  49:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  50:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*USE_FULL_LL_DRIVER*/
  51:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Exported types ------------------------------------------------------------*/
  52:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
  53:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Types RCC Exported Types
  54:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  55:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  56:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  57:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
  58:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  59:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  60:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  61:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
  62:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  RCC Clocks Frequency Structure
  63:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  64:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** typedef struct
  65:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
  66:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t SYSCLK_Frequency;        /*!< SYSCLK clock frequency */
  67:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t HCLK_Frequency;          /*!< HCLK clock frequency */
  68:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t PCLK1_Frequency;         /*!< PCLK1 clock frequency */
  69:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t PCLK2_Frequency;         /*!< PCLK2 clock frequency */
  70:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** } LL_RCC_ClocksTypeDef;
  71:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  72:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
  73:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
  74:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  75:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  76:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
  77:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
  78:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  79:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USE_FULL_LL_DRIVER */
  80:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  81:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Exported constants --------------------------------------------------------*/
  82:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
  83:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
  84:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  85:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  86:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
  87:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief    Defines used to adapt values of different oscillators
  88:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note     These values could be modified in the user environment according to
  89:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *           HW set-up.
  90:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
ARM GAS  /tmp/cc2ZcXc2.s 			page 5


  91:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
  92:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if !defined  (HSE_VALUE)
  93:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define HSE_VALUE    8000000U  /*!< Value of the HSE oscillator in Hz */
  94:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* HSE_VALUE */
  95:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
  96:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if !defined  (HSI_VALUE)
  97:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define HSI_VALUE    8000000U  /*!< Value of the HSI oscillator in Hz */
  98:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* HSI_VALUE */
  99:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if !defined  (LSE_VALUE)
 101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LSE_VALUE    32768U    /*!< Value of the LSE oscillator in Hz */
 102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* LSE_VALUE */
 103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if !defined  (LSI_VALUE)
 105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LSI_VALUE    40000U    /*!< Value of the LSI oscillator in Hz */
 106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* LSI_VALUE */
 107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
 112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief    Flags defines which can be used with LL_RCC_WriteReg function
 113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSIRDYC                RCC_CIR_LSIRDYC     /*!< LSI Ready Interrupt Clear */
 116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSERDYC                RCC_CIR_LSERDYC     /*!< LSE Ready Interrupt Clear */
 117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSIRDYC                RCC_CIR_HSIRDYC     /*!< HSI Ready Interrupt Clear */
 118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSERDYC                RCC_CIR_HSERDYC     /*!< HSE Ready Interrupt Clear */
 119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLLRDYC                RCC_CIR_PLLRDYC     /*!< PLL Ready Interrupt Clear */
 120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL3RDYC               RCC_CIR_PLL3RDYC    /*!< PLL3(PLLI2S) Ready Interrupt Cle
 121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL2RDYC               RCC_CIR_PLL2RDYC    /*!< PLL2 Ready Interrupt Clear */
 122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_CSSC                   RCC_CIR_CSSC        /*!< Clock Security System Interrupt 
 123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_GET_FLAG Get Flags Defines
 128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief    Flags defines which can be used with LL_RCC_ReadReg function
 129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSIRDYF                RCC_CIR_LSIRDYF     /*!< LSI Ready Interrupt flag */
 132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSERDYF                RCC_CIR_LSERDYF     /*!< LSE Ready Interrupt flag */
 133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSIRDYF                RCC_CIR_HSIRDYF     /*!< HSI Ready Interrupt flag */
 134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSERDYF                RCC_CIR_HSERDYF     /*!< HSE Ready Interrupt flag */
 135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLLRDYF                RCC_CIR_PLLRDYF     /*!< PLL Ready Interrupt flag */
 136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL3RDYF               RCC_CIR_PLL3RDYF    /*!< PLL3(PLLI2S) Ready Interrupt fla
 137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL2RDYF               RCC_CIR_PLL2RDYF    /*!< PLL2 Ready Interrupt flag */
 138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_CSSF                   RCC_CIR_CSSF        /*!< Clock Security System Interrupt 
 139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_PINRSTF                RCC_CSR_PINRSTF     /*!< PIN reset flag */
 140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_PORRSTF                RCC_CSR_PORRSTF     /*!< POR/PDR reset flag */
 141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_SFTRSTF                RCC_CSR_SFTRSTF     /*!< Software Reset flag */
 142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_IWDGRSTF               RCC_CSR_IWDGRSTF    /*!< Independent Watchdog reset flag 
 143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_WWDGRSTF               RCC_CSR_WWDGRSTF    /*!< Window watchdog reset flag */
 144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CSR_LPWRRSTF               RCC_CSR_LPWRRSTF    /*!< Low-Power reset flag */
 145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
ARM GAS  /tmp/cc2ZcXc2.s 			page 6


 148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_IT IT Defines
 150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief    IT defines which can be used with LL_RCC_ReadReg and  LL_RCC_WriteReg functions
 151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSIRDYIE               RCC_CIR_LSIRDYIE      /*!< LSI Ready Interrupt Enable */
 154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_LSERDYIE               RCC_CIR_LSERDYIE      /*!< LSE Ready Interrupt Enable */
 155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSIRDYIE               RCC_CIR_HSIRDYIE      /*!< HSI Ready Interrupt Enable */
 156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_HSERDYIE               RCC_CIR_HSERDYIE      /*!< HSE Ready Interrupt Enable */
 157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLLRDYIE               RCC_CIR_PLLRDYIE      /*!< PLL Ready Interrupt Enable */
 158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL3RDYIE              RCC_CIR_PLL3RDYIE     /*!< PLL3(PLLI2S) Ready Interrupt E
 159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_CIR_PLL2RDYIE              RCC_CIR_PLL2RDYIE     /*!< PLL2 Ready Interrupt Enable */
 160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV2)
 165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_HSE_PREDIV2_DIV HSE PREDIV2 Division factor
 166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_1           RCC_CFGR2_PREDIV2_DIV1   /*!< PREDIV2 input clock not di
 169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_2           RCC_CFGR2_PREDIV2_DIV2   /*!< PREDIV2 input clock divide
 170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_3           RCC_CFGR2_PREDIV2_DIV3   /*!< PREDIV2 input clock divide
 171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_4           RCC_CFGR2_PREDIV2_DIV4   /*!< PREDIV2 input clock divide
 172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_5           RCC_CFGR2_PREDIV2_DIV5   /*!< PREDIV2 input clock divide
 173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_6           RCC_CFGR2_PREDIV2_DIV6   /*!< PREDIV2 input clock divide
 174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_7           RCC_CFGR2_PREDIV2_DIV7   /*!< PREDIV2 input clock divide
 175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_8           RCC_CFGR2_PREDIV2_DIV8   /*!< PREDIV2 input clock divide
 176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_9           RCC_CFGR2_PREDIV2_DIV9   /*!< PREDIV2 input clock divide
 177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_10          RCC_CFGR2_PREDIV2_DIV10  /*!< PREDIV2 input clock divide
 178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_11          RCC_CFGR2_PREDIV2_DIV11  /*!< PREDIV2 input clock divide
 179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_12          RCC_CFGR2_PREDIV2_DIV12  /*!< PREDIV2 input clock divide
 180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_13          RCC_CFGR2_PREDIV2_DIV13  /*!< PREDIV2 input clock divide
 181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_14          RCC_CFGR2_PREDIV2_DIV14  /*!< PREDIV2 input clock divide
 182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_15          RCC_CFGR2_PREDIV2_DIV15  /*!< PREDIV2 input clock divide
 183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_HSE_PREDIV2_DIV_16          RCC_CFGR2_PREDIV2_DIV16  /*!< PREDIV2 input clock divide
 184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_PREDIV2 */
 189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYS_CLKSOURCE  System clock switch
 191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_HSI           RCC_CFGR_SW_HSI    /*!< HSI selection as system clock */
 194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_HSE           RCC_CFGR_SW_HSE    /*!< HSE selection as system clock */
 195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_PLL           RCC_CFGR_SW_PLL    /*!< PLL selection as system clock */
 196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS  System clock switch status
 201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_HSI    RCC_CFGR_SWS_HSI   /*!< HSI used as system clock */
 204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_HSE    RCC_CFGR_SWS_HSE   /*!< HSE used as system clock */
ARM GAS  /tmp/cc2ZcXc2.s 			page 7


 205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYS_CLKSOURCE_STATUS_PLL    RCC_CFGR_SWS_PLL   /*!< PLL used as system clock */
 206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SYSCLK_DIV  AHB prescaler
 211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_1                RCC_CFGR_HPRE_DIV1   /*!< SYSCLK not divided */
 214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_2                RCC_CFGR_HPRE_DIV2   /*!< SYSCLK divided by 2 */
 215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_4                RCC_CFGR_HPRE_DIV4   /*!< SYSCLK divided by 4 */
 216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_8                RCC_CFGR_HPRE_DIV8   /*!< SYSCLK divided by 8 */
 217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_16               RCC_CFGR_HPRE_DIV16  /*!< SYSCLK divided by 16 */
 218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_64               RCC_CFGR_HPRE_DIV64  /*!< SYSCLK divided by 64 */
 219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_128              RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
 220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_256              RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
 221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_512              RCC_CFGR_HPRE_DIV512 /*!< SYSCLK divided by 512 */
 222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_APB1_DIV  APB low-speed prescaler (APB1)
 227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_1                  RCC_CFGR_PPRE1_DIV1  /*!< HCLK not divided */
 230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_2                  RCC_CFGR_PPRE1_DIV2  /*!< HCLK divided by 2 */
 231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_4                  RCC_CFGR_PPRE1_DIV4  /*!< HCLK divided by 4 */
 232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_8                  RCC_CFGR_PPRE1_DIV8  /*!< HCLK divided by 8 */
 233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB1_DIV_16                 RCC_CFGR_PPRE1_DIV16 /*!< HCLK divided by 16 */
 234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_APB2_DIV  APB high-speed prescaler (APB2)
 239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_1                  RCC_CFGR_PPRE2_DIV1  /*!< HCLK not divided */
 242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_2                  RCC_CFGR_PPRE2_DIV2  /*!< HCLK divided by 2 */
 243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_4                  RCC_CFGR_PPRE2_DIV4  /*!< HCLK divided by 4 */
 244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_8                  RCC_CFGR_PPRE2_DIV8  /*!< HCLK divided by 8 */
 245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_16                 RCC_CFGR_PPRE2_DIV16 /*!< HCLK divided by 16 */
 246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_MCO1SOURCE  MCO1 SOURCE selection
 251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_NOCLOCK          RCC_CFGR_MCO_NOCLOCK      /*!< MCO output disabled, no c
 254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_SYSCLK           RCC_CFGR_MCO_SYSCLK       /*!< SYSCLK selection as MCO s
 255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_HSI              RCC_CFGR_MCO_HSI          /*!< HSI selection as MCO sour
 256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_HSE              RCC_CFGR_MCO_HSE          /*!< HSE selection as MCO sour
 257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLCLK_DIV_2     RCC_CFGR_MCO_PLLCLK_DIV2  /*!< PLL clock divided by 2*/
 258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_MCO_PLL2CLK)
 259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLL2CLK          RCC_CFGR_MCO_PLL2CLK      /*!< PLL2 clock selected as MC
 260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR_MCO_PLL2CLK */
 261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_MCO_PLL3CLK_DIV2)
ARM GAS  /tmp/cc2ZcXc2.s 			page 8


 262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLI2SCLK_DIV2   RCC_CFGR_MCO_PLL3CLK_DIV2 /*!< PLLI2S clock divided by 2
 263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR_MCO_PLL3CLK_DIV2 */
 264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_MCO_EXT_HSE)
 265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_EXT_HSE          RCC_CFGR_MCO_EXT_HSE      /*!< XT1 external 3-25 MHz osc
 266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR_MCO_EXT_HSE */
 267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_MCO_PLL3CLK)
 268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_MCO1SOURCE_PLLI2SCLK        RCC_CFGR_MCO_PLL3CLK      /*!< PLLI2S clock selected as 
 269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR_MCO_PLL3CLK */
 270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USE_FULL_LL_DRIVER)
 275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
 276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PERIPH_FREQUENCY_NO         0x00000000U      /*!< No clock enabled for the periphera
 279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PERIPH_FREQUENCY_NA         0xFFFFFFFFU      /*!< Frequency cannot be provided as ex
 280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USE_FULL_LL_DRIVER */
 284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_I2S2SRC)
 286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2S2CLKSOURCE Peripheral I2S clock source selection
 287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_SYSCLK        RCC_CFGR2_I2S2SRC                                      
 290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO    (uint32_t)(RCC_CFGR2_I2S2SRC | (RCC_CFGR2_I2S2SRC >> 16
 291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S3_CLKSOURCE_SYSCLK        RCC_CFGR2_I2S3SRC                                      
 292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO    (uint32_t)(RCC_CFGR2_I2S3SRC | (RCC_CFGR2_I2S3SRC >> 16
 293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_I2S2SRC */
 297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USB_OTG_FS) || defined(USB)
 299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
 300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_USBPRE)
 303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_PLL             RCC_CFGR_USBPRE        /*!< PLL clock is not divided *
 304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5     0x00000000U            /*!< PLL clock is divided by 1.
 305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_USBPRE*/
 306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_OTGFSPRE)
 307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_PLL_DIV_2       RCC_CFGR_OTGFSPRE      /*!< PLL clock is divided by 2 
 308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE_PLL_DIV_3       0x00000000U            /*!< PLL clock is divided by 3 
 309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_OTGFSPRE*/
 310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USB_OTG_FS || USB */
 314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_ADC_CLKSOURCE_PCLK2 Peripheral ADC clock source selection
 316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_2    RCC_CFGR_ADCPRE_DIV2 /*ADC prescaler PCLK2 divided by 2*/
ARM GAS  /tmp/cc2ZcXc2.s 			page 9


 319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_4    RCC_CFGR_ADCPRE_DIV4 /*ADC prescaler PCLK2 divided by 4*/
 320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_6    RCC_CFGR_ADCPRE_DIV6 /*ADC prescaler PCLK2 divided by 6*/
 321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_8    RCC_CFGR_ADCPRE_DIV8 /*ADC prescaler PCLK2 divided by 8*/
 322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_I2S2SRC)
 327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_I2S2 Peripheral I2S get clock source
 328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S2_CLKSOURCE              RCC_CFGR2_I2S2SRC       /*!< I2S2 Clock source selection
 331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_I2S3_CLKSOURCE              RCC_CFGR2_I2S3SRC       /*!< I2S3 Clock source selection
 332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_I2S2SRC */
 337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USB_OTG_FS) || defined(USB)
 339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
 340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_USB_CLKSOURCE               0x00400000U     /*!< USB Clock source selection */
 343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USB_OTG_FS || USB */
 348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source
 350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ADC_CLKSOURCE               RCC_CFGR_ADCPRE /*!< ADC Clock source selection */
 353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_RTC_CLKSOURCE  RTC clock source selection
 358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_NONE          0x00000000U             /*!< No clock used as RTC clock 
 361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSE           RCC_BDCR_RTCSEL_0       /*!< LSE oscillator clock used a
 362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSI           RCC_BDCR_RTCSEL_1       /*!< LSI oscillator clock used a
 363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_HSE_DIV128    RCC_BDCR_RTCSEL         /*!< HSE oscillator clock divide
 364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLL_MUL PLL Multiplicator factor
 369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_PLLMULL2)
 372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_2                   RCC_CFGR_PLLMULL2  /*!< PLL input clock*2 */
 373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_PLLMULL2*/
 374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_PLLMULL3)
 375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_3                   RCC_CFGR_PLLMULL3  /*!< PLL input clock*3 */
ARM GAS  /tmp/cc2ZcXc2.s 			page 10


 376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_PLLMULL3*/
 377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_4                   RCC_CFGR_PLLMULL4  /*!< PLL input clock*4 */
 378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_5                   RCC_CFGR_PLLMULL5  /*!< PLL input clock*5 */
 379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_6                   RCC_CFGR_PLLMULL6  /*!< PLL input clock*6 */
 380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_7                   RCC_CFGR_PLLMULL7  /*!< PLL input clock*7 */
 381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_8                   RCC_CFGR_PLLMULL8  /*!< PLL input clock*8 */
 382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_9                   RCC_CFGR_PLLMULL9  /*!< PLL input clock*9 */
 383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_PLLMULL6_5)
 384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_6_5                 RCC_CFGR_PLLMULL6_5 /*!< PLL input clock*6 */
 385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
 386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_10                  RCC_CFGR_PLLMULL10  /*!< PLL input clock*10 */
 387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_11                  RCC_CFGR_PLLMULL11  /*!< PLL input clock*11 */
 388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_12                  RCC_CFGR_PLLMULL12  /*!< PLL input clock*12 */
 389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_13                  RCC_CFGR_PLLMULL13  /*!< PLL input clock*13 */
 390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_14                  RCC_CFGR_PLLMULL14  /*!< PLL input clock*14 */
 391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_15                  RCC_CFGR_PLLMULL15  /*!< PLL input clock*15 */
 392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL_MUL_16                  RCC_CFGR_PLLMULL16  /*!< PLL input clock*16 */
 393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_PLLMULL6_5*/
 394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLSOURCE PLL SOURCE
 399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSI_DIV_2         0x00000000U                                    /*!< HSI 
 402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE               RCC_CFGR_PLLSRC                                /*!< HSE/
 403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1SRC)
 404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2              (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1SRC << 4U) /*!< PLL2
 405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1)
 408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_1         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV1)    /*!< HSE/1
 409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_2         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV2)    /*!< HSE/2
 410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_3         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV3)    /*!< HSE/3
 411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_4         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV4)    /*!< HSE/4
 412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_5         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV5)    /*!< HSE/5
 413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_6         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV6)    /*!< HSE/6
 414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_7         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV7)    /*!< HSE/7
 415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_8         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV8)    /*!< HSE/8
 416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_9         (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV9)    /*!< HSE/9
 417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_10        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV10)   /*!< HSE/1
 418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_11        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV11)   /*!< HSE/1
 419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_12        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV12)   /*!< HSE/1
 420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_13        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV13)   /*!< HSE/1
 421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_14        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV14)   /*!< HSE/1
 422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_15        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV15)   /*!< HSE/1
 423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_16        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV16)   /*!< HSE/1
 424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1SRC)
 425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_1        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV1 | RCC_CFGR2_PR
 426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_2        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV2 | RCC_CFGR2_PR
 427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_3        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV3 | RCC_CFGR2_PR
 428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_4        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV4 | RCC_CFGR2_PR
 429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_5        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV5 | RCC_CFGR2_PR
 430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_6        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV6 | RCC_CFGR2_PR
 431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_7        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV7 | RCC_CFGR2_PR
 432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_8        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV8 | RCC_CFGR2_PR
ARM GAS  /tmp/cc2ZcXc2.s 			page 11


 433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_9        (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV9 | RCC_CFGR2_PR
 434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_10       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV10 | RCC_CFGR2_P
 435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_11       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV11 | RCC_CFGR2_P
 436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_12       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV12 | RCC_CFGR2_P
 437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_13       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV13 | RCC_CFGR2_P
 438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_14       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV14 | RCC_CFGR2_P
 439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_15       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV15 | RCC_CFGR2_P
 440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_PLL2_DIV_16       (RCC_CFGR_PLLSRC | RCC_CFGR2_PREDIV1_DIV16 | RCC_CFGR2_P
 441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
 443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_1         (RCC_CFGR_PLLSRC | 0x00000000U)               /*!< HSE/1
 444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLSOURCE_HSE_DIV_2         (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)         /*!< HSE/2
 445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PREDIV_DIV PREDIV Division factor
 451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1)
 454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_1                RCC_CFGR2_PREDIV1_DIV1   /*!< PREDIV1 input clock not di
 455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_2                RCC_CFGR2_PREDIV1_DIV2   /*!< PREDIV1 input clock divide
 456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_3                RCC_CFGR2_PREDIV1_DIV3   /*!< PREDIV1 input clock divide
 457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_4                RCC_CFGR2_PREDIV1_DIV4   /*!< PREDIV1 input clock divide
 458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_5                RCC_CFGR2_PREDIV1_DIV5   /*!< PREDIV1 input clock divide
 459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_6                RCC_CFGR2_PREDIV1_DIV6   /*!< PREDIV1 input clock divide
 460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_7                RCC_CFGR2_PREDIV1_DIV7   /*!< PREDIV1 input clock divide
 461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_8                RCC_CFGR2_PREDIV1_DIV8   /*!< PREDIV1 input clock divide
 462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_9                RCC_CFGR2_PREDIV1_DIV9   /*!< PREDIV1 input clock divide
 463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_10               RCC_CFGR2_PREDIV1_DIV10  /*!< PREDIV1 input clock divide
 464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_11               RCC_CFGR2_PREDIV1_DIV11  /*!< PREDIV1 input clock divide
 465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_12               RCC_CFGR2_PREDIV1_DIV12  /*!< PREDIV1 input clock divide
 466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_13               RCC_CFGR2_PREDIV1_DIV13  /*!< PREDIV1 input clock divide
 467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_14               RCC_CFGR2_PREDIV1_DIV14  /*!< PREDIV1 input clock divide
 468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_15               RCC_CFGR2_PREDIV1_DIV15  /*!< PREDIV1 input clock divide
 469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_16               RCC_CFGR2_PREDIV1_DIV16  /*!< PREDIV1 input clock divide
 470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
 471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_1                0x00000000U              /*!< HSE divider clock clock no
 472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PREDIV_DIV_2                RCC_CFGR_PLLXTPRE        /*!< HSE divider clock divided 
 473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLLI2S_SUPPORT)
 479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLI2S_MUL PLLI2S MUL
 480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_8                RCC_CFGR2_PLL3MUL8   /*!< PLLI2S input clock * 8 */
 483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_9                RCC_CFGR2_PLL3MUL9   /*!< PLLI2S input clock * 9 */
 484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_10               RCC_CFGR2_PLL3MUL10  /*!< PLLI2S input clock * 10 */
 485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_11               RCC_CFGR2_PLL3MUL11  /*!< PLLI2S input clock * 11 */
 486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_12               RCC_CFGR2_PLL3MUL12  /*!< PLLI2S input clock * 12 */
 487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_13               RCC_CFGR2_PLL3MUL13  /*!< PLLI2S input clock * 13 */
 488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_14               RCC_CFGR2_PLL3MUL14  /*!< PLLI2S input clock * 14 */
 489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_16               RCC_CFGR2_PLL3MUL16  /*!< PLLI2S input clock * 16 */
ARM GAS  /tmp/cc2ZcXc2.s 			page 12


 490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLLI2S_MUL_20               RCC_CFGR2_PLL3MUL20  /*!< PLLI2S input clock * 20 */
 491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLLI2S_SUPPORT */
 496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLL2_SUPPORT)
 498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLL2_MUL PLL2 MUL
 499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_8                  RCC_CFGR2_PLL2MUL8   /*!< PLL2 input clock * 8 */
 502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_9                  RCC_CFGR2_PLL2MUL9   /*!< PLL2 input clock * 9 */
 503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_10                 RCC_CFGR2_PLL2MUL10  /*!< PLL2 input clock * 10 */
 504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_11                 RCC_CFGR2_PLL2MUL11  /*!< PLL2 input clock * 11 */
 505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_12                 RCC_CFGR2_PLL2MUL12  /*!< PLL2 input clock * 12 */
 506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_13                 RCC_CFGR2_PLL2MUL13  /*!< PLL2 input clock * 13 */
 507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_14                 RCC_CFGR2_PLL2MUL14  /*!< PLL2 input clock * 14 */
 508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_16                 RCC_CFGR2_PLL2MUL16  /*!< PLL2 input clock * 16 */
 509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_PLL2_MUL_20                 RCC_CFGR2_PLL2MUL20  /*!< PLL2 input clock * 20 */
 510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLL2_SUPPORT */
 515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Exported macro ------------------------------------------------------------*/
 521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
 522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
 526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Write a value in RCC register
 531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __REG__ Register to be written
 532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __VALUE__ Value to be written in the register
 533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_WriteReg(__REG__, __VALUE__) WRITE_REG(RCC->__REG__, (__VALUE__))
 536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Read a value in RCC register
 539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __REG__ Register to be read
 540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Register value
 541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define LL_RCC_ReadReg(__REG__) READ_REG(RCC->__REG__)
 543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 13


 547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
 548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_PLLMULL6_5)
 552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLCLK frequency
 554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE / (@ref LL_RCC_PLL_GetPrediv () + 1), @ref 
 555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE div Prediv1 / HSI div 2 / PLL2 div Pred
 556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLLMUL__: This parameter can be one of the following values:
 557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_4
 558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_5
 559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6
 560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_7
 561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_8
 562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_9
 563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6_5
 564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
 565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__) \
 567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****           (((__PLLMUL__) != RCC_CFGR_PLLMULL6_5) ? \
 568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****               ((__INPUTFREQ__) * ((((__PLLMUL__) & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos) + 2U)
 569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****               (((__INPUTFREQ__) * 13U) / 2U))
 570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
 572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLCLK frequency
 574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLCLK_FREQ (HSE_VALUE / (@ref LL_RCC_PLL_GetPrediv () + 1), @ref 
 575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL Input frequency (based on HSE div Prediv1 or div 2 / HSI div 2)
 576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLLMUL__: This parameter can be one of the following values:
 577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_2
 578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_3
 579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_4
 580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_5
 581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6
 582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_7
 583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_8
 584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_9
 585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_10
 586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_11
 587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_12
 588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_13
 589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_14
 590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_15
 591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_16
 592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PLL clock frequency (in Hz)
 593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__) ((__INPUTFREQ__) * (((__PLLMUL__) >> R
 595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR_PLLMULL6_5 */
 596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLLI2S_SUPPORT)
 598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLLI2S frequency
 600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLLI2SCLK_FREQ (HSE_VALUE, @ref LL_RCC_PLLI2S_GetMultiplicator (),
 601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLLI2S Input frequency (based on HSE value)
 602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLLI2SMUL__: This parameter can be one of the following values:
 603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_8
ARM GAS  /tmp/cc2ZcXc2.s 			page 14


 604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_9
 605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_10
 606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_11
 607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_12
 608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_13
 609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_14
 610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_16
 611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_20
 612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLLI2SDIV__: This parameter can be one of the following values:
 613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
 614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
 615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
 616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
 617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
 618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
 619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
 620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
 621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
 622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
 623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
 624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
 625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
 626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
 627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
 628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
 629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PLLI2S clock frequency (in Hz)
 630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLI2SCLK_FREQ(__INPUTFREQ__, __PLLI2SMUL__, __PLLI2SDIV__) (((__INPUTFREQ__)
 632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLLI2S_SUPPORT */
 633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLL2_SUPPORT)
 635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PLL2 frequency
 637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note ex: @ref __LL_RCC_CALC_PLL2CLK_FREQ (HSE_VALUE, @ref LL_RCC_PLL2_GetMultiplicator (), @re
 638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __INPUTFREQ__ PLL2 Input frequency (based on HSE value)
 639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLL2MUL__: This parameter can be one of the following values:
 640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_8
 641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_9
 642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_10
 643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_11
 644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_12
 645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_13
 646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_14
 647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_16
 648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_20
 649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __PLL2DIV__: This parameter can be one of the following values:
 650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
 651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
 652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
 653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
 654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
 655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
 656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
 657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
 658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
 659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
 660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
ARM GAS  /tmp/cc2ZcXc2.s 			page 15


 661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
 662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
 663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
 664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
 665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
 666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PLL2 clock frequency (in Hz)
 667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PLL2CLK_FREQ(__INPUTFREQ__, __PLL2MUL__, __PLL2DIV__) (((__INPUTFREQ__) * (((
 669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLL2_SUPPORT */
 670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the HCLK frequency
 673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note: __AHBPRESCALER__ be retrieved by @ref LL_RCC_GetAHBPrescaler
 674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *        ex: __LL_RCC_CALC_HCLK_FREQ(LL_RCC_GetAHBPrescaler())
 675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
 676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __AHBPRESCALER__: This parameter can be one of the following values:
 677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
 678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
 679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
 680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
 681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
 682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
 683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
 684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
 685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
 686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval HCLK clock frequency (in Hz)
 687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__) ((__SYSCLKFREQ__) >> AHBPrescTabl
 689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PCLK1 frequency (ABP1)
 692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note: __APB1PRESCALER__ be retrieved by @ref LL_RCC_GetAPB1Prescaler
 693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *        ex: __LL_RCC_CALC_PCLK1_FREQ(LL_RCC_GetAPB1Prescaler())
 694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __HCLKFREQ__ HCLK frequency
 695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __APB1PRESCALER__: This parameter can be one of the following values:
 696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
 697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
 698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
 699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
 700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
 701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PCLK1 clock frequency (in Hz)
 702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[
 704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Helper macro to calculate the PCLK2 frequency (ABP2)
 707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note: __APB2PRESCALER__ be retrieved by @ref LL_RCC_GetAPB2Prescaler
 708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *        ex: __LL_RCC_CALC_PCLK2_FREQ(LL_RCC_GetAPB2Prescaler())
 709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __HCLKFREQ__ HCLK frequency
 710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  __APB2PRESCALER__: This parameter can be one of the following values:
 711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_1
 712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_2
 713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_4
 714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_8
 715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_16
 716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval PCLK2 clock frequency (in Hz)
 717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
ARM GAS  /tmp/cc2ZcXc2.s 			page 16


 718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #define __LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__) ((__HCLKFREQ__) >> APBPrescTable[
 719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /* Exported functions --------------------------------------------------------*/
 729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
 730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_HSE HSE
 734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable the Clock Security System.
 739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           CSSON         LL_RCC_HSE_EnableCSS
 740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_EnableCSS(void)
 743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_CSSON);
 745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable HSE external oscillator (HSE Bypass)
 749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSEBYP        LL_RCC_HSE_EnableBypass
 750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_EnableBypass(void)
 753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSEBYP);
 755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable HSE external oscillator (HSE Bypass)
 759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSEBYP        LL_RCC_HSE_DisableBypass
 760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_DisableBypass(void)
 763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
 765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable HSE crystal oscillator (HSE ON)
 769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSEON         LL_RCC_HSE_Enable
 770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_Enable(void)
 773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSEON);
ARM GAS  /tmp/cc2ZcXc2.s 			page 17


 775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable HSE crystal oscillator (HSE ON)
 779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSEON         LL_RCC_HSE_Disable
 780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSE_Disable(void)
 783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEON);
 785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if HSE oscillator Ready
 789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSERDY        LL_RCC_HSE_IsReady
 790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
 791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
 793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
 795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV2)
 798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get PREDIV2 division factor
 800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PREDIV2       LL_RCC_HSE_GetPrediv2
 801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
 802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
 803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
 804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
 805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
 806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
 807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
 808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
 809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
 810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
 811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
 812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
 813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
 814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
 815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
 816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
 817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
 818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSE_GetPrediv2(void)
 820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV2));
 822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_PREDIV2 */
 824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_HSI HSI
 830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
ARM GAS  /tmp/cc2ZcXc2.s 			page 18


 832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable HSI oscillator
 835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSION         LL_RCC_HSI_Enable
 836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_Enable(void)
  36              		.loc 2 838 22 view .LVU2
  37              	.LBB43:
 839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_HSION);
  38              		.loc 2 840 3 view .LVU3
  39 0000 184A     		ldr	r2, .L5
  40 0002 1368     		ldr	r3, [r2]
  41 0004 43F00103 		orr	r3, r3, #1
  42 0008 1360     		str	r3, [r2]
  43              	.L2:
  44              	.LBE43:
  45              	.LBE42:
 105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Wait for HSI READY bit */
 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   while (LL_RCC_HSI_IsReady() != 1U)
 108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  46              		.loc 1 108 4 discriminator 1 view .LVU4
 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  47              		.loc 1 107 9 discriminator 1 view .LVU5
  48              	.LBB44:
  49              	.LBI44:
 841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable HSI oscillator
 845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSION         LL_RCC_HSI_Disable
 846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_Disable(void)
 849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_HSION);
 851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if HSI clock is ready
 855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           HSIRDY        LL_RCC_HSI_IsReady
 856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
 857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_IsReady(void)
  50              		.loc 2 858 26 discriminator 1 view .LVU6
  51              	.LBB45:
 859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY));
  52              		.loc 2 860 3 discriminator 1 view .LVU7
  53              		.loc 2 860 11 is_stmt 0 discriminator 1 view .LVU8
  54 000a 164B     		ldr	r3, .L5
  55 000c 1B68     		ldr	r3, [r3]
  56              	.LBE45:
  57              	.LBE44:
 107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
ARM GAS  /tmp/cc2ZcXc2.s 			page 19


  58              		.loc 1 107 9 discriminator 1 view .LVU9
  59 000e 13F0020F 		tst	r3, #2
  60 0012 FAD0     		beq	.L2
 109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Configure HSI as system clock source */
 111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_HSI);
  61              		.loc 1 111 3 is_stmt 1 view .LVU10
  62              	.LVL0:
  63              	.LBB46:
  64              	.LBI46:
 861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get HSI Calibration value
 865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note When HSITRIM is written, HSICAL is updated with the sum of
 866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *       HSITRIM and the factory trim value
 867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR        HSICAL        LL_RCC_HSI_GetCalibration
 868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Between Min_Data = 0x00 and Max_Data = 0xFF
 869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibration(void)
 871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSICAL) >> RCC_CR_HSICAL_Pos);
 873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set HSI Calibration trimming
 877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note user-programmable trimming value that is added to the HSICAL
 878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note Default value is 16, which, when added to the HSICAL value,
 879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *       should trim the HSI to 16 MHz +/- 1 %
 880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR        HSITRIM       LL_RCC_HSI_SetCalibTrimming
 881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Value between Min_Data = 0x00 and Max_Data = 0x1F
 882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_HSI_SetCalibTrimming(uint32_t Value)
 885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CR, RCC_CR_HSITRIM, Value << RCC_CR_HSITRIM_Pos);
 887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get HSI Calibration trimming
 891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR        HSITRIM       LL_RCC_HSI_GetCalibTrimming
 892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Between Min_Data = 0x00 and Max_Data = 0x1F
 893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
 895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CR, RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_Pos);
 897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_LSE LSE
 904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
ARM GAS  /tmp/cc2ZcXc2.s 			page 20


 908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable  Low Speed External (LSE) crystal.
 909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         LSEON         LL_RCC_LSE_Enable
 910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_Enable(void)
 913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSEON);
 915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable  Low Speed External (LSE) crystal.
 919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         LSEON         LL_RCC_LSE_Disable
 920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_Disable(void)
 923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
 925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable external clock source (LSE bypass).
 929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_EnableBypass
 930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_EnableBypass(void)
 933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
 935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable external clock source (LSE bypass).
 939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         LSEBYP        LL_RCC_LSE_DisableBypass
 940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSE_DisableBypass(void)
 943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP);
 945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if LSE oscillator Ready
 949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         LSERDY        LL_RCC_LSE_IsReady
 950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
 951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
 953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY));
 955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_LSI LSI
 962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
 963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 21


 965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable LSI Oscillator
 967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          LSION         LL_RCC_LSI_Enable
 968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSI_Enable(void)
 971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CSR, RCC_CSR_LSION);
 973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable LSI Oscillator
 977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          LSION         LL_RCC_LSI_Disable
 978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
 979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_LSI_Disable(void)
 981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CSR, RCC_CSR_LSION);
 983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if LSI is Ready
 987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          LSIRDY        LL_RCC_LSI_IsReady
 988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
 989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
 991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == (RCC_CSR_LSIRDY));
 993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
 996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
 997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
 998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
 999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_System System
1000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure the system clock source
1005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         SW            LL_RCC_SetSysClkSource
1006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Source This parameter can be one of the following values:
1007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSI
1008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
1009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
1010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetSysClkSource(uint32_t Source)
  65              		.loc 2 1012 22 view .LVU11
  66              	.LBB47:
1013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, Source);
  67              		.loc 2 1014 3 view .LVU12
  68 0014 134A     		ldr	r2, .L5
  69 0016 5368     		ldr	r3, [r2, #4]
  70 0018 23F00303 		bic	r3, r3, #3
  71 001c 5360     		str	r3, [r2, #4]
ARM GAS  /tmp/cc2ZcXc2.s 			page 22


  72              	.LVL1:
  73              	.L3:
  74              		.loc 2 1014 3 is_stmt 0 view .LVU13
  75              	.LBE47:
  76              	.LBE46:
 112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Wait till clock switch is ready */
 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
 115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  77              		.loc 1 115 4 is_stmt 1 discriminator 1 view .LVU14
 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  78              		.loc 1 114 9 discriminator 1 view .LVU15
  79              	.LBB48:
  80              	.LBI48:
1015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get the system clock source
1019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         SWS           LL_RCC_GetSysClkSource
1020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
1022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
1023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_PLL
1024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetSysClkSource(void)
  81              		.loc 2 1025 26 discriminator 1 view .LVU16
  82              	.LBB49:
1026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_SWS));
  83              		.loc 2 1027 3 discriminator 1 view .LVU17
  84              		.loc 2 1027 21 is_stmt 0 discriminator 1 view .LVU18
  85 001e 114B     		ldr	r3, .L5
  86 0020 5B68     		ldr	r3, [r3, #4]
  87              	.LBE49:
  88              	.LBE48:
 114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  89              		.loc 1 114 9 discriminator 1 view .LVU19
  90 0022 13F00C0F 		tst	r3, #12
  91 0026 FAD1     		bne	.L3
 116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset PLLON bit */
 118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
  92              		.loc 1 118 3 is_stmt 1 view .LVU20
  93 0028 0E4A     		ldr	r2, .L5
  94 002a 1368     		ldr	r3, [r2]
  95 002c 23F08073 		bic	r3, r3, #16777216
  96 0030 1360     		str	r3, [r2]
 119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Wait for PLL READY bit to be reset */
 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   while (LL_RCC_PLL_IsReady() != 0U)
  97              		.loc 1 121 3 view .LVU21
  98              	.L4:
 122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
  99              		.loc 1 122 4 discriminator 1 view .LVU22
 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
 100              		.loc 1 121 9 discriminator 1 view .LVU23
 101              	.LBB50:
ARM GAS  /tmp/cc2ZcXc2.s 			page 23


 102              	.LBI50:
1028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1029:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1030:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1031:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set AHB prescaler
1032:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         HPRE          LL_RCC_SetAHBPrescaler
1033:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Prescaler This parameter can be one of the following values:
1034:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
1035:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
1036:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
1037:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
1038:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
1039:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
1040:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
1041:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
1042:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
1043:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1044:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1045:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAHBPrescaler(uint32_t Prescaler)
1046:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1047:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, Prescaler);
1048:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1049:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1050:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1051:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set APB1 prescaler
1052:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE1         LL_RCC_SetAPB1Prescaler
1053:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Prescaler This parameter can be one of the following values:
1054:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
1055:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
1056:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
1057:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
1058:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
1059:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1060:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1061:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAPB1Prescaler(uint32_t Prescaler)
1062:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1063:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, Prescaler);
1064:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1065:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1066:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1067:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set APB2 prescaler
1068:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE2         LL_RCC_SetAPB2Prescaler
1069:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Prescaler This parameter can be one of the following values:
1070:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_1
1071:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_2
1072:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_4
1073:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_8
1074:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_16
1075:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1076:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1077:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
1078:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1079:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
1080:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1081:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1082:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1083:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get AHB prescaler
ARM GAS  /tmp/cc2ZcXc2.s 			page 24


1084:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         HPRE          LL_RCC_GetAHBPrescaler
1085:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1086:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_1
1087:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_2
1088:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_4
1089:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_8
1090:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_16
1091:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_64
1092:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_128
1093:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_256
1094:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_SYSCLK_DIV_512
1095:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetAHBPrescaler(void)
1097:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_HPRE));
1099:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1100:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1101:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1102:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get APB1 prescaler
1103:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE1         LL_RCC_GetAPB1Prescaler
1104:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1105:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_1
1106:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_2
1107:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_4
1108:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_8
1109:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB1_DIV_16
1110:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetAPB1Prescaler(void)
1112:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1));
1114:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1115:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1116:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1117:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get APB2 prescaler
1118:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PPRE2         LL_RCC_GetAPB2Prescaler
1119:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1120:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_1
1121:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_2
1122:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_4
1123:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_8
1124:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_APB2_DIV_16
1125:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetAPB2Prescaler(void)
1127:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2));
1129:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1130:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1131:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1132:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1133:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1134:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1135:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_MCO MCO
1136:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1137:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1138:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1139:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1140:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure MCOx
ARM GAS  /tmp/cc2ZcXc2.s 			page 25


1141:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         MCO           LL_RCC_ConfigMCO
1142:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  MCOxSource This parameter can be one of the following values:
1143:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_NOCLOCK
1144:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_SYSCLK
1145:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_HSI
1146:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_HSE
1147:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_PLLCLK_DIV_2
1148:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_PLL2CLK (*)
1149:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_PLLI2SCLK_DIV2 (*)
1150:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_EXT_HSE (*)
1151:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_MCO1SOURCE_PLLI2SCLK (*)
1152:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1153:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1154:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1155:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1156:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource)
1157:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1158:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_MCOSEL, MCOxSource);
1159:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1160:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1161:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1162:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1163:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1164:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1165:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
1166:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1167:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1168:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1169:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_I2S2SRC)
1170:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1171:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure I2Sx clock source
1172:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        I2S2SRC       LL_RCC_SetI2SClockSource\n
1173:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        I2S3SRC       LL_RCC_SetI2SClockSource
1174:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  I2SxSource This parameter can be one of the following values:
1175:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE_SYSCLK
1176:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO
1177:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE_SYSCLK
1178:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO
1179:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1180:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1181:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetI2SClockSource(uint32_t I2SxSource)
1182:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1183:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, (I2SxSource & 0xFFFF0000U), (I2SxSource << 16U));
1184:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1185:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_I2S2SRC */
1186:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1187:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USB_OTG_FS) || defined(USB)
1188:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1189:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure USB clock source
1190:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         OTGFSPRE      LL_RCC_SetUSBClockSource\n
1191:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR         USBPRE        LL_RCC_SetUSBClockSource
1192:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  USBxSource This parameter can be one of the following values:
1193:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL (*)
1194:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5 (*)
1195:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_2 (*)
1196:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_3 (*)
1197:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
ARM GAS  /tmp/cc2ZcXc2.s 			page 26


1198:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1199:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1200:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1201:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetUSBClockSource(uint32_t USBxSource)
1202:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1203:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR_USBPRE)
1204:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_USBPRE, USBxSource);
1205:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else /*RCC_CFGR_OTGFSPRE*/
1206:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_OTGFSPRE, USBxSource);
1207:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR_USBPRE*/
1208:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1209:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USB_OTG_FS || USB */
1210:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1211:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1212:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure ADC clock source
1213:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         ADCPRE        LL_RCC_SetADCClockSource
1214:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  ADCxSource This parameter can be one of the following values:
1215:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_2
1216:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_4
1217:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_6
1218:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_8
1219:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1220:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1221:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetADCClockSource(uint32_t ADCxSource)
1222:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1223:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_ADCPRE, ADCxSource);
1224:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1225:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1226:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_I2S2SRC)
1227:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1228:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get I2Sx clock source
1229:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        I2S2SRC       LL_RCC_GetI2SClockSource\n
1230:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        I2S3SRC       LL_RCC_GetI2SClockSource
1231:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  I2Sx This parameter can be one of the following values:
1232:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE
1233:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE
1234:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1235:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE_SYSCLK
1236:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO
1237:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE_SYSCLK
1238:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO
1239:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1240:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetI2SClockSource(uint32_t I2Sx)
1241:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1242:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR2, I2Sx) >> 16U | I2Sx);
1243:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1244:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_I2S2SRC */
1245:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1246:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(USB_OTG_FS) || defined(USB)
1247:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1248:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get USBx clock source
1249:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         OTGFSPRE      LL_RCC_GetUSBClockSource\n
1250:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR         USBPRE        LL_RCC_GetUSBClockSource
1251:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  USBx This parameter can be one of the following values:
1252:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE
1253:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1254:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL (*)
ARM GAS  /tmp/cc2ZcXc2.s 			page 27


1255:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5 (*)
1256:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_2 (*)
1257:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_USB_CLKSOURCE_PLL_DIV_3 (*)
1258:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1259:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1260:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetUSBClockSource(uint32_t USBx)
1262:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, USBx));
1264:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1265:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* USB_OTG_FS || USB */
1266:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1267:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1268:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get ADCx clock source
1269:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         ADCPRE        LL_RCC_GetADCClockSource
1270:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  ADCx This parameter can be one of the following values:
1271:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSOURCE
1272:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1273:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_2
1274:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_4
1275:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_6
1276:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_ADC_CLKSRC_PCLK2_DIV_8
1277:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetADCClockSource(uint32_t ADCx)
1279:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, ADCx));
1281:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1282:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1283:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1284:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1285:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1286:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1287:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_RTC RTC
1288:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1289:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1290:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1291:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1292:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set RTC Clock Source
1293:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note Once the RTC clock source has been selected, it cannot be changed any more unless
1294:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *       the Backup domain is reset. The BDRST bit can be used to reset them.
1295:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         RTCSEL        LL_RCC_SetRTCClockSource
1296:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Source This parameter can be one of the following values:
1297:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
1298:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
1299:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
1300:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV128
1301:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1302:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1303:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetRTCClockSource(uint32_t Source)
1304:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1305:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->BDCR, RCC_BDCR_RTCSEL, Source);
1306:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1307:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1308:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1309:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get RTC Clock Source
1310:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         RTCSEL        LL_RCC_GetRTCClockSource
1311:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
ARM GAS  /tmp/cc2ZcXc2.s 			page 28


1312:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_NONE
1313:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSE
1314:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_LSI
1315:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_RTC_CLKSOURCE_HSE_DIV128
1316:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1317:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetRTCClockSource(void)
1318:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1319:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL));
1320:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1321:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1322:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1323:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable RTC
1324:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         RTCEN         LL_RCC_EnableRTC
1325:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1326:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1327:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_EnableRTC(void)
1328:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1329:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
1330:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1331:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1332:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1333:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable RTC
1334:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         RTCEN         LL_RCC_DisableRTC
1335:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1336:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1337:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_DisableRTC(void)
1338:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1339:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_RTCEN);
1340:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1341:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1342:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1343:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RTC has been enabled or not
1344:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         RTCEN         LL_RCC_IsEnabledRTC
1345:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1346:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1347:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsEnabledRTC(void)
1348:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1349:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->BDCR, RCC_BDCR_RTCEN) == (RCC_BDCR_RTCEN));
1350:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1351:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1352:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1353:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Force the Backup domain reset
1354:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         BDRST         LL_RCC_ForceBackupDomainReset
1355:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1356:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1357:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ForceBackupDomainReset(void)
1358:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1359:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->BDCR, RCC_BDCR_BDRST);
1360:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1361:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1362:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1363:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Release the Backup domain reset
1364:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll BDCR         BDRST         LL_RCC_ReleaseBackupDomainReset
1365:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1366:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1367:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ReleaseBackupDomainReset(void)
1368:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
ARM GAS  /tmp/cc2ZcXc2.s 			page 29


1369:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->BDCR, RCC_BDCR_BDRST);
1370:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1371:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1372:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1373:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1374:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1375:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1376:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_PLL PLL
1377:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1378:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1379:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1380:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1381:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable PLL
1382:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLLON         LL_RCC_PLL_Enable
1383:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1384:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1385:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_Enable(void)
1386:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1387:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_PLLON);
1388:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1389:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1390:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1391:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable PLL
1392:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note Cannot be disabled if the PLL clock is used as the system clock
1393:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLLON         LL_RCC_PLL_Disable
1394:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1395:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1396:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_Disable(void)
1397:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1398:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_PLLON);
1399:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1400:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1401:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1402:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLL Ready
1403:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLLRDY        LL_RCC_PLL_IsReady
1404:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1405:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL_IsReady(void)
 103              		.loc 2 1406 26 discriminator 1 view .LVU24
 104              	.LBB51:
1407:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == (RCC_CR_PLLRDY));
 105              		.loc 2 1408 3 discriminator 1 view .LVU25
 106              		.loc 2 1408 11 is_stmt 0 discriminator 1 view .LVU26
 107 0032 0C4B     		ldr	r3, .L5
 108 0034 1B68     		ldr	r3, [r3]
 109              	.LBE51:
 110              	.LBE50:
 121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {}
 111              		.loc 1 121 9 discriminator 1 view .LVU27
 112 0036 13F0007F 		tst	r3, #33554432
 113 003a FAD1     		bne	.L4
 123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset CFGR register */
 125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_WriteReg(CFGR, 0x00000000U);
 114              		.loc 1 125 3 is_stmt 1 view .LVU28
 115 003c 094B     		ldr	r3, .L5
ARM GAS  /tmp/cc2ZcXc2.s 			page 30


 116 003e 0020     		movs	r0, #0
 117 0040 5860     		str	r0, [r3, #4]
 126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset HSEON, HSEBYP & CSSON bits */
 128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   CLEAR_BIT(RCC->CR, (RCC_CR_CSSON | RCC_CR_HSEON | RCC_CR_HSEBYP));
 118              		.loc 1 128 3 view .LVU29
 119 0042 1A68     		ldr	r2, [r3]
 120 0044 22F45022 		bic	r2, r2, #851968
 121 0048 1A60     		str	r2, [r3]
 129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CR_PLL2ON)
 131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset PLL2ON bit */
 132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON);
 133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CR_PLL2ON */
 134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CR_PLL3ON)
 136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset PLL3ON bit */
 137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON);
 138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CR_PLL3ON */
 139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Set HSITRIM bits to the reset value */
 141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_HSI_SetCalibTrimming(0x10U);
 122              		.loc 1 141 3 view .LVU30
 123              	.LVL2:
 124              	.LBB52:
 125              	.LBI52:
 884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 126              		.loc 2 884 22 view .LVU31
 127              	.LBB53:
 886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 128              		.loc 2 886 3 view .LVU32
 129 004a 1A68     		ldr	r2, [r3]
 130 004c 22F0F802 		bic	r2, r2, #248
 131 0050 42F08002 		orr	r2, r2, #128
 132 0054 1A60     		str	r2, [r3]
 133              	.LVL3:
 886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 134              		.loc 2 886 3 is_stmt 0 view .LVU33
 135              	.LBE53:
 136              	.LBE52:
 142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CFGR2_PREDIV1)
 144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Reset CFGR2 register */
 145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_WriteReg(CFGR2, 0x00000000U);
 146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CFGR2_PREDIV1 */
 147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Disable all interrupts */
 149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_WriteReg(CIR, 0x00000000U);
 137              		.loc 1 149 3 is_stmt 1 view .LVU34
 138 0056 9860     		str	r0, [r3, #8]
 150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Clear reset flags */
 152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   LL_RCC_ClearResetFlags();
 139              		.loc 1 152 3 view .LVU35
 140              	.LBB54:
 141              	.LBI54:
1409:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
ARM GAS  /tmp/cc2ZcXc2.s 			page 31


1410:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1411:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1412:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure PLL used for SYSCLK Domain
1413:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_ConfigDomain_SYS\n
1414:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR         PLLXTPRE      LL_RCC_PLL_ConfigDomain_SYS\n
1415:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR         PLLMULL       LL_RCC_PLL_ConfigDomain_SYS\n
1416:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PREDIV1       LL_RCC_PLL_ConfigDomain_SYS\n
1417:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PREDIV1SRC    LL_RCC_PLL_ConfigDomain_SYS
1418:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Source This parameter can be one of the following values:
1419:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
1420:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_1
1421:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_2 (*)
1422:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_3 (*)
1423:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_4 (*)
1424:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_5 (*)
1425:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_6 (*)
1426:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_7 (*)
1427:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_8 (*)
1428:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_9 (*)
1429:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_10 (*)
1430:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_11 (*)
1431:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_12 (*)
1432:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_13 (*)
1433:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_14 (*)
1434:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_15 (*)
1435:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE_DIV_16 (*)
1436:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_1 (*)
1437:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_2 (*)
1438:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_3 (*)
1439:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_4 (*)
1440:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_5 (*)
1441:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_6 (*)
1442:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_7 (*)
1443:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_8 (*)
1444:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_9 (*)
1445:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_10 (*)
1446:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_11 (*)
1447:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_12 (*)
1448:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_13 (*)
1449:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_14 (*)
1450:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_15 (*)
1451:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2_DIV_16 (*)
1452:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1453:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1454:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  PLLMul This parameter can be one of the following values:
1455:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_2 (*)
1456:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_3 (*)
1457:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_4
1458:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_5
1459:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6
1460:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_7
1461:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_8
1462:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_9
1463:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6_5 (*)
1464:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_10 (*)
1465:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_11 (*)
1466:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_12 (*)
ARM GAS  /tmp/cc2ZcXc2.s 			page 32


1467:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_13 (*)
1468:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_14 (*)
1469:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_15 (*)
1470:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_16 (*)
1471:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1472:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1473:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1474:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1475:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLMul)
1476:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1477:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL,
1478:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****              (Source & (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)) | PLLMul);
1479:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1)
1480:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1SRC)
1481:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, (RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC),
1482:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****              (Source & RCC_CFGR2_PREDIV1) | ((Source & (RCC_CFGR2_PREDIV1SRC << 4U)) >> 4U));
1483:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
1484:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV1, (Source & RCC_CFGR2_PREDIV1));
1485:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
1486:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
1487:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1488:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1489:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1490:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure PLL clock source
1491:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR      PLLSRC        LL_RCC_PLL_SetMainSource\n
1492:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2     PREDIV1SRC    LL_RCC_PLL_SetMainSource
1493:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param PLLSource This parameter can be one of the following values:
1494:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
1495:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE
1496:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2 (*)
1497:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1498:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1499:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
1500:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1501:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1SRC)
1502:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC, ((PLLSource & (RCC_CFGR2_PREDIV1SRC << 4U)) >> 4U));
1503:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_CFGR2_PREDIV1SRC */
1504:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR, RCC_CFGR_PLLSRC, PLLSource);
1505:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1506:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1507:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1508:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get the oscillator used as PLL clock source.
1509:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PLLSRC        LL_RCC_PLL_GetMainSource\n
1510:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PREDIV1SRC    LL_RCC_PLL_GetMainSource
1511:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1512:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSI_DIV_2
1513:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_HSE
1514:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLSOURCE_PLL2 (*)
1515:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1516:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1517:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource(void)
1519:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1520:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1SRC)
1521:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t pllsrc = READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC);
1522:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   uint32_t predivsrc = (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1SRC) << 4U);
1523:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(pllsrc | predivsrc);
ARM GAS  /tmp/cc2ZcXc2.s 			page 33


1524:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC));
1526:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
1527:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1528:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1529:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1530:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get PLL multiplication Factor
1531:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR         PLLMULL       LL_RCC_PLL_GetMultiplicator
1532:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1533:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_2 (*)
1534:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_3 (*)
1535:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_4
1536:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_5
1537:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6
1538:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_7
1539:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_8
1540:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_9
1541:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_6_5 (*)
1542:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_10 (*)
1543:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_11 (*)
1544:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_12 (*)
1545:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_13 (*)
1546:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_14 (*)
1547:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_15 (*)
1548:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL_MUL_16 (*)
1549:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1550:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
1551:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator(void)
1553:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLMULL));
1555:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1556:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1557:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1558:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get PREDIV1 division factor for the main PLL
1559:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @note They can be written only when the PLL is disabled
1560:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PREDIV1       LL_RCC_PLL_GetPrediv\n
1561:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PLLXTPRE      LL_RCC_PLL_GetPrediv
1562:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1563:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_1
1564:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_2
1565:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_3 (*)
1566:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_4 (*)
1567:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_5 (*)
1568:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_6 (*)
1569:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_7 (*)
1570:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_8 (*)
1571:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_9 (*)
1572:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_10 (*)
1573:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_11 (*)
1574:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_12 (*)
1575:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_13 (*)
1576:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_14 (*)
1577:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_15 (*)
1578:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PREDIV_DIV_16 (*)
1579:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *
1580:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         (*) value not defined in all devices
ARM GAS  /tmp/cc2ZcXc2.s 			page 34


1581:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL_GetPrediv(void)
1583:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1584:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_CFGR2_PREDIV1)
1585:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PREDIV1));
1586:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #else
1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR, RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos);
1588:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
1589:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1590:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1591:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1592:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1593:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1594:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1595:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLLI2S_SUPPORT)
1596:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_PLLI2S PLLI2S
1597:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1598:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1599:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1600:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1601:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable PLLI2S
1602:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL3ON        LL_RCC_PLLI2S_Enable
1603:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1604:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1605:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLLI2S_Enable(void)
1606:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1607:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_PLL3ON);
1608:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1609:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1610:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1611:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable PLLI2S
1612:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL3ON        LL_RCC_PLLI2S_Disable
1613:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1614:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1615:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLLI2S_Disable(void)
1616:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1617:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL3ON);
1618:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1619:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1620:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1621:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLLI2S Ready
1622:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL3RDY       LL_RCC_PLLI2S_IsReady
1623:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1624:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1625:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLLI2S_IsReady(void)
1626:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1627:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CR, RCC_CR_PLL3RDY) == (RCC_CR_PLL3RDY));
1628:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1629:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1630:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1631:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure PLLI2S used for I2S Domain
1632:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PREDIV2       LL_RCC_PLL_ConfigDomain_PLLI2S\n
1633:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PLL3MUL       LL_RCC_PLL_ConfigDomain_PLLI2S
1634:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Divider This parameter can be one of the following values:
1635:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
1636:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
1637:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
ARM GAS  /tmp/cc2ZcXc2.s 			page 35


1638:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
1639:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
1640:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
1641:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
1642:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
1643:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
1644:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
1645:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
1646:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
1647:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
1648:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
1649:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
1650:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
1651:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Multiplicator This parameter can be one of the following values:
1652:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_8
1653:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_9
1654:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_10
1655:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_11
1656:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_12
1657:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_13
1658:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_14
1659:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_16
1660:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_20
1661:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1662:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1663:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_PLLI2S(uint32_t Divider, uint32_t Multiplicator)
1664:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1665:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL3MUL, Divider | Multiplicator);
1666:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1667:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1668:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1669:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get PLLI2S Multiplication Factor
1670:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PLL3MUL       LL_RCC_PLLI2S_GetMultiplicator
1671:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1672:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_8
1673:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_9
1674:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_10
1675:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_11
1676:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_12
1677:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_13
1678:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_14
1679:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_16
1680:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLLI2S_MUL_20
1681:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1682:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLLI2S_GetMultiplicator(void)
1683:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1684:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL3MUL));
1685:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1686:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1687:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1688:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1689:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1690:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLLI2S_SUPPORT */
1691:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1692:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLL2_SUPPORT)
1693:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_PLL2 PLL2
1694:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
ARM GAS  /tmp/cc2ZcXc2.s 			page 36


1695:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1696:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1697:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1698:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Enable PLL2
1699:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL2ON        LL_RCC_PLL2_Enable
1700:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1701:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1702:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL2_Enable(void)
1703:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1704:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CR, RCC_CR_PLL2ON);
1705:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1706:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1707:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1708:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Disable PLL2
1709:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL2ON        LL_RCC_PLL2_Disable
1710:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1711:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1712:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL2_Disable(void)
1713:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1714:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   CLEAR_BIT(RCC->CR, RCC_CR_PLL2ON);
1715:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1716:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1717:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1718:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLL2 Ready
1719:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CR           PLL2RDY       LL_RCC_PLL2_IsReady
1720:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1721:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1722:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL2_IsReady(void)
1723:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1724:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CR, RCC_CR_PLL2RDY) == (RCC_CR_PLL2RDY));
1725:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1726:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1727:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1728:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Configure PLL2 used for PLL2 Domain
1729:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PREDIV2       LL_RCC_PLL_ConfigDomain_PLL2\n
1730:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         CFGR2        PLL2MUL       LL_RCC_PLL_ConfigDomain_PLL2
1731:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Divider This parameter can be one of the following values:
1732:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_1
1733:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_2
1734:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_3
1735:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_4
1736:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_5
1737:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_6
1738:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_7
1739:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_8
1740:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_9
1741:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_10
1742:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_11
1743:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_12
1744:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_13
1745:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_14
1746:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_15
1747:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_HSE_PREDIV2_DIV_16
1748:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @param  Multiplicator This parameter can be one of the following values:
1749:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_8
1750:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_9
1751:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_10
ARM GAS  /tmp/cc2ZcXc2.s 			page 37


1752:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_11
1753:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_12
1754:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_13
1755:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_14
1756:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_16
1757:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_20
1758:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1759:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1760:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_ConfigDomain_PLL2(uint32_t Divider, uint32_t Multiplicator)
1761:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1762:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   MODIFY_REG(RCC->CFGR2, RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL, Divider | Multiplicator);
1763:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1764:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1765:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1766:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Get PLL2 Multiplication Factor
1767:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CFGR2        PLL2MUL       LL_RCC_PLL2_GetMultiplicator
1768:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval Returned value can be one of the following values:
1769:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_8
1770:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_9
1771:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_10
1772:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_11
1773:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_12
1774:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_13
1775:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_14
1776:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_16
1777:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   *         @arg @ref LL_RCC_PLL2_MUL_20
1778:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1779:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_PLL2_GetMultiplicator(void)
1780:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1781:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (uint32_t)(READ_BIT(RCC->CFGR2, RCC_CFGR2_PLL2MUL));
1782:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1783:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1784:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1785:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @}
1786:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1787:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLL2_SUPPORT */
1788:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1789:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
1790:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @{
1791:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1792:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1793:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1794:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear LSI ready interrupt flag
1795:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         LSIRDYC       LL_RCC_ClearFlag_LSIRDY
1796:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1797:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1798:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_LSIRDY(void)
1799:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1800:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC);
1801:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1802:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1803:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1804:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear LSE ready interrupt flag
1805:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         LSERDYC       LL_RCC_ClearFlag_LSERDY
1806:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1807:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1808:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_LSERDY(void)
ARM GAS  /tmp/cc2ZcXc2.s 			page 38


1809:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1810:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_LSERDYC);
1811:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1812:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1813:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1814:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear HSI ready interrupt flag
1815:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         HSIRDYC       LL_RCC_ClearFlag_HSIRDY
1816:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1817:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1818:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_HSIRDY(void)
1819:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1820:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_HSIRDYC);
1821:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1822:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1823:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1824:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear HSE ready interrupt flag
1825:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         HSERDYC       LL_RCC_ClearFlag_HSERDY
1826:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1827:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1828:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_HSERDY(void)
1829:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1830:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_HSERDYC);
1831:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1832:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1833:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1834:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear PLL ready interrupt flag
1835:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         PLLRDYC       LL_RCC_ClearFlag_PLLRDY
1836:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1837:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1838:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_PLLRDY(void)
1839:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1840:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_PLLRDYC);
1841:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1842:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1843:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLLI2S_SUPPORT)
1844:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1845:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear PLLI2S ready interrupt flag
1846:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR          PLL3RDYC      LL_RCC_ClearFlag_PLLI2SRDY
1847:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1848:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1849:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_PLLI2SRDY(void)
1850:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1851:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_PLL3RDYC);
1852:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1853:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLLI2S_SUPPORT */
1854:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1855:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLL2_SUPPORT)
1856:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1857:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear PLL2 ready interrupt flag
1858:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR          PLL2RDYC      LL_RCC_ClearFlag_PLL2RDY
1859:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1860:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1861:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_PLL2RDY(void)
1862:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1863:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_PLL2RDYC);
1864:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1865:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLL2_SUPPORT */
ARM GAS  /tmp/cc2ZcXc2.s 			page 39


1866:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1867:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1868:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Clear Clock security system interrupt flag
1869:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         CSSC          LL_RCC_ClearFlag_HSECSS
1870:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
1871:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1872:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearFlag_HSECSS(void)
1873:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1874:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CIR, RCC_CIR_CSSC);
1875:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1876:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1877:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1878:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if LSI ready interrupt occurred or not
1879:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         LSIRDYF       LL_RCC_IsActiveFlag_LSIRDY
1880:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1881:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1882:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSIRDY(void)
1883:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1884:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_LSIRDYF) == (RCC_CIR_LSIRDYF));
1885:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1886:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1887:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1888:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if LSE ready interrupt occurred or not
1889:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         LSERDYF       LL_RCC_IsActiveFlag_LSERDY
1890:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1891:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1892:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LSERDY(void)
1893:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1894:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_LSERDYF) == (RCC_CIR_LSERDYF));
1895:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1896:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1897:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1898:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if HSI ready interrupt occurred or not
1899:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         HSIRDYF       LL_RCC_IsActiveFlag_HSIRDY
1900:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1901:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1902:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSIRDY(void)
1903:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1904:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_HSIRDYF) == (RCC_CIR_HSIRDYF));
1905:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1906:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1907:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1908:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if HSE ready interrupt occurred or not
1909:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         HSERDYF       LL_RCC_IsActiveFlag_HSERDY
1910:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1911:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1912:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSERDY(void)
1913:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1914:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_HSERDYF) == (RCC_CIR_HSERDYF));
1915:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1916:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1917:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1918:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLL ready interrupt occurred or not
1919:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         PLLRDYF       LL_RCC_IsActiveFlag_PLLRDY
1920:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1921:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1922:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLRDY(void)
ARM GAS  /tmp/cc2ZcXc2.s 			page 40


1923:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1924:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_PLLRDYF) == (RCC_CIR_PLLRDYF));
1925:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1926:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1927:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLLI2S_SUPPORT)
1928:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1929:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLLI2S ready interrupt occurred or not
1930:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR          PLL3RDYF      LL_RCC_IsActiveFlag_PLLI2SRDY
1931:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1932:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1933:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLLI2SRDY(void)
1934:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1935:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_PLL3RDYF) == (RCC_CIR_PLL3RDYF));
1936:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1937:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLLI2S_SUPPORT */
1938:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1939:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #if defined(RCC_PLL2_SUPPORT)
1940:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1941:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if PLL2 ready interrupt occurred or not
1942:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR          PLL2RDYF      LL_RCC_IsActiveFlag_PLL2RDY
1943:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1944:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1945:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PLL2RDY(void)
1946:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1947:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_PLL2RDYF) == (RCC_CIR_PLL2RDYF));
1948:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1949:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /* RCC_PLL2_SUPPORT */
1950:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1951:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1952:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if Clock security system interrupt occurred or not
1953:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CIR         CSSF          LL_RCC_IsActiveFlag_HSECSS
1954:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1955:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1956:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_HSECSS(void)
1957:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1958:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CIR, RCC_CIR_CSSF) == (RCC_CIR_CSSF));
1959:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1960:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1961:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1962:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag Independent Watchdog reset is set or not.
1963:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          IWDGRSTF      LL_RCC_IsActiveFlag_IWDGRST
1964:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1965:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1966:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_IWDGRST(void)
1967:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1968:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_IWDGRSTF) == (RCC_CSR_IWDGRSTF));
1969:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1970:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1971:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1972:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag Low Power reset is set or not.
1973:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          LPWRRSTF      LL_RCC_IsActiveFlag_LPWRRST
1974:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1975:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1976:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_LPWRRST(void)
1977:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1978:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_LPWRRSTF) == (RCC_CSR_LPWRRSTF));
1979:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
ARM GAS  /tmp/cc2ZcXc2.s 			page 41


1980:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1981:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1982:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag Pin reset is set or not.
1983:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          PINRSTF       LL_RCC_IsActiveFlag_PINRST
1984:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1985:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1986:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PINRST(void)
1987:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1988:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_PINRSTF) == (RCC_CSR_PINRSTF));
1989:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
1990:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
1991:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
1992:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag POR/PDR reset is set or not.
1993:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          PORRSTF       LL_RCC_IsActiveFlag_PORRST
1994:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
1995:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
1996:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_PORRST(void)
1997:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
1998:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_PORRSTF) == (RCC_CSR_PORRSTF));
1999:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
2000:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
2001:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
2002:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag Software reset is set or not.
2003:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          SFTRSTF       LL_RCC_IsActiveFlag_SFTRST
2004:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
2005:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
2006:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_SFTRST(void)
2007:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
2008:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_SFTRSTF) == (RCC_CSR_SFTRSTF));
2009:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
2010:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
2011:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
2012:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Check if RCC flag Window Watchdog reset is set or not.
2013:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          WWDGRSTF      LL_RCC_IsActiveFlag_WWDGRST
2014:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval State of bit (1 or 0).
2015:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
2016:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_IsActiveFlag_WWDGRST(void)
2017:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
2018:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   return (READ_BIT(RCC->CSR, RCC_CSR_WWDGRSTF) == (RCC_CSR_WWDGRSTF));
2019:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
2020:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** 
2021:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** /**
2022:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @brief  Set RMVF bit to clear the reset flags.
2023:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @rmtoll CSR          RMVF          LL_RCC_ClearResetFlags
2024:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   * @retval None
2025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   */
2026:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_ClearResetFlags(void)
 142              		.loc 2 2026 22 view .LVU36
 143              	.LBB55:
2027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
2028:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h ****   SET_BIT(RCC->CSR, RCC_CSR_RMVF);
 144              		.loc 2 2028 3 view .LVU37
 145 0058 5A6A     		ldr	r2, [r3, #36]
 146 005a 42F08072 		orr	r2, r2, #16777216
 147 005e 5A62     		str	r2, [r3, #36]
 148              	.LBE55:
 149              	.LBE54:
ARM GAS  /tmp/cc2ZcXc2.s 			page 42


 153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return SUCCESS;
 150              		.loc 1 154 3 view .LVU38
 155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 151              		.loc 1 155 1 is_stmt 0 view .LVU39
 152 0060 7047     		bx	lr
 153              	.L6:
 154 0062 00BF     		.align	2
 155              	.L5:
 156 0064 00100240 		.word	1073876992
 157              		.cfi_endproc
 158              	.LFE147:
 160              		.section	.text.RCC_GetHCLKClockFreq,"ax",%progbits
 161              		.align	1
 162              		.global	RCC_GetHCLKClockFreq
 163              		.syntax unified
 164              		.thumb
 165              		.thumb_func
 167              	RCC_GetHCLKClockFreq:
 168              	.LVL4:
 169              	.LFB152:
 156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @}
 159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup RCC_LL_EF_Get_Freq
 162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses c
 163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         and different peripheral clocks available on the device.
 164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
 165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
 166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   If SYSCLK source is PLL, function returns values based on
 167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
 168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   (**) HSI_VALUE is a defined constant but the real value may vary
 169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *              depending on the variations in voltage and temperature.
 170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   (***) HSE_VALUE is a defined constant, user has to ensure that
 171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *               HSE_VALUE is same as the real frequency of the crystal used.
 172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *               Otherwise, this function may have wrong result.
 173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   The result of this function could be incorrect when using fractional
 174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         value for HSE crystal.
 175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   This function can be used by the user application to compute the
 176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         baud-rate for the communication peripherals or configure other parameters.
 177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
 178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return the frequencies of different on chip clocks;  System, AHB, APB1 and APB2 buses c
 182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @note   Each time SYSCLK, HCLK, PCLK1 and/or PCLK2 clock changes, this function
 183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         must be called to update structure fields. Otherwise, any
 184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         configuration based on this function will be incorrect.
 185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  RCC_Clocks pointer to a @ref LL_RCC_ClocksTypeDef structure which will hold the clocks 
 186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval None
 187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** void LL_RCC_GetSystemClocksFreq(LL_RCC_ClocksTypeDef *RCC_Clocks)
 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get SYSCLK frequency */
 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   RCC_Clocks->SYSCLK_Frequency = RCC_GetSystemClockFreq();
ARM GAS  /tmp/cc2ZcXc2.s 			page 43


 192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* HCLK clock frequency */
 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   RCC_Clocks->HCLK_Frequency   = RCC_GetHCLKClockFreq(RCC_Clocks->SYSCLK_Frequency);
 195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* PCLK1 clock frequency */
 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   RCC_Clocks->PCLK1_Frequency  = RCC_GetPCLK1ClockFreq(RCC_Clocks->HCLK_Frequency);
 198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* PCLK2 clock frequency */
 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   RCC_Clocks->PCLK2_Frequency  = RCC_GetPCLK2ClockFreq(RCC_Clocks->HCLK_Frequency);
 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CFGR2_I2S2SRC)
 204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return I2Sx clock frequency
 206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  I2SxSource This parameter can be one of the following values:
 207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         @arg @ref LL_RCC_I2S2_CLKSOURCE
 208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         @arg @ref LL_RCC_I2S3_CLKSOURCE
 209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval I2S clock frequency (in Hz)
 210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource)
 212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t i2s_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
 214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Check parameter */
 216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   assert_param(IS_LL_RCC_I2S_CLKSOURCE(I2SxSource));
 217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* I2S1CLK clock frequency */
 219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   switch (LL_RCC_GetI2SClockSource(I2SxSource))
 220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_I2S2_CLKSOURCE_SYSCLK:        /*!< System clock selected as I2S clock source */
 222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_I2S3_CLKSOURCE_SYSCLK:
 223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       i2s_frequency = RCC_GetSystemClockFreq();
 224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_I2S2_CLKSOURCE_PLLI2S_VCO:    /*!< PLLI2S oscillator clock selected as I2S clock so
 227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_I2S3_CLKSOURCE_PLLI2S_VCO:
 228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     default:
 229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       i2s_frequency = RCC_PLLI2S_GetFreqDomain_I2S() * 2U;
 230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   }
 232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return i2s_frequency;
 234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CFGR2_I2S2SRC */
 236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(USB) || defined(USB_OTG_FS)
 238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return USBx clock frequency
 240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  USBxSource This parameter can be one of the following values:
 241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         @arg @ref LL_RCC_USB_CLKSOURCE
 242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval USB clock frequency (in Hz)
 243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         @arg @ref LL_RCC_PERIPH_FREQUENCY_NO indicates that oscillator (HSI), HSE or PLL is not
 244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
 248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 44


 249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Check parameter */
 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   assert_param(IS_LL_RCC_USB_CLKSOURCE(USBxSource));
 251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* USBCLK clock frequency */
 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   switch (LL_RCC_GetUSBClockSource(USBxSource))
 254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CFGR_USBPRE)
 256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_USB_CLKSOURCE_PLL:        /* PLL clock used as USB clock source */
 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       if (LL_RCC_PLL_IsReady())
 258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****         usb_frequency = RCC_PLL_GetFreqDomain_SYS();
 260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5:        /* PLL clock divided by 1.5 used as USB clock sou
 264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     default:
 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       if (LL_RCC_PLL_IsReady())
 266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****         usb_frequency = (RCC_PLL_GetFreqDomain_SYS() * 3U) / 2U;
 268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CFGR_USBPRE */
 271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_CFGR_OTGFSPRE)
 272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     /* USBCLK = PLLVCO/2
 273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****               = (2 x PLLCLK) / 2
 274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****               = PLLCLK */
 275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_USB_CLKSOURCE_PLL_DIV_2:        /* PLL clock used as USB clock source */
 276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       if (LL_RCC_PLL_IsReady())
 277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****         usb_frequency = RCC_PLL_GetFreqDomain_SYS();
 279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     /* USBCLK = PLLVCO/3
 283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****               = (2 x PLLCLK) / 3 */
 284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_USB_CLKSOURCE_PLL_DIV_3:        /* PLL clock divided by 3 used as USB clock source 
 285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     default:
 286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       if (LL_RCC_PLL_IsReady())
 287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****         usb_frequency = (RCC_PLL_GetFreqDomain_SYS() * 2U) / 3U;
 289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_CFGR_OTGFSPRE */
 292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   }
 293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return usb_frequency;
 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* USB */
 297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return ADCx clock frequency
 300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  ADCxSource This parameter can be one of the following values:
 301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   *         @arg @ref LL_RCC_ADC_CLKSOURCE
 302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval ADC clock frequency (in Hz)
 303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource)
 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
ARM GAS  /tmp/cc2ZcXc2.s 			page 45


 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t adc_prescaler = 0U;
 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t adc_frequency = 0U;
 308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Check parameter */
 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   assert_param(IS_LL_RCC_ADC_CLKSOURCE(ADCxSource));
 311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get ADC prescaler */
 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   adc_prescaler = LL_RCC_GetADCClockSource(ADCxSource);
 314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* ADC frequency = PCLK2 frequency / ADC prescaler (2, 4, 6 or 8) */
 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   adc_frequency = RCC_GetPCLK2ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()))
 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****                   / (((adc_prescaler >> POSITION_VAL(ADCxSource)) + 1U) * 2U);
 318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return adc_frequency;
 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @}
 324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @}
 328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /** @addtogroup RCC_LL_Private_Functions
 331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @{
 332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return SYSTEM clock frequency
 336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval SYSTEM clock frequency (in Hz)
 337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetSystemClockFreq(void)
 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t frequency = 0U;
 341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get SYSCLK source -------------------------------------------------------*/
 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   switch (LL_RCC_GetSysClkSource())
 344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_SYS_CLKSOURCE_STATUS_HSI:  /* HSI used as system clock  source */
 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       frequency = HSI_VALUE;
 347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_SYS_CLKSOURCE_STATUS_HSE:  /* HSE used as system clock  source */
 350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       frequency = HSE_VALUE;
 351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_SYS_CLKSOURCE_STATUS_PLL:  /* PLL used as system clock  source */
 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       frequency = RCC_PLL_GetFreqDomain_SYS();
 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     default:
 358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       frequency = HSI_VALUE;
 359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   }
 361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return frequency;
ARM GAS  /tmp/cc2ZcXc2.s 			page 46


 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return HCLK clock frequency
 367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  SYSCLK_Frequency SYSCLK clock frequency
 368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval HCLK clock frequency (in Hz)
 369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetHCLKClockFreq(uint32_t SYSCLK_Frequency)
 371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 170              		.loc 1 371 1 is_stmt 1 view -0
 171              		.cfi_startproc
 172              		@ args = 0, pretend = 0, frame = 0
 173              		@ frame_needed = 0, uses_anonymous_args = 0
 174              		@ link register save eliminated.
 372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* HCLK clock frequency */
 373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return __LL_RCC_CALC_HCLK_FREQ(SYSCLK_Frequency, LL_RCC_GetAHBPrescaler());
 175              		.loc 1 373 3 view .LVU41
 176              	.LBB56:
 177              	.LBI56:
1096:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 178              		.loc 2 1096 26 view .LVU42
 179              	.LBB57:
1098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 180              		.loc 2 1098 3 view .LVU43
1098:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 181              		.loc 2 1098 21 is_stmt 0 view .LVU44
 182 0000 034B     		ldr	r3, .L8
 183 0002 5B68     		ldr	r3, [r3, #4]
 184              	.LBE57:
 185              	.LBE56:
 186              		.loc 1 373 10 view .LVU45
 187 0004 C3F30313 		ubfx	r3, r3, #4, #4
 188 0008 024A     		ldr	r2, .L8+4
 189 000a D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
 374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 190              		.loc 1 374 1 view .LVU46
 191 000c D840     		lsrs	r0, r0, r3
 192              	.LVL5:
 193              		.loc 1 374 1 view .LVU47
 194 000e 7047     		bx	lr
 195              	.L9:
 196              		.align	2
 197              	.L8:
 198 0010 00100240 		.word	1073876992
 199 0014 00000000 		.word	AHBPrescTable
 200              		.cfi_endproc
 201              	.LFE152:
 203              		.section	.text.RCC_GetPCLK1ClockFreq,"ax",%progbits
 204              		.align	1
 205              		.global	RCC_GetPCLK1ClockFreq
 206              		.syntax unified
 207              		.thumb
 208              		.thumb_func
 210              	RCC_GetPCLK1ClockFreq:
 211              	.LVL6:
 212              	.LFB153:
 375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 47


 376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return PCLK1 clock frequency
 378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  HCLK_Frequency HCLK clock frequency
 379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval PCLK1 clock frequency (in Hz)
 380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetPCLK1ClockFreq(uint32_t HCLK_Frequency)
 382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 213              		.loc 1 382 1 is_stmt 1 view -0
 214              		.cfi_startproc
 215              		@ args = 0, pretend = 0, frame = 0
 216              		@ frame_needed = 0, uses_anonymous_args = 0
 217              		@ link register save eliminated.
 383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* PCLK1 clock frequency */
 384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
 218              		.loc 1 384 3 view .LVU49
 219              	.LBB58:
 220              	.LBI58:
1111:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 221              		.loc 2 1111 26 view .LVU50
 222              	.LBB59:
1113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 223              		.loc 2 1113 3 view .LVU51
1113:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 224              		.loc 2 1113 21 is_stmt 0 view .LVU52
 225 0000 034B     		ldr	r3, .L11
 226 0002 5B68     		ldr	r3, [r3, #4]
 227              	.LBE59:
 228              	.LBE58:
 229              		.loc 1 384 10 view .LVU53
 230 0004 C3F30223 		ubfx	r3, r3, #8, #3
 231 0008 024A     		ldr	r2, .L11+4
 232 000a D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
 385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 233              		.loc 1 385 1 view .LVU54
 234 000c D840     		lsrs	r0, r0, r3
 235              	.LVL7:
 236              		.loc 1 385 1 view .LVU55
 237 000e 7047     		bx	lr
 238              	.L12:
 239              		.align	2
 240              	.L11:
 241 0010 00100240 		.word	1073876992
 242 0014 00000000 		.word	APBPrescTable
 243              		.cfi_endproc
 244              	.LFE153:
 246              		.section	.text.RCC_GetPCLK2ClockFreq,"ax",%progbits
 247              		.align	1
 248              		.global	RCC_GetPCLK2ClockFreq
 249              		.syntax unified
 250              		.thumb
 251              		.thumb_func
 253              	RCC_GetPCLK2ClockFreq:
 254              	.LVL8:
 255              	.LFB154:
 386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return PCLK2 clock frequency
ARM GAS  /tmp/cc2ZcXc2.s 			page 48


 389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @param  HCLK_Frequency HCLK clock frequency
 390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval PCLK2 clock frequency (in Hz)
 391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_GetPCLK2ClockFreq(uint32_t HCLK_Frequency)
 393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 256              		.loc 1 393 1 is_stmt 1 view -0
 257              		.cfi_startproc
 258              		@ args = 0, pretend = 0, frame = 0
 259              		@ frame_needed = 0, uses_anonymous_args = 0
 260              		@ link register save eliminated.
 394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* PCLK2 clock frequency */
 395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
 261              		.loc 1 395 3 view .LVU57
 262              	.LBB60:
 263              	.LBI60:
1126:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 264              		.loc 2 1126 26 view .LVU58
 265              	.LBB61:
1128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 266              		.loc 2 1128 3 view .LVU59
1128:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 267              		.loc 2 1128 21 is_stmt 0 view .LVU60
 268 0000 034B     		ldr	r3, .L14
 269 0002 5B68     		ldr	r3, [r3, #4]
 270              	.LBE61:
 271              	.LBE60:
 272              		.loc 1 395 10 view .LVU61
 273 0004 C3F3C223 		ubfx	r3, r3, #11, #3
 274 0008 024A     		ldr	r2, .L14+4
 275 000a D35C     		ldrb	r3, [r2, r3]	@ zero_extendqisi2
 396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 276              		.loc 1 396 1 view .LVU62
 277 000c D840     		lsrs	r0, r0, r3
 278              	.LVL9:
 279              		.loc 1 396 1 view .LVU63
 280 000e 7047     		bx	lr
 281              	.L15:
 282              		.align	2
 283              	.L14:
 284 0010 00100240 		.word	1073876992
 285 0014 00000000 		.word	APBPrescTable
 286              		.cfi_endproc
 287              	.LFE154:
 289              		.section	.text.RCC_PLL_GetFreqDomain_SYS,"ax",%progbits
 290              		.align	1
 291              		.global	RCC_PLL_GetFreqDomain_SYS
 292              		.syntax unified
 293              		.thumb
 294              		.thumb_func
 296              	RCC_PLL_GetFreqDomain_SYS:
 297              	.LFB155:
 397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** /**
 399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @brief  Return PLL clock frequency used for system domain
 400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   * @retval PLL clock frequency (in Hz)
 401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   */
 402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** uint32_t RCC_PLL_GetFreqDomain_SYS(void)
ARM GAS  /tmp/cc2ZcXc2.s 			page 49


 403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** {
 298              		.loc 1 403 1 is_stmt 1 view -0
 299              		.cfi_startproc
 300              		@ args = 0, pretend = 0, frame = 0
 301              		@ frame_needed = 0, uses_anonymous_args = 0
 302              		@ link register save eliminated.
 404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t pllinputfreq = 0U, pllsource = 0U;
 303              		.loc 1 404 3 view .LVU65
 304              	.LVL10:
 405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* PLL_VCO = (HSE_VALUE, HSI_VALUE or PLL2 / PLL Predivider) * PLL Multiplicator */
 407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get PLL source */
 409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   pllsource = LL_RCC_PLL_GetMainSource();
 305              		.loc 1 409 3 view .LVU66
 306              	.LBB62:
 307              	.LBI62:
1518:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 308              		.loc 2 1518 26 view .LVU67
 309              	.LBB63:
1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 310              		.loc 2 1525 3 view .LVU68
1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 311              		.loc 2 1525 21 is_stmt 0 view .LVU69
 312 0000 0B4B     		ldr	r3, .L20
 313 0002 5B68     		ldr	r3, [r3, #4]
1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 314              		.loc 2 1525 10 view .LVU70
 315 0004 03F48033 		and	r3, r3, #65536
 316              	.LVL11:
1525:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1SRC*/
 317              		.loc 2 1525 10 view .LVU71
 318              	.LBE63:
 319              	.LBE62:
 410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   switch (pllsource)
 320              		.loc 1 411 3 is_stmt 1 view .LVU72
 321 0008 43B9     		cbnz	r3, .L19
 412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_PLLSOURCE_HSI_DIV_2: /* HSI used as PLL clock source */
 414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       pllinputfreq = HSI_VALUE / 2U;
 322              		.loc 1 414 20 is_stmt 0 view .LVU73
 323 000a 0A48     		ldr	r0, .L20+4
 324              	.LVL12:
 325              	.L17:
 415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_PLLSOURCE_HSE:       /* HSE used as PLL clock source */
 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       pllinputfreq = HSE_VALUE / (LL_RCC_PLL_GetPrediv() + 1U);
 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #if defined(RCC_PLL2_SUPPORT)
 422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     case LL_RCC_PLLSOURCE_PLL2:       /* PLL2 used as PLL clock source */
 423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       pllinputfreq = RCC_PLL2_GetFreqClockFreq() / (LL_RCC_PLL_GetPrediv() + 1U);
 424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* RCC_PLL2_SUPPORT */
 426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 50


 427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****     default:
 428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       pllinputfreq = HSI_VALUE / 2U;
 429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   }
 431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   return __LL_RCC_CALC_PLLCLK_FREQ(pllinputfreq, LL_RCC_PLL_GetMultiplicator());
 326              		.loc 1 431 3 is_stmt 1 view .LVU74
 327              	.LBB64:
 328              	.LBI64:
1552:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 329              		.loc 2 1552 26 view .LVU75
 330              	.LBB65:
1554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 331              		.loc 2 1554 3 view .LVU76
1554:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 332              		.loc 2 1554 21 is_stmt 0 view .LVU77
 333 000c 084B     		ldr	r3, .L20
 334 000e 5B68     		ldr	r3, [r3, #4]
 335              	.LBE65:
 336              	.LBE64:
 337              		.loc 1 431 10 view .LVU78
 338 0010 C3F38343 		ubfx	r3, r3, #18, #4
 339 0014 0233     		adds	r3, r3, #2
 432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 340              		.loc 1 432 1 view .LVU79
 341 0016 03FB00F0 		mul	r0, r3, r0
 342              	.LVL13:
 343              		.loc 1 432 1 view .LVU80
 344 001a 7047     		bx	lr
 345              	.LVL14:
 346              	.L19:
 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 347              		.loc 1 418 7 is_stmt 1 view .LVU81
 348              	.LBB66:
 349              	.LBI66:
1582:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 350              		.loc 2 1582 26 view .LVU82
 351              	.LBB67:
1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 352              		.loc 2 1587 3 view .LVU83
1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 353              		.loc 2 1587 21 is_stmt 0 view .LVU84
 354 001c 044B     		ldr	r3, .L20
 355              	.LVL15:
1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 356              		.loc 2 1587 21 view .LVU85
 357 001e 5868     		ldr	r0, [r3, #4]
1587:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** #endif /*RCC_CFGR2_PREDIV1*/
 358              		.loc 2 1587 10 view .LVU86
 359 0020 C0F34040 		ubfx	r0, r0, #17, #1
 360              	.LBE67:
 361              	.LBE66:
 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 362              		.loc 1 418 58 view .LVU87
 363 0024 431C     		adds	r3, r0, #1
 418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 364              		.loc 1 418 20 view .LVU88
 365 0026 0448     		ldr	r0, .L20+8
ARM GAS  /tmp/cc2ZcXc2.s 			page 51


 366 0028 B0FBF3F0 		udiv	r0, r0, r3
 367              	.LVL16:
 419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 368              		.loc 1 419 7 is_stmt 1 view .LVU89
 369 002c EEE7     		b	.L17
 370              	.L21:
 371 002e 00BF     		.align	2
 372              	.L20:
 373 0030 00100240 		.word	1073876992
 374 0034 00093D00 		.word	4000000
 375 0038 00127A00 		.word	8000000
 376              		.cfi_endproc
 377              	.LFE155:
 379              		.section	.text.LL_RCC_GetUSBClockFreq,"ax",%progbits
 380              		.align	1
 381              		.global	LL_RCC_GetUSBClockFreq
 382              		.syntax unified
 383              		.thumb
 384              		.thumb_func
 386              	LL_RCC_GetUSBClockFreq:
 387              	.LVL17:
 388              	.LFB149:
 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
 389              		.loc 1 246 1 view -0
 390              		.cfi_startproc
 391              		@ args = 0, pretend = 0, frame = 0
 392              		@ frame_needed = 0, uses_anonymous_args = 0
 246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
 393              		.loc 1 246 1 is_stmt 0 view .LVU91
 394 0000 08B5     		push	{r3, lr}
 395              	.LCFI0:
 396              		.cfi_def_cfa_offset 8
 397              		.cfi_offset 3, -8
 398              		.cfi_offset 14, -4
 247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 399              		.loc 1 247 3 is_stmt 1 view .LVU92
 400              	.LVL18:
 250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 401              		.loc 1 250 3 view .LVU93
 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 402              		.loc 1 253 3 view .LVU94
 403              	.LBB68:
 404              	.LBI68:
1261:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 405              		.loc 2 1261 26 view .LVU95
 406              	.LBB69:
1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 407              		.loc 2 1263 3 view .LVU96
1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 408              		.loc 2 1263 21 is_stmt 0 view .LVU97
 409 0002 0D4B     		ldr	r3, .L28
 410 0004 5B68     		ldr	r3, [r3, #4]
1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 411              		.loc 2 1263 10 view .LVU98
 412 0006 1840     		ands	r0, r0, r3
 413              	.LVL19:
1263:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
ARM GAS  /tmp/cc2ZcXc2.s 			page 52


 414              		.loc 2 1263 10 view .LVU99
 415              	.LBE69:
 416              	.LBE68:
 253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 417              		.loc 1 253 3 view .LVU100
 418 0008 B0F5800F 		cmp	r0, #4194304
 419 000c 05D0     		beq	.L26
 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 420              		.loc 1 265 7 is_stmt 1 view .LVU101
 421              	.LBB70:
 422              	.LBI70:
1406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 423              		.loc 2 1406 26 view .LVU102
 424              	.LBB71:
1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 425              		.loc 2 1408 3 view .LVU103
1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 426              		.loc 2 1408 11 is_stmt 0 view .LVU104
 427 000e 0A4B     		ldr	r3, .L28
 428 0010 1868     		ldr	r0, [r3]
 429              	.LBE71:
 430              	.LBE70:
 265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 431              		.loc 1 265 10 view .LVU105
 432 0012 10F00070 		ands	r0, r0, #33554432
 433 0016 08D1     		bne	.L27
 434              	.LVL20:
 435              	.L22:
 295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** #endif /* USB */
 436              		.loc 1 295 1 view .LVU106
 437 0018 08BD     		pop	{r3, pc}
 438              	.LVL21:
 439              	.L26:
 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 440              		.loc 1 257 7 is_stmt 1 view .LVU107
 441              	.LBB72:
 442              	.LBI72:
1406:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 443              		.loc 2 1406 26 view .LVU108
 444              	.LBB73:
1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 445              		.loc 2 1408 3 view .LVU109
1408:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 446              		.loc 2 1408 11 is_stmt 0 view .LVU110
 447 001a 074B     		ldr	r3, .L28
 448 001c 1868     		ldr	r0, [r3]
 449              	.LBE73:
 450              	.LBE72:
 257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       {
 451              		.loc 1 257 10 view .LVU111
 452 001e 10F00070 		ands	r0, r0, #33554432
 453 0022 F9D0     		beq	.L22
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 454              		.loc 1 259 9 is_stmt 1 view .LVU112
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 455              		.loc 1 259 25 is_stmt 0 view .LVU113
 456 0024 FFF7FEFF 		bl	RCC_PLL_GetFreqDomain_SYS
ARM GAS  /tmp/cc2ZcXc2.s 			page 53


 457              	.LVL22:
 259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 458              		.loc 1 259 25 view .LVU114
 459 0028 F6E7     		b	.L22
 460              	.LVL23:
 461              	.L27:
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 462              		.loc 1 267 9 is_stmt 1 view .LVU115
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 463              		.loc 1 267 26 is_stmt 0 view .LVU116
 464 002a FFF7FEFF 		bl	RCC_PLL_GetFreqDomain_SYS
 465              	.LVL24:
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 466              		.loc 1 267 54 view .LVU117
 467 002e 00EB4000 		add	r0, r0, r0, lsl #1
 267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       }
 468              		.loc 1 267 23 view .LVU118
 469 0032 4008     		lsrs	r0, r0, #1
 470              	.LVL25:
 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 471              		.loc 1 294 3 is_stmt 1 view .LVU119
 294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 472              		.loc 1 294 10 is_stmt 0 view .LVU120
 473 0034 F0E7     		b	.L22
 474              	.L29:
 475 0036 00BF     		.align	2
 476              	.L28:
 477 0038 00100240 		.word	1073876992
 478              		.cfi_endproc
 479              	.LFE149:
 481              		.section	.text.RCC_GetSystemClockFreq,"ax",%progbits
 482              		.align	1
 483              		.global	RCC_GetSystemClockFreq
 484              		.syntax unified
 485              		.thumb
 486              		.thumb_func
 488              	RCC_GetSystemClockFreq:
 489              	.LFB151:
 339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t frequency = 0U;
 490              		.loc 1 339 1 is_stmt 1 view -0
 491              		.cfi_startproc
 492              		@ args = 0, pretend = 0, frame = 0
 493              		@ frame_needed = 0, uses_anonymous_args = 0
 494 0000 08B5     		push	{r3, lr}
 495              	.LCFI1:
 496              		.cfi_def_cfa_offset 8
 497              		.cfi_offset 3, -8
 498              		.cfi_offset 14, -4
 340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 499              		.loc 1 340 3 view .LVU122
 500              	.LVL26:
 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 501              		.loc 1 343 3 view .LVU123
 502              	.LBB74:
 503              	.LBI74:
1025:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 504              		.loc 2 1025 26 view .LVU124
ARM GAS  /tmp/cc2ZcXc2.s 			page 54


 505              	.LBB75:
1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 506              		.loc 2 1027 3 view .LVU125
1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 507              		.loc 2 1027 21 is_stmt 0 view .LVU126
 508 0002 054B     		ldr	r3, .L35
 509 0004 5B68     		ldr	r3, [r3, #4]
1027:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 510              		.loc 2 1027 10 view .LVU127
 511 0006 03F00C03 		and	r3, r3, #12
 512              	.LBE75:
 513              	.LBE74:
 343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   {
 514              		.loc 1 343 3 view .LVU128
 515 000a 082B     		cmp	r3, #8
 516 000c 01D0     		beq	.L34
 346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 517              		.loc 1 346 17 view .LVU129
 518 000e 0348     		ldr	r0, .L35+4
 519              	.LVL27:
 362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 520              		.loc 1 362 3 is_stmt 1 view .LVU130
 521              	.L30:
 363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 522              		.loc 1 363 1 is_stmt 0 view .LVU131
 523 0010 08BD     		pop	{r3, pc}
 524              	.LVL28:
 525              	.L34:
 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 526              		.loc 1 354 7 is_stmt 1 view .LVU132
 354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****       break;
 527              		.loc 1 354 19 is_stmt 0 view .LVU133
 528 0012 FFF7FEFF 		bl	RCC_PLL_GetFreqDomain_SYS
 529              	.LVL29:
 355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 530              		.loc 1 355 7 is_stmt 1 view .LVU134
 531 0016 FBE7     		b	.L30
 532              	.L36:
 533              		.align	2
 534              	.L35:
 535 0018 00100240 		.word	1073876992
 536 001c 00127A00 		.word	8000000
 537              		.cfi_endproc
 538              	.LFE151:
 540              		.section	.text.LL_RCC_GetSystemClocksFreq,"ax",%progbits
 541              		.align	1
 542              		.global	LL_RCC_GetSystemClocksFreq
 543              		.syntax unified
 544              		.thumb
 545              		.thumb_func
 547              	LL_RCC_GetSystemClocksFreq:
 548              	.LVL30:
 549              	.LFB148:
 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get SYSCLK frequency */
 550              		.loc 1 189 1 view -0
 551              		.cfi_startproc
 552              		@ args = 0, pretend = 0, frame = 0
ARM GAS  /tmp/cc2ZcXc2.s 			page 55


 553              		@ frame_needed = 0, uses_anonymous_args = 0
 189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   /* Get SYSCLK frequency */
 554              		.loc 1 189 1 is_stmt 0 view .LVU136
 555 0000 10B5     		push	{r4, lr}
 556              	.LCFI2:
 557              		.cfi_def_cfa_offset 8
 558              		.cfi_offset 4, -8
 559              		.cfi_offset 14, -4
 560 0002 0446     		mov	r4, r0
 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 561              		.loc 1 191 3 is_stmt 1 view .LVU137
 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 562              		.loc 1 191 34 is_stmt 0 view .LVU138
 563 0004 FFF7FEFF 		bl	RCC_GetSystemClockFreq
 564              	.LVL31:
 191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 565              		.loc 1 191 32 view .LVU139
 566 0008 2060     		str	r0, [r4]
 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 567              		.loc 1 194 3 is_stmt 1 view .LVU140
 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 568              		.loc 1 194 34 is_stmt 0 view .LVU141
 569 000a FFF7FEFF 		bl	RCC_GetHCLKClockFreq
 570              	.LVL32:
 194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 571              		.loc 1 194 32 view .LVU142
 572 000e 6060     		str	r0, [r4, #4]
 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 573              		.loc 1 197 3 is_stmt 1 view .LVU143
 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 574              		.loc 1 197 34 is_stmt 0 view .LVU144
 575 0010 FFF7FEFF 		bl	RCC_GetPCLK1ClockFreq
 576              	.LVL33:
 197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 577              		.loc 1 197 32 view .LVU145
 578 0014 A060     		str	r0, [r4, #8]
 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 579              		.loc 1 200 3 is_stmt 1 view .LVU146
 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 580              		.loc 1 200 34 is_stmt 0 view .LVU147
 581 0016 6068     		ldr	r0, [r4, #4]
 582 0018 FFF7FEFF 		bl	RCC_GetPCLK2ClockFreq
 583              	.LVL34:
 200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 584              		.loc 1 200 32 view .LVU148
 585 001c E060     		str	r0, [r4, #12]
 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 586              		.loc 1 201 1 view .LVU149
 587 001e 10BD     		pop	{r4, pc}
 201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 588              		.loc 1 201 1 view .LVU150
 589              		.cfi_endproc
 590              	.LFE148:
 592              		.section	.text.LL_RCC_GetADCClockFreq,"ax",%progbits
 593              		.align	1
 594              		.global	LL_RCC_GetADCClockFreq
 595              		.syntax unified
ARM GAS  /tmp/cc2ZcXc2.s 			page 56


 596              		.thumb
 597              		.thumb_func
 599              	LL_RCC_GetADCClockFreq:
 600              	.LVL35:
 601              	.LFB150:
 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t adc_prescaler = 0U;
 602              		.loc 1 305 1 is_stmt 1 view -0
 603              		.cfi_startproc
 604              		@ args = 0, pretend = 0, frame = 0
 605              		@ frame_needed = 0, uses_anonymous_args = 0
 305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t adc_prescaler = 0U;
 606              		.loc 1 305 1 is_stmt 0 view .LVU152
 607 0000 38B5     		push	{r3, r4, r5, lr}
 608              	.LCFI3:
 609              		.cfi_def_cfa_offset 16
 610              		.cfi_offset 3, -16
 611              		.cfi_offset 4, -12
 612              		.cfi_offset 5, -8
 613              		.cfi_offset 14, -4
 614 0002 0546     		mov	r5, r0
 306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****   uint32_t adc_frequency = 0U;
 615              		.loc 1 306 3 is_stmt 1 view .LVU153
 616              	.LVL36:
 307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 617              		.loc 1 307 3 view .LVU154
 310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 618              		.loc 1 310 3 view .LVU155
 313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 619              		.loc 1 313 3 view .LVU156
 620              	.LBB76:
 621              	.LBI76:
1278:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** {
 622              		.loc 2 1278 26 view .LVU157
 623              	.LBB77:
1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 624              		.loc 2 1280 3 view .LVU158
1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 625              		.loc 2 1280 21 is_stmt 0 view .LVU159
 626 0004 094B     		ldr	r3, .L41
 627 0006 5C68     		ldr	r4, [r3, #4]
1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 628              		.loc 2 1280 10 view .LVU160
 629 0008 0440     		ands	r4, r4, r0
 630              	.LVL37:
1280:Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h **** }
 631              		.loc 2 1280 10 view .LVU161
 632              	.LBE77:
 633              	.LBE76:
 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****                   / (((adc_prescaler >> POSITION_VAL(ADCxSource)) + 1U) * 2U);
 634              		.loc 1 316 3 is_stmt 1 view .LVU162
 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****                   / (((adc_prescaler >> POSITION_VAL(ADCxSource)) + 1U) * 2U);
 635              		.loc 1 316 19 is_stmt 0 view .LVU163
 636 000a FFF7FEFF 		bl	RCC_GetSystemClockFreq
 637              	.LVL38:
 316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c ****                   / (((adc_prescaler >> POSITION_VAL(ADCxSource)) + 1U) * 2U);
 638              		.loc 1 316 19 view .LVU164
 639 000e FFF7FEFF 		bl	RCC_GetHCLKClockFreq
ARM GAS  /tmp/cc2ZcXc2.s 			page 57


 640              	.LVL39:
 641 0012 FFF7FEFF 		bl	RCC_GetPCLK2ClockFreq
 642              	.LVL40:
 643              	.LBB78:
 644              	.LBI78:
 645              		.file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V5.0.4
   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     09. April 2018
   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
   8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
   9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  16:Drivers/CMSIS/Include/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  18:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
  23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  36:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  38:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ASM
  41:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __INLINE
  44:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE                 
  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
  51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
ARM GAS  /tmp/cc2ZcXc2.s 			page 58


  52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
  56:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __WEAK
  59:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED
  62:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Drivers/CMSIS/Include/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
ARM GAS  /tmp/cc2ZcXc2.s 			page 59


 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 120:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 121:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 122:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
 127:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 128:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 131:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 136:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 137:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
 138:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 139:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 142:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 147:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Control Register
 148:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the Control Register.
 149:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Control Register value
 150:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 153:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 155:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
 156:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 162:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Control Register (non-secure)
 163:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the non-secure Control Register when in secure mode.
 164:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               non-secure Control Register value
 165:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
ARM GAS  /tmp/cc2ZcXc2.s 			page 60


 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 168:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 170:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
 171:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 177:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Control Register
 178:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
 179:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
 180:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
 182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 183:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
 184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 189:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Control Register (non-secure)
 190:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
 191:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
 192:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
 194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 195:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
 196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 201:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get IPSR Register
 202:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               IPSR Register value
 204:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
 206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 207:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 209:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 210:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 213:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 215:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get APSR Register
 216:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
 217:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               APSR Register value
 218:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
 220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 221:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 61


 223:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
 224:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 229:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get xPSR Register
 230:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
 231:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               xPSR Register value
 232:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
 234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 235:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 237:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
 238:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 243:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
 244:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
 245:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSP Register value
 246:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
 248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 249:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 251:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
 252:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 258:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer (non-secure)
 259:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
 260:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSP Register value
 261:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
 263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 264:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 266:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
 267:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 270:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 273:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
 274:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
 275:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
 276:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
 278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 279:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
ARM GAS  /tmp/cc2ZcXc2.s 			page 62


 280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 285:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
 286:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
 287:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
 288:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
 290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 291:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
 292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 297:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
 298:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
 299:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
 300:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
 302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 303:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 305:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
 306:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 312:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer (non-secure)
 313:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
 314:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
 315:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
 317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 318:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 320:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
 321:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 327:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
 328:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
 329:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
 330:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
 332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 333:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
 334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 63


 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 339:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
 340:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
 341:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
 342:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
 344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 345:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
 346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 352:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
 353:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
 354:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               SP Register value
 355:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
 357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 358:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 360:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
 361:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 366:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
 367:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
 368:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfStack  Stack Pointer value to set
 369:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
 371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 372:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
 373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 378:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask
 379:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
 380:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
 381:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 384:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 386:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 387:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 393:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask (non-secure)
ARM GAS  /tmp/cc2ZcXc2.s 			page 64


 394:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
 395:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
 396:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
 398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 399:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 401:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
 402:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 408:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask
 409:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Priority Mask Register.
 410:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
 411:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
 413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 414:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 420:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask (non-secure)
 421:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
 422:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
 423:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
 425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 426:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
 427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 432:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 433:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 435:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable FIQ
 436:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
 437:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 438:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
 440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 441:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie f" : : : "memory");
 442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 446:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable FIQ
 447:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables FIQ interrupts by setting the F-bit in the CPSR.
 448:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 449:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
ARM GAS  /tmp/cc2ZcXc2.s 			page 65


 451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 452:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid f" : : : "memory");
 453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 457:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Base Priority
 458:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Base Priority register.
 459:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Base Priority register value
 460:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
 462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 463:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 465:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri" : "=r" (result) );
 466:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 472:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Base Priority (non-secure)
 473:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Base Priority register when in secure state.
 474:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Base Priority register value
 475:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
 477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 478:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 480:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
 481:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 487:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority
 488:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Base Priority register.
 489:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 490:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
 492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 493:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
 494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 499:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority (non-secure)
 500:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Base Priority register when in secure state.
 501:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 502:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
 504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 505:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
 506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS  /tmp/cc2ZcXc2.s 			page 66


 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 511:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority with condition
 512:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
 513:Drivers/CMSIS/Include/cmsis_gcc.h ****            or the new value increases the BASEPRI priority level.
 514:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 515:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
 517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 518:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
 519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 523:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask
 524:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Fault Mask register.
 525:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
 526:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
 528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 529:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 531:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
 532:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 538:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask (non-secure)
 539:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Fault Mask register when in secure state.
 540:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
 541:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
 543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 544:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 546:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
 547:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 553:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Fault Mask
 554:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Fault Mask register.
 555:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    faultMask  Fault Mask value to set
 556:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
 558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 559:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
 560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS  /tmp/cc2ZcXc2.s 			page 67


 565:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Fault Mask (non-secure)
 566:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
 567:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    faultMask  Fault Mask value to set
 568:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
 570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 571:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
 572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 576:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 577:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 581:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 584:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer Limit
 585:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 586:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always in non-secure
 587:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 588:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 589:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
 590:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSPLIM Register value
 591:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 595:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 596:Drivers/CMSIS/Include/cmsis_gcc.h ****     // without main extensions, the non-secure PSPLIM is RAZ/WI
 597:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 599:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 600:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
 601:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 607:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer Limit (non-secure)
 608:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 609:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always.
 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 611:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
 612:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSPLIM Register value
 613:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
 615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 617:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 618:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 620:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 621:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
ARM GAS  /tmp/cc2ZcXc2.s 			page 68


 622:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 629:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer Limit
 630:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 631:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored in non-secure
 632:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 633:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 634:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
 635:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
 636:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 640:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 641:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 642:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)ProcStackPtrLimit;
 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 644:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 651:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
 652:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 653:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored.
 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 655:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
 656:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
 657:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
 659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 661:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 662:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)ProcStackPtrLimit;
 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 664:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 669:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 671:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit
 672:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 673:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always in non-secure
 674:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 676:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
 677:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSPLIM Register value
 678:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
ARM GAS  /tmp/cc2ZcXc2.s 			page 69


 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 682:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 683:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 684:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 686:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 687:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msplim" : "=r" (result) );
 688:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 695:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit (non-secure)
 696:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 697:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always.
 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 699:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
 700:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSPLIM Register value
 701:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
 703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 705:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 706:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 708:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 709:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
 710:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 717:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer Limit
 718:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 719:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored in non-secure
 720:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 722:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
 723:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
 724:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 728:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 729:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 730:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)MainStackPtrLimit;
 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 732:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 70


 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 739:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer Limit (non-secure)
 740:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 741:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored.
 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 743:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
 744:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
 745:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 749:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 750:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)MainStackPtrLimit;
 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 752:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 758:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 762:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get FPSCR
 763:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Floating Point Status/Control register.
 764:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Floating Point Status/Control register value
 765:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
 767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
 769:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 
 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
 773:Drivers/CMSIS/Include/cmsis_gcc.h ****   /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
 774:Drivers/CMSIS/Include/cmsis_gcc.h ****   return __builtin_arm_get_fpscr();
 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 776:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 778:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
 779:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 782:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(0U);
 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 788:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set FPSCR
 789:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Floating Point Status/Control register.
 790:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    fpscr  Floating Point Status/Control value to set
 791:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
ARM GAS  /tmp/cc2ZcXc2.s 			page 71


 793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
 795:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
 799:Drivers/CMSIS/Include/cmsis_gcc.h ****   /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
 800:Drivers/CMSIS/Include/cmsis_gcc.h ****   __builtin_arm_set_fpscr(fpscr);
 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 802:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 805:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)fpscr;
 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 815:Drivers/CMSIS/Include/cmsis_gcc.h ****   Access to dedicated instructions
 816:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
 820:Drivers/CMSIS/Include/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 821:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 833:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   No Operation
 834:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 835:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 839:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Wait For Interrupt
 840:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 841:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi")
 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 846:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Wait For Event
 847:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 848:Drivers/CMSIS/Include/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 849:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
ARM GAS  /tmp/cc2ZcXc2.s 			page 72


 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe")
 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 854:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Send Event
 855:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 856:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 861:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 862:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 863:Drivers/CMSIS/Include/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 864:Drivers/CMSIS/Include/cmsis_gcc.h ****            after the instruction has been completed.
 865:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
 867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 868:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 873:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
 874:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 875:Drivers/CMSIS/Include/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 876:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 879:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 884:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Data Memory Barrier
 885:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 886:Drivers/CMSIS/Include/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 887:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 890:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 895:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
 896:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
 897:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 898:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 899:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 903:Drivers/CMSIS/Include/cmsis_gcc.h ****   return __builtin_bswap32(value);
 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 905:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 73


 907:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 908:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 914:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 915:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 916:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 917:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 918:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 921:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 923:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 924:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 929:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 930:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
 931:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 932:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 933:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
 935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
 937:Drivers/CMSIS/Include/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 939:Drivers/CMSIS/Include/cmsis_gcc.h ****   int16_t result;
 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 941:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 942:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 948:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
 949:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
 950:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
 951:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
 952:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Rotated value
 953:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
 955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 956:Drivers/CMSIS/Include/cmsis_gcc.h ****   op2 %= 32U;
 957:Drivers/CMSIS/Include/cmsis_gcc.h ****   if (op2 == 0U)
 958:Drivers/CMSIS/Include/cmsis_gcc.h ****   {
 959:Drivers/CMSIS/Include/cmsis_gcc.h ****     return op1;
 960:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 961:Drivers/CMSIS/Include/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
 962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/cc2ZcXc2.s 			page 74


 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 966:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Breakpoint
 967:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
 968:Drivers/CMSIS/Include/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
 969:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
 970:Drivers/CMSIS/Include/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
 971:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 976:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse bit order of value
 977:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
 978:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 979:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 980:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
 646              		.loc 3 981 31 is_stmt 1 view .LVU165
 647              	.LBB79:
 982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 983:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 648              		.loc 3 983 3 view .LVU166
 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 986:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 987:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 988:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
 649              		.loc 3 988 4 view .LVU167
 650              		.syntax unified
 651              	@ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
 652 0016 95FAA5F5 		rbit r5, r5
 653              	@ 0 "" 2
 654              	.LVL41:
 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 990:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 992:Drivers/CMSIS/Include/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
 993:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
 994:Drivers/CMSIS/Include/cmsis_gcc.h ****   {
 995:Drivers/CMSIS/Include/cmsis_gcc.h ****     result <<= 1U;
 996:Drivers/CMSIS/Include/cmsis_gcc.h ****     result |= value & 1U;
 997:Drivers/CMSIS/Include/cmsis_gcc.h ****     s--;
 998:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 999:Drivers/CMSIS/Include/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 655              		.loc 3 1001 3 view .LVU168
 656              		.loc 3 1001 3 is_stmt 0 view .LVU169
 657              		.thumb
 658              		.syntax unified
 659              	.LBE79:
 660              	.LBE78:
 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 661              		.loc 1 317 38 view .LVU170
 662 001a B5FA85F5 		clz	r5, r5
 663 001e EC40     		lsrs	r4, r4, r5
ARM GAS  /tmp/cc2ZcXc2.s 			page 75


 664              	.LVL42:
 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 665              		.loc 1 317 67 view .LVU171
 666 0020 0134     		adds	r4, r4, #1
 317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 667              		.loc 1 317 73 view .LVU172
 668 0022 6400     		lsls	r4, r4, #1
 669              	.LVL43:
 319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** }
 670              		.loc 1 319 3 is_stmt 1 view .LVU173
 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 671              		.loc 1 320 1 is_stmt 0 view .LVU174
 672 0024 B0FBF4F0 		udiv	r0, r0, r4
 673              	.LVL44:
 320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c **** 
 674              		.loc 1 320 1 view .LVU175
 675 0028 38BD     		pop	{r3, r4, r5, pc}
 676              	.L42:
 677 002a 00BF     		.align	2
 678              	.L41:
 679 002c 00100240 		.word	1073876992
 680              		.cfi_endproc
 681              	.LFE150:
 683              		.text
 684              	.Letext0:
 685              		.file 4 "/opt/gcc-arm/arm-none-eabi/include/machine/_default_types.h"
 686              		.file 5 "/opt/gcc-arm/arm-none-eabi/include/sys/_stdint.h"
 687              		.file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
 688              		.file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
 689              		.file 8 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h"
ARM GAS  /tmp/cc2ZcXc2.s 			page 76


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32f1xx_ll_rcc.c
     /tmp/cc2ZcXc2.s:18     .text.LL_RCC_DeInit:0000000000000000 $t
     /tmp/cc2ZcXc2.s:24     .text.LL_RCC_DeInit:0000000000000000 LL_RCC_DeInit
     /tmp/cc2ZcXc2.s:156    .text.LL_RCC_DeInit:0000000000000064 $d
     /tmp/cc2ZcXc2.s:161    .text.RCC_GetHCLKClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:167    .text.RCC_GetHCLKClockFreq:0000000000000000 RCC_GetHCLKClockFreq
     /tmp/cc2ZcXc2.s:198    .text.RCC_GetHCLKClockFreq:0000000000000010 $d
     /tmp/cc2ZcXc2.s:204    .text.RCC_GetPCLK1ClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:210    .text.RCC_GetPCLK1ClockFreq:0000000000000000 RCC_GetPCLK1ClockFreq
     /tmp/cc2ZcXc2.s:241    .text.RCC_GetPCLK1ClockFreq:0000000000000010 $d
     /tmp/cc2ZcXc2.s:247    .text.RCC_GetPCLK2ClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:253    .text.RCC_GetPCLK2ClockFreq:0000000000000000 RCC_GetPCLK2ClockFreq
     /tmp/cc2ZcXc2.s:284    .text.RCC_GetPCLK2ClockFreq:0000000000000010 $d
     /tmp/cc2ZcXc2.s:290    .text.RCC_PLL_GetFreqDomain_SYS:0000000000000000 $t
     /tmp/cc2ZcXc2.s:296    .text.RCC_PLL_GetFreqDomain_SYS:0000000000000000 RCC_PLL_GetFreqDomain_SYS
     /tmp/cc2ZcXc2.s:373    .text.RCC_PLL_GetFreqDomain_SYS:0000000000000030 $d
     /tmp/cc2ZcXc2.s:380    .text.LL_RCC_GetUSBClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:386    .text.LL_RCC_GetUSBClockFreq:0000000000000000 LL_RCC_GetUSBClockFreq
     /tmp/cc2ZcXc2.s:477    .text.LL_RCC_GetUSBClockFreq:0000000000000038 $d
     /tmp/cc2ZcXc2.s:482    .text.RCC_GetSystemClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:488    .text.RCC_GetSystemClockFreq:0000000000000000 RCC_GetSystemClockFreq
     /tmp/cc2ZcXc2.s:535    .text.RCC_GetSystemClockFreq:0000000000000018 $d
     /tmp/cc2ZcXc2.s:541    .text.LL_RCC_GetSystemClocksFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:547    .text.LL_RCC_GetSystemClocksFreq:0000000000000000 LL_RCC_GetSystemClocksFreq
     /tmp/cc2ZcXc2.s:593    .text.LL_RCC_GetADCClockFreq:0000000000000000 $t
     /tmp/cc2ZcXc2.s:599    .text.LL_RCC_GetADCClockFreq:0000000000000000 LL_RCC_GetADCClockFreq
     /tmp/cc2ZcXc2.s:679    .text.LL_RCC_GetADCClockFreq:000000000000002c $d

UNDEFINED SYMBOLS
AHBPrescTable
APBPrescTable