stm32f10x_gpio.c 23 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_gpio.c
  4. * @author MCD Application Team
  5. * @version V3.5.0
  6. * @date 11-March-2011
  7. * @brief This file provides all the GPIO firmware functions.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  19. ******************************************************************************
  20. */
  21. /* Includes ------------------------------------------------------------------*/
  22. #include "crutchs.h"
  23. #include "stm32f10x_gpio.h"
  24. #include "stm32f10x_rcc.h"
  25. /** @addtogroup STM32F10x_StdPeriph_Driver
  26. * @{
  27. */
  28. /** @defgroup GPIO
  29. * @brief GPIO driver modules
  30. * @{
  31. */
  32. /** @defgroup GPIO_Private_TypesDefinitions
  33. * @{
  34. */
  35. /**
  36. * @}
  37. */
  38. /** @defgroup GPIO_Private_Defines
  39. * @{
  40. */
  41. /* ------------ RCC registers bit address in the alias region ----------------*/
  42. #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
  43. /* --- EVENTCR Register -----*/
  44. /* Alias word address of EVOE bit */
  45. #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
  46. #define EVOE_BitNumber ((uint8_t)0x07)
  47. #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
  48. /* --- MAPR Register ---*/
  49. /* Alias word address of MII_RMII_SEL bit */
  50. #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
  51. #define MII_RMII_SEL_BitNumber ((u8)0x17)
  52. #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
  53. #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
  54. #define LSB_MASK ((uint16_t)0xFFFF)
  55. #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
  56. #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
  57. #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
  58. #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
  59. /**
  60. * @}
  61. */
  62. /** @defgroup GPIO_Private_Macros
  63. * @{
  64. */
  65. /**
  66. * @}
  67. */
  68. /** @defgroup GPIO_Private_Variables
  69. * @{
  70. */
  71. /**
  72. * @}
  73. */
  74. /** @defgroup GPIO_Private_FunctionPrototypes
  75. * @{
  76. */
  77. /**
  78. * @}
  79. */
  80. /** @defgroup GPIO_Private_Functions
  81. * @{
  82. */
  83. /**
  84. * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
  85. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  86. * @retval None
  87. */
  88. void GPIO_DeInit(GPIO_TypeDef* GPIOx)
  89. {
  90. /* Check the parameters */
  91. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  92. if (GPIOx == GPIOA)
  93. {
  94. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
  95. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
  96. }
  97. else if (GPIOx == GPIOB)
  98. {
  99. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
  100. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
  101. }
  102. else if (GPIOx == GPIOC)
  103. {
  104. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
  105. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
  106. }
  107. else if (GPIOx == GPIOD)
  108. {
  109. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
  110. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
  111. }
  112. else if (GPIOx == GPIOE)
  113. {
  114. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
  115. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
  116. }
  117. else if (GPIOx == GPIOF)
  118. {
  119. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
  120. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
  121. }
  122. else
  123. {
  124. if (GPIOx == GPIOG)
  125. {
  126. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
  127. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
  128. }
  129. }
  130. }
  131. /**
  132. * @brief Deinitializes the Alternate Functions (remap, event control
  133. * and EXTI configuration) registers to their default reset values.
  134. * @param None
  135. * @retval None
  136. */
  137. void GPIO_AFIODeInit(void)
  138. {
  139. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
  140. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
  141. }
  142. /**
  143. * @brief Initializes the GPIOx peripheral according to the specified
  144. * parameters in the GPIO_InitStruct.
  145. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  146. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
  147. * contains the configuration information for the specified GPIO peripheral.
  148. * @retval None
  149. */
  150. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  151. {
  152. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  153. uint32_t tmpreg = 0x00, pinmask = 0x00;
  154. /* Check the parameters */
  155. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  156. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  157. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  158. /*---------------------------- GPIO Mode Configuration -----------------------*/
  159. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  160. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  161. {
  162. /* Check the parameters */
  163. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  164. /* Output mode */
  165. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  166. }
  167. /*---------------------------- GPIO CRL Configuration ------------------------*/
  168. /* Configure the eight low port pins */
  169. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  170. {
  171. tmpreg = GPIOx->CRL;
  172. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  173. {
  174. pos = ((uint32_t)0x01) << pinpos;
  175. /* Get the port pins position */
  176. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  177. if (currentpin == pos)
  178. {
  179. pos = pinpos << 2;
  180. /* Clear the corresponding low control register bits */
  181. pinmask = ((uint32_t)0x0F) << pos;
  182. tmpreg &= ~pinmask;
  183. /* Write the mode configuration in the corresponding bits */
  184. tmpreg |= (currentmode << pos);
  185. /* Reset the corresponding ODR bit */
  186. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  187. {
  188. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  189. }
  190. else
  191. {
  192. /* Set the corresponding ODR bit */
  193. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  194. {
  195. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  196. }
  197. }
  198. }
  199. }
  200. GPIOx->CRL = tmpreg;
  201. }
  202. /*---------------------------- GPIO CRH Configuration ------------------------*/
  203. /* Configure the eight high port pins */
  204. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  205. {
  206. tmpreg = GPIOx->CRH;
  207. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  208. {
  209. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  210. /* Get the port pins position */
  211. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  212. if (currentpin == pos)
  213. {
  214. pos = pinpos << 2;
  215. /* Clear the corresponding high control register bits */
  216. pinmask = ((uint32_t)0x0F) << pos;
  217. tmpreg &= ~pinmask;
  218. /* Write the mode configuration in the corresponding bits */
  219. tmpreg |= (currentmode << pos);
  220. /* Reset the corresponding ODR bit */
  221. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  222. {
  223. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  224. }
  225. /* Set the corresponding ODR bit */
  226. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  227. {
  228. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  229. }
  230. }
  231. }
  232. GPIOx->CRH = tmpreg;
  233. }
  234. }
  235. /**
  236. * @brief Fills each GPIO_InitStruct member with its default value.
  237. * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
  238. * be initialized.
  239. * @retval None
  240. */
  241. void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
  242. {
  243. /* Reset GPIO init structure parameters values */
  244. GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
  245. GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
  246. GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
  247. }
  248. /**
  249. * @brief Reads the specified input port pin.
  250. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  251. * @param GPIO_Pin: specifies the port bit to read.
  252. * This parameter can be GPIO_Pin_x where x can be (0..15).
  253. * @retval The input port pin value.
  254. */
  255. uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  256. {
  257. uint8_t bitstatus = 0x00;
  258. /* Check the parameters */
  259. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  260. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  261. if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
  262. {
  263. bitstatus = (uint8_t)Bit_SET;
  264. }
  265. else
  266. {
  267. bitstatus = (uint8_t)Bit_RESET;
  268. }
  269. return bitstatus;
  270. }
  271. /**
  272. * @brief Reads the specified GPIO input data port.
  273. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  274. * @retval GPIO input data port value.
  275. */
  276. uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
  277. {
  278. /* Check the parameters */
  279. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  280. return ((uint16_t)GPIOx->IDR);
  281. }
  282. /**
  283. * @brief Reads the specified output data port bit.
  284. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  285. * @param GPIO_Pin: specifies the port bit to read.
  286. * This parameter can be GPIO_Pin_x where x can be (0..15).
  287. * @retval The output port pin value.
  288. */
  289. uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  290. {
  291. uint8_t bitstatus = 0x00;
  292. /* Check the parameters */
  293. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  294. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  295. if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
  296. {
  297. bitstatus = (uint8_t)Bit_SET;
  298. }
  299. else
  300. {
  301. bitstatus = (uint8_t)Bit_RESET;
  302. }
  303. return bitstatus;
  304. }
  305. /**
  306. * @brief Reads the specified GPIO output data port.
  307. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  308. * @retval GPIO output data port value.
  309. */
  310. uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
  311. {
  312. /* Check the parameters */
  313. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  314. return ((uint16_t)GPIOx->ODR);
  315. }
  316. /**
  317. * @brief Sets the selected data port bits.
  318. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  319. * @param GPIO_Pin: specifies the port bits to be written.
  320. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  321. * @retval None
  322. */
  323. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  324. {
  325. /* Check the parameters */
  326. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  327. assert_param(IS_GPIO_PIN(GPIO_Pin));
  328. GPIOx->BSRR = GPIO_Pin;
  329. }
  330. /**
  331. * @brief Clears the selected data port bits.
  332. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  333. * @param GPIO_Pin: specifies the port bits to be written.
  334. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  335. * @retval None
  336. */
  337. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  338. {
  339. /* Check the parameters */
  340. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  341. assert_param(IS_GPIO_PIN(GPIO_Pin));
  342. GPIOx->BRR = GPIO_Pin;
  343. }
  344. /**
  345. * @brief Sets or clears the selected data port bit.
  346. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  347. * @param GPIO_Pin: specifies the port bit to be written.
  348. * This parameter can be one of GPIO_Pin_x where x can be (0..15).
  349. * @param BitVal: specifies the value to be written to the selected bit.
  350. * This parameter can be one of the BitAction enum values:
  351. * @arg Bit_RESET: to clear the port pin
  352. * @arg Bit_SET: to set the port pin
  353. * @retval None
  354. */
  355. void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
  356. {
  357. /* Check the parameters */
  358. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  359. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  360. assert_param(IS_GPIO_BIT_ACTION(BitVal));
  361. if (BitVal != Bit_RESET)
  362. {
  363. GPIOx->BSRR = GPIO_Pin;
  364. }
  365. else
  366. {
  367. GPIOx->BRR = GPIO_Pin;
  368. }
  369. }
  370. /**
  371. * @brief Writes data to the specified GPIO data port.
  372. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  373. * @param PortVal: specifies the value to be written to the port output data register.
  374. * @retval None
  375. */
  376. void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
  377. {
  378. /* Check the parameters */
  379. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  380. GPIOx->ODR = PortVal;
  381. }
  382. /**
  383. * @brief Locks GPIO Pins configuration registers.
  384. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  385. * @param GPIO_Pin: specifies the port bit to be written.
  386. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  387. * @retval None
  388. */
  389. void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  390. {
  391. uint32_t tmp = 0x00010000;
  392. /* Check the parameters */
  393. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  394. assert_param(IS_GPIO_PIN(GPIO_Pin));
  395. tmp |= GPIO_Pin;
  396. /* Set LCKK bit */
  397. GPIOx->LCKR = tmp;
  398. /* Reset LCKK bit */
  399. GPIOx->LCKR = GPIO_Pin;
  400. /* Set LCKK bit */
  401. GPIOx->LCKR = tmp;
  402. /* Read LCKK bit*/
  403. tmp = GPIOx->LCKR;
  404. /* Read LCKK bit*/
  405. tmp = GPIOx->LCKR;
  406. }
  407. /**
  408. * @brief Selects the GPIO pin used as Event output.
  409. * @param GPIO_PortSource: selects the GPIO port to be used as source
  410. * for Event output.
  411. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
  412. * @param GPIO_PinSource: specifies the pin for the Event output.
  413. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  414. * @retval None
  415. */
  416. void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  417. {
  418. uint32_t tmpreg = 0x00;
  419. /* Check the parameters */
  420. assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
  421. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  422. tmpreg = AFIO->EVCR;
  423. /* Clear the PORT[6:4] and PIN[3:0] bits */
  424. tmpreg &= EVCR_PORTPINCONFIG_MASK;
  425. tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
  426. tmpreg |= GPIO_PinSource;
  427. AFIO->EVCR = tmpreg;
  428. }
  429. /**
  430. * @brief Enables or disables the Event Output.
  431. * @param NewState: new state of the Event output.
  432. * This parameter can be: ENABLE or DISABLE.
  433. * @retval None
  434. */
  435. void GPIO_EventOutputCmd(FunctionalState NewState)
  436. {
  437. /* Check the parameters */
  438. assert_param(IS_FUNCTIONAL_STATE(NewState));
  439. *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
  440. }
  441. /**
  442. * @brief Changes the mapping of the specified pin.
  443. * @param GPIO_Remap: selects the pin to remap.
  444. * This parameter can be one of the following values:
  445. * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
  446. * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
  447. * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
  448. * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
  449. * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
  450. * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
  451. * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
  452. * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
  453. * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
  454. * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
  455. * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
  456. * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
  457. * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
  458. * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
  459. * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
  460. * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
  461. * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
  462. * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
  463. * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
  464. * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
  465. * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
  466. * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
  467. * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
  468. * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
  469. * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
  470. * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
  471. * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
  472. * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
  473. * When the SPI3/I2S3 is remapped using this function, the SWJ is configured
  474. * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
  475. * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
  476. * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
  477. * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
  478. * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
  479. * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
  480. * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
  481. * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
  482. * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
  483. * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
  484. * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
  485. * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
  486. * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
  487. * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
  488. * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
  489. * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
  490. * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
  491. * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
  492. * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
  493. * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
  494. * only for High density Value line devices)
  495. * @param NewState: new state of the port pin remapping.
  496. * This parameter can be: ENABLE or DISABLE.
  497. * @retval None
  498. */
  499. void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
  500. {
  501. uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
  502. /* Check the parameters */
  503. assert_param(IS_GPIO_REMAP(GPIO_Remap));
  504. assert_param(IS_FUNCTIONAL_STATE(NewState));
  505. if((GPIO_Remap & 0x80000000) == 0x80000000)
  506. {
  507. tmpreg = AFIO->MAPR2;
  508. }
  509. else
  510. {
  511. tmpreg = AFIO->MAPR;
  512. }
  513. tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
  514. tmp = GPIO_Remap & LSB_MASK;
  515. if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
  516. {
  517. tmpreg &= DBGAFR_SWJCFG_MASK;
  518. AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
  519. }
  520. else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
  521. {
  522. tmp1 = ((uint32_t)0x03) << tmpmask;
  523. tmpreg &= ~tmp1;
  524. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  525. }
  526. else
  527. {
  528. tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
  529. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  530. }
  531. if (NewState != DISABLE)
  532. {
  533. tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
  534. }
  535. if((GPIO_Remap & 0x80000000) == 0x80000000)
  536. {
  537. AFIO->MAPR2 = tmpreg;
  538. }
  539. else
  540. {
  541. AFIO->MAPR = tmpreg;
  542. }
  543. }
  544. /**
  545. * @brief Selects the GPIO pin used as EXTI Line.
  546. * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
  547. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
  548. * @param GPIO_PinSource: specifies the EXTI line to be configured.
  549. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  550. * @retval None
  551. */
  552. void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  553. {
  554. uint32_t tmp = 0x00;
  555. /* Check the parameters */
  556. assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
  557. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  558. tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
  559. AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
  560. AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
  561. }
  562. /**
  563. * @brief Selects the Ethernet media interface.
  564. * @note This function applies only to STM32 Connectivity line devices.
  565. * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
  566. * This parameter can be one of the following values:
  567. * @arg GPIO_ETH_MediaInterface_MII: MII mode
  568. * @arg GPIO_ETH_MediaInterface_RMII: RMII mode
  569. * @retval None
  570. */
  571. void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
  572. {
  573. assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
  574. /* Configure MII_RMII selection bit */
  575. *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
  576. }
  577. /**
  578. * @}
  579. */
  580. /**
  581. * @}
  582. */
  583. /**
  584. * @}
  585. */
  586. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/