main.c 28 KB

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  1. #include <stdint.h>
  2. #include "system_stm32f10x.h"
  3. #include "system_stm32f10x.c"
  4. #define SD_BUFSIZE 512
  5. #define SD_BUFVALUES (SD_BUFSIZE / (sizeof(uint16_t)))
  6. #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
  7. #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
  8. #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
  9. #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
  10. #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
  11. #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
  12. #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
  13. #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
  14. #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
  15. #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
  16. #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
  17. #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
  18. #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
  19. #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
  20. #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
  21. #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
  22. #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
  23. #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
  24. #define SPI_Mode_Master ((uint16_t)0x0104)
  25. #define SPI_DataSize_8b ((uint16_t)0x0000)
  26. #define SPI_CPOL_High ((uint16_t)0x0002)
  27. #define SPI_CPHA_2Edge ((uint16_t)0x0001)
  28. #define SPI_NSS_Soft ((uint16_t)0x0200)
  29. #define SPI_NSS_Hard ((uint16_t)0x0000)
  30. #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || ((NSS) == SPI_NSS_Hard))
  31. #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
  32. #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
  33. #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
  34. #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
  35. #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
  36. #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
  37. #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
  38. #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
  39. #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
  40. ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
  41. ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
  42. ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
  43. ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
  44. ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
  45. ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
  46. ((PRESCALER) == SPI_BaudRatePrescaler_256))
  47. #define SPI_FirstBit_MSB ((uint16_t)0x0000)
  48. #define SPI_FirstBit_LSB ((uint16_t)0x0080)
  49. #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || ((BIT) == SPI_FirstBit_LSB))
  50. #define SD_CMD_GO_IDLE_STATE 0 /*!< CMD0 = 0x40 */
  51. #define SD_CMD_SEND_OP_COND 1 /*!< CMD1 = 0x41 */
  52. #define SD_CMD_SEND_CSD 9 /*!< CMD9 = 0x49 */
  53. #define SD_CMD_SEND_CID 10 /*!< CMD10 = 0x4A */
  54. #define SD_CMD_STOP_TRANSMISSION 12 /*!< CMD12 = 0x4C */
  55. #define SD_CMD_SEND_STATUS 13 /*!< CMD13 = 0x4D */
  56. #define SD_CMD_SET_BLOCKLEN 16 /*!< CMD16 = 0x50 */
  57. #define SD_CMD_READ_SINGLE_BLOCK 17 /*!< CMD17 = 0x51 */
  58. #define SD_CMD_READ_MULT_BLOCK 18 /*!< CMD18 = 0x52 */
  59. #define SD_CMD_SET_BLOCK_COUNT 23 /*!< CMD23 = 0x57 */
  60. #define SD_CMD_WRITE_SINGLE_BLOCK 24 /*!< CMD24 = 0x58 */
  61. #define SD_CMD_WRITE_MULT_BLOCK 25 /*!< CMD25 = 0x59 */
  62. #define SD_CMD_PROG_CSD 27 /*!< CMD27 = 0x5B */
  63. #define SD_CMD_SET_WRITE_PROT 28 /*!< CMD28 = 0x5C */
  64. #define SD_CMD_CLR_WRITE_PROT 29 /*!< CMD29 = 0x5D */
  65. #define SD_CMD_SEND_WRITE_PROT 30 /*!< CMD30 = 0x5E */
  66. #define SD_CMD_SD_ERASE_GRP_START 32 /*!< CMD32 = 0x60 */
  67. #define SD_CMD_SD_ERASE_GRP_END 33 /*!< CMD33 = 0x61 */
  68. #define SD_CMD_UNTAG_SECTOR 34 /*!< CMD34 = 0x62 */
  69. #define SD_CMD_ERASE_GRP_START 35 /*!< CMD35 = 0x63 */
  70. #define SD_CMD_ERASE_GRP_END 36 /*!< CMD36 = 0x64 */
  71. #define SD_CMD_UNTAG_ERASE_GROUP 37 /*!< CMD37 = 0x65 */
  72. #define SD_CMD_ERASE 38 /*!< CMD38 = 0x66 */
  73. #define SD_SPI SPI1
  74. #define SD_SPI_CLK RCC_APB2Periph_SPI1
  75. #define SD_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */
  76. #define SD_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */
  77. #define SD_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOA
  78. #define SD_SPI_MISO_PIN GPIO_Pin_6 /* PA.06 */
  79. #define SD_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */
  80. #define SD_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOA
  81. #define SD_SPI_MOSI_PIN GPIO_Pin_7 /* PA.07 */
  82. #define SD_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */
  83. #define SD_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOA
  84. #define SD_CS_PIN GPIO_Pin_4 /* PC.12 */
  85. #define SD_CS_GPIO_PORT GPIOA /* GPIOC */
  86. #define SD_CS_GPIO_CLK RCC_APB2Periph_GPIOA
  87. #define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
  88. #define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
  89. #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
  90. #define CR1_CLEAR_Mask ((uint16_t)0x3040)
  91. #define SPI_Mode_Select ((uint16_t)0xF7FF)
  92. #define CR1_SPE_Set ((uint16_t)0x0040)
  93. #define CR1_SPE_Reset ((uint16_t)0xFFBF)
  94. #define SD_CS_LOW() GPIO_ResetBits(SD_CS_GPIO_PORT, SD_CS_PIN)
  95. #define SD_CS_HIGH() GPIO_SetBits(SD_CS_GPIO_PORT, SD_CS_PIN)
  96. #define SD_DUMMY_BYTE 0xFF
  97. #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
  98. #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
  99. #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
  100. #define I2S_FLAG_UDR ((uint16_t)0x0008)
  101. #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
  102. #define SPI_FLAG_MODF ((uint16_t)0x0020)
  103. #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
  104. #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
  105. #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
  106. #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
  107. ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
  108. ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
  109. ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
  110. #ifdef USE_FULL_ASSERT
  111. #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
  112. void assert_failed(uint8_t* file, uint32_t line);
  113. #else
  114. #define assert_param(expr) ((void)0)
  115. #endif /* USE_FULL_ASSERT */
  116. typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus;
  117. int status = 10;
  118. volatile long int aa=0, bb;
  119. uint16_t SDWriteBuffer[SD_BUFVALUES];
  120. TestStatus TransferStatus = FAILED;
  121. uint16_t SD_Status = 0xFFFF;
  122. uint16_t writeBufFilled = 0;
  123. volatile uint32_t SDWriteOffset = 0;
  124. volatile uint16_t ADC1ConvertedValue = 0;
  125. uint16_t Buffer1[256] = {0}, Buffer2[256] = {0};
  126. uint8_t BuffReady = 0, BuffCount = 0, Rstatus = 1, Wstatus = 2, check = 0;
  127. uint16_t TMSTP = 0;
  128. typedef struct
  129. {
  130. uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
  131. uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
  132. uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
  133. uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
  134. uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
  135. }RCC_ClocksTypeDef;
  136. typedef struct
  137. {
  138. uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
  139. This parameter can be a value of @ref SPI_data_direction */
  140. uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
  141. This parameter can be a value of @ref SPI_mode */
  142. uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
  143. This parameter can be a value of @ref SPI_data_size */
  144. uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
  145. This parameter can be a value of @ref SPI_Clock_Polarity */
  146. uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
  147. This parameter can be a value of @ref SPI_Clock_Phase */
  148. uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
  149. hardware (NSS pin) or by software using the SSI bit.
  150. This parameter can be a value of @ref SPI_Slave_Select_management */
  151. uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
  152. used to configure the transmit and receive SCK clock.
  153. This parameter can be a value of @ref SPI_BaudRate_Prescaler.
  154. @note The communication clock is derived from the master
  155. clock. The slave clock does not need to be set. */
  156. uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
  157. This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  158. uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
  159. }SPI_InitTypeDef;
  160. typedef enum
  161. { Bit_RESET = 0,
  162. Bit_SET
  163. }BitAction;
  164. typedef enum
  165. {
  166. GPIO_Speed_10MHz = 1,
  167. GPIO_Speed_2MHz,
  168. GPIO_Speed_50MHz
  169. }GPIOSpeed_TypeDef;
  170. /**
  171. * @brief Configuration Mode enumeration
  172. */
  173. typedef enum
  174. { GPIO_Mode_AIN = 0x0,
  175. GPIO_Mode_IN_FLOATING = 0x04,
  176. GPIO_Mode_IPD = 0x28,
  177. GPIO_Mode_IPU = 0x48,
  178. GPIO_Mode_Out_OD = 0x14,
  179. GPIO_Mode_Out_PP = 0x10,
  180. GPIO_Mode_AF_OD = 0x1C,
  181. GPIO_Mode_AF_PP = 0x18
  182. }GPIOMode_TypeDef;
  183. typedef struct
  184. {
  185. uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
  186. This parameter can be any value of @ref GPIO_pins_define */
  187. GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
  188. This parameter can be a value of @ref GPIOSpeed_TypeDef */
  189. GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
  190. This parameter can be a value of @ref GPIOMode_TypeDef */
  191. }GPIO_InitTypeDef;
  192. typedef enum
  193. {
  194. /**
  195. * @brief SD reponses and error flags
  196. */
  197. SD_RESPONSE_NO_ERROR = (0x00),
  198. SD_IN_IDLE_STATE = (0x01),
  199. SD_ERASE_RESET = (0x02),
  200. SD_ILLEGAL_COMMAND = (0x04),
  201. SD_COM_CRC_ERROR = (0x08),
  202. SD_ERASE_SEQUENCE_ERROR = (0x10),
  203. SD_ADDRESS_ERROR = (0x20),
  204. SD_PARAMETER_ERROR = (0x40),
  205. SD_RESPONSE_FAILURE = (0xFF),
  206. /**
  207. * @brief Data response error
  208. */
  209. SD_DATA_OK = (0x05),
  210. SD_DATA_CRC_ERROR = (0x0B),
  211. SD_DATA_WRITE_ERROR = (0x0D),
  212. SD_DATA_OTHER_ERROR = (0xFF)
  213. } SD_Error;
  214. void SD_LowLevel_Init(void);
  215. void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
  216. void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
  217. void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
  218. void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
  219. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
  220. void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
  221. void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
  222. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
  223. uint8_t SD_WriteByte(uint8_t byte);
  224. uint8_t SD_ReadByte(void);
  225. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
  226. void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
  227. uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
  228. SD_Error SD_GoIdleState(void);
  229. void SD_SendCmd(uint8_t Cmd, uint32_t Arg, uint8_t Crc);
  230. SD_Error SD_GetResponse(uint8_t Response);
  231. uint8_t SD_GetDataResponse(void);
  232. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
  233. {
  234. FlagStatus bitstatus = RESET;
  235. /* Check the parameters */
  236. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  237. assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
  238. /* Check the status of the specified SPI/I2S flag */
  239. if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
  240. {
  241. /* SPI_I2S_FLAG is set */
  242. bitstatus = SET;
  243. }
  244. else
  245. {
  246. /* SPI_I2S_FLAG is reset */
  247. bitstatus = RESET;
  248. }
  249. /* Return the SPI_I2S_FLAG status */
  250. return bitstatus;
  251. }
  252. void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
  253. {
  254. /* Check the parameters */
  255. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  256. /* Write in the DR register the data to be sent */
  257. SPIx->DR = Data;
  258. }
  259. uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
  260. {
  261. /* Check the parameters */
  262. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  263. /* Return the data in the DR register */
  264. return SPIx->DR;
  265. }
  266. uint8_t SD_WriteByte(uint8_t Data)
  267. {
  268. /*!< Wait until the transmit buffer is empty */
  269. while(SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET)
  270. {
  271. }
  272. /*!< Send the byte */
  273. SPI_I2S_SendData(SD_SPI, Data);
  274. /*!< Wait to receive a byte*/
  275. while(SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_RXNE) == RESET)
  276. {
  277. }
  278. /*!< Return the byte read from the SPI bus */
  279. return SPI_I2S_ReceiveData(SD_SPI);
  280. }
  281. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  282. {
  283. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  284. uint32_t tmpreg = 0x00, pinmask = 0x00;
  285. /* Check the parameters */
  286. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  287. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  288. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  289. /*---------------------------- GPIO Mode Configuration -----------------------*/
  290. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  291. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  292. {
  293. /* Check the parameters */
  294. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  295. /* Output mode */
  296. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  297. }
  298. /*---------------------------- GPIO CRL Configuration ------------------------*/
  299. /* Configure the eight low port pins */
  300. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  301. {
  302. tmpreg = GPIOx->CRL;
  303. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  304. {
  305. pos = ((uint32_t)0x01) << pinpos;
  306. /* Get the port pins position */
  307. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  308. if (currentpin == pos)
  309. {
  310. pos = pinpos << 2;
  311. /* Clear the corresponding low control register bits */
  312. pinmask = ((uint32_t)0x0F) << pos;
  313. tmpreg &= ~pinmask;
  314. /* Write the mode configuration in the corresponding bits */
  315. tmpreg |= (currentmode << pos);
  316. /* Reset the corresponding ODR bit */
  317. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  318. {
  319. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  320. }
  321. else
  322. {
  323. /* Set the corresponding ODR bit */
  324. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  325. {
  326. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  327. }
  328. }
  329. }
  330. }
  331. GPIOx->CRL = tmpreg;
  332. }
  333. /*---------------------------- GPIO CRH Configuration ------------------------*/
  334. /* Configure the eight high port pins */
  335. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  336. {
  337. tmpreg = GPIOx->CRH;
  338. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  339. {
  340. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  341. /* Get the port pins position */
  342. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  343. if (currentpin == pos)
  344. {
  345. pos = pinpos << 2;
  346. /* Clear the corresponding high control register bits */
  347. pinmask = ((uint32_t)0x0F) << pos;
  348. tmpreg &= ~pinmask;
  349. /* Write the mode configuration in the corresponding bits */
  350. tmpreg |= (currentmode << pos);
  351. /* Reset the corresponding ODR bit */
  352. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  353. {
  354. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  355. }
  356. /* Set the corresponding ODR bit */
  357. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  358. {
  359. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  360. }
  361. }
  362. }
  363. GPIOx->CRH = tmpreg;
  364. }
  365. }
  366. void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
  367. {
  368. uint16_t tmpreg = 0;
  369. /* check the parameters */
  370. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  371. /* Check the SPI parameters */
  372. assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
  373. assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
  374. assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
  375. assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
  376. assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
  377. assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
  378. assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
  379. assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
  380. assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
  381. /*---------------------------- SPIx CR1 Configuration ------------------------*/
  382. /* Get the SPIx CR1 value */
  383. tmpreg = SPIx->CR1;
  384. /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
  385. tmpreg &= CR1_CLEAR_Mask;
  386. /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
  387. master/salve mode, CPOL and CPHA */
  388. /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
  389. /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
  390. /* Set LSBFirst bit according to SPI_FirstBit value */
  391. /* Set BR bits according to SPI_BaudRatePrescaler value */
  392. /* Set CPOL bit according to SPI_CPOL value */
  393. /* Set CPHA bit according to SPI_CPHA value */
  394. tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
  395. SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
  396. SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
  397. SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
  398. /* Write to SPIx CR1 */
  399. SPIx->CR1 = tmpreg;
  400. /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
  401. SPIx->I2SCFGR &= SPI_Mode_Select;
  402. /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
  403. /* Write to SPIx CRCPOLY */
  404. SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
  405. }
  406. void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  407. {
  408. /* Check the parameters */
  409. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  410. assert_param(IS_FUNCTIONAL_STATE(NewState));
  411. if (NewState != DISABLE)
  412. {
  413. /* Enable the selected SPI peripheral */
  414. SPIx->CR1 |= CR1_SPE_Set;
  415. }
  416. else
  417. {
  418. /* Disable the selected SPI peripheral */
  419. SPIx->CR1 &= CR1_SPE_Reset;
  420. }
  421. }
  422. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  423. {
  424. /* Check the parameters */
  425. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  426. assert_param(IS_GPIO_PIN(GPIO_Pin));
  427. GPIOx->BSRR = GPIO_Pin;
  428. }
  429. void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
  430. {
  431. /* Check the parameters */
  432. assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
  433. assert_param(IS_FUNCTIONAL_STATE(NewState));
  434. if (NewState != DISABLE)
  435. {
  436. RCC->APB2ENR |= RCC_APB2Periph;
  437. }
  438. else
  439. {
  440. RCC->APB2ENR &= ~RCC_APB2Periph;
  441. }
  442. }
  443. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  444. {
  445. /* Check the parameters */
  446. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  447. assert_param(IS_GPIO_PIN(GPIO_Pin));
  448. GPIOx->BRR = GPIO_Pin;
  449. }
  450. void SD_LowLevel_Init(void)
  451. {
  452. GPIO_InitTypeDef GPIO_InitStructure;
  453. SPI_InitTypeDef SPI_InitStructure;
  454. /*!< SD_SPI_CS_GPIO, SD_SPI_MOSI_GPIO, SD_SPI_MISO_GPIO, SD_SPI_DETECT_GPIO
  455. and SD_SPI_SCK_GPIO Periph clock enable */
  456. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
  457. /*!< SD_SPI Periph clock enable */
  458. RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
  459. /*!< Configure SD_SPI pins: SCK */
  460. GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN | SD_SPI_MOSI_PIN | SD_SPI_MISO_PIN;
  461. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  462. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  463. GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
  464. /*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */
  465. GPIO_InitStructure.GPIO_Pin = SD_CS_PIN;
  466. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  467. GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure);
  468. /*!< SD_SPI Config */
  469. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  470. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  471. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  472. SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
  473. SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
  474. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  475. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
  476. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  477. SPI_InitStructure.SPI_CRCPolynomial = 7;
  478. SPI_Init(SD_SPI, &SPI_InitStructure);
  479. SPI_Cmd(SD_SPI, ENABLE); /*!< SD_SPI enable */
  480. }
  481. SD_Error SD_GoIdleState(void)
  482. {
  483. /*!< SD chip select low */
  484. SD_CS_LOW();
  485. /*!< Send CMD0 (SD_CMD_GO_IDLE_STATE) to put SD in SPI mode */
  486. SD_SendCmd(SD_CMD_GO_IDLE_STATE, 0, 0x95);
  487. /*!< Wait for In Idle State Response (R1 Format) equal to 0x01 */
  488. if (SD_GetResponse(SD_IN_IDLE_STATE))
  489. {
  490. /*!< No Idle State Response: return response failue */
  491. return SD_RESPONSE_FAILURE;
  492. }
  493. /*----------Activates the card initialization process-----------*/
  494. do
  495. {
  496. /*!< SD chip select high */
  497. SD_CS_HIGH();
  498. /*!< Send Dummy byte 0xFF */
  499. SD_WriteByte(SD_DUMMY_BYTE);
  500. /*!< SD chip select low */
  501. SD_CS_LOW();
  502. /*!< Send CMD1 (Activates the card process) until response equal to 0x0 */
  503. SD_SendCmd(SD_CMD_SEND_OP_COND, 0, 0xFF);
  504. /*!< Wait for no error Response (R1 Format) equal to 0x00 */
  505. }
  506. while (SD_GetResponse(SD_RESPONSE_NO_ERROR));
  507. /*!< SD chip select high */
  508. SD_CS_HIGH();
  509. /*!< Send dummy byte 0xFF */
  510. SD_WriteByte(SD_DUMMY_BYTE);
  511. return SD_RESPONSE_NO_ERROR;
  512. }
  513. void SD_SendCmd(uint8_t Cmd, uint32_t Arg, uint8_t Crc)
  514. {
  515. uint32_t i = 0x00;
  516. uint8_t Frame[6];
  517. Frame[0] = (Cmd | 0x40); /*!< Construct byte 1 */
  518. Frame[1] = (uint8_t)(Arg >> 24); /*!< Construct byte 2 */
  519. Frame[2] = (uint8_t)(Arg >> 16); /*!< Construct byte 3 */
  520. Frame[3] = (uint8_t)(Arg >> 8); /*!< Construct byte 4 */
  521. Frame[4] = (uint8_t)(Arg); /*!< Construct byte 5 */
  522. Frame[5] = (Crc); /*!< Construct CRC: byte 6 */
  523. for (i = 0; i < 6; i++)
  524. {
  525. SD_WriteByte(Frame[i]); /*!< Send the Cmd bytes */
  526. }
  527. }
  528. SD_Error SD_GetResponse(uint8_t Response)
  529. {
  530. uint32_t Count = 0xFFF;
  531. /*!< Check if response is got or a timeout is happen */
  532. while ((SD_ReadByte() != Response) && Count)
  533. {
  534. Count--;
  535. }
  536. if (Count == 0)
  537. {
  538. /*!< After time out */
  539. return SD_RESPONSE_FAILURE;
  540. }
  541. else
  542. {
  543. /*!< Right response got */
  544. return SD_RESPONSE_NO_ERROR;
  545. }
  546. }
  547. uint8_t SD_ReadByte(void)
  548. {
  549. uint8_t Data = 0;
  550. /*!< Wait until the transmit buffer is empty */
  551. while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET)
  552. {
  553. }
  554. /*!< Send the byte */
  555. SPI_I2S_SendData(SD_SPI, SD_DUMMY_BYTE);
  556. /*!< Wait until a data is received */
  557. while (SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_RXNE) == RESET)
  558. {
  559. }
  560. /*!< Get the received data */
  561. Data = SPI_I2S_ReceiveData(SD_SPI);
  562. /*!< Return the shifted data */
  563. return Data;
  564. }
  565. uint8_t SD_GetDataResponse(void)
  566. {
  567. uint32_t i = 0;
  568. uint8_t response, rvalue;
  569. while (i <= 64)
  570. {
  571. /*!< Read resonse */
  572. response = SD_ReadByte();
  573. /*!< Mask unused bits */
  574. response &= 0x1F;
  575. switch (response)
  576. {
  577. case SD_DATA_OK:
  578. {
  579. rvalue = SD_DATA_OK;
  580. break;
  581. }
  582. case SD_DATA_CRC_ERROR:
  583. return SD_DATA_CRC_ERROR;
  584. case SD_DATA_WRITE_ERROR:
  585. return SD_DATA_WRITE_ERROR;
  586. default:
  587. {
  588. rvalue = SD_DATA_OTHER_ERROR;
  589. break;
  590. }
  591. }
  592. /*!< Exit loop in case of data ok */
  593. if (rvalue == SD_DATA_OK)
  594. break;
  595. /*!< Increment loop counter */
  596. i++;
  597. }
  598. /*!< Wait null data */
  599. while (SD_ReadByte() == 0);
  600. /*!< Return response */
  601. return response;
  602. }
  603. SD_Error SD_Init(void)
  604. {
  605. uint32_t i = 0;
  606. /*!< Initialize SD_SPI */
  607. SD_LowLevel_Init();
  608. /*!< SD chip select high */
  609. SD_CS_HIGH();
  610. /*!< Send dummy byte 0xFF, 10 times with CS high */
  611. /*!< Rise CS and MOSI for 80 clocks cycles */
  612. for (i = 0; i <= 9; i++)
  613. {
  614. /*!< Send dummy byte 0xFF */
  615. SD_WriteByte(SD_DUMMY_BYTE);
  616. }
  617. /*------------Put SD in SPI mode--------------*/
  618. /*!< SD initialized and set to SPI mode properly */
  619. return (SD_GoIdleState());
  620. }
  621. uint8_t _checkSDStatus() {
  622. if (SD_Status == SD_RESPONSE_NO_ERROR)
  623. return 0;
  624. do
  625. SD_Status = SD_Init();
  626. while (SD_Status != SD_RESPONSE_NO_ERROR);
  627. return 1;
  628. }
  629. void checkSDStatus() {
  630. while (_checkSDStatus()) {
  631. //<----><------>writeBufFilled = 0;
  632. //<----><------>SDWriteOffset = SD_WriteHeaders();
  633. }
  634. }
  635. SD_Error SD_WriteBlock_1(uint32_t WriteAddr)
  636. {
  637. Wstatus = BuffReady;
  638. BuffReady = 0;
  639. uint32_t i = 0;
  640. SD_Error rvalue = SD_RESPONSE_FAILURE;
  641. SD_CS_LOW();
  642. SD_SendCmd(SD_CMD_WRITE_SINGLE_BLOCK, WriteAddr, 0xFF);
  643. if (!SD_GetResponse(SD_RESPONSE_NO_ERROR))
  644. {
  645. SD_WriteByte(SD_DUMMY_BYTE);
  646. SD_WriteByte(0xFE);
  647. if (Wstatus == 1){
  648. for (i = 0; i < SD_BUFSIZE/2; i += 1)
  649. {
  650. SD_WriteByte(Buffer1[i]);
  651. SD_WriteByte(Buffer1[i] >> 8);
  652. }
  653. }
  654. if (Wstatus == 2){
  655. for (i = 0; i < SD_BUFSIZE/2; i += 1)
  656. {
  657. SD_WriteByte(Buffer2[i]);
  658. SD_WriteByte(Buffer2[i] >> 8);
  659. }
  660. }
  661. SD_ReadByte();
  662. SD_ReadByte();
  663. if (SD_GetDataResponse() == SD_DATA_OK)
  664. {
  665. rvalue = SD_RESPONSE_NO_ERROR;
  666. }
  667. }
  668. SD_CS_HIGH();
  669. SD_WriteByte(SD_DUMMY_BYTE);
  670. Wstatus = 0;
  671. return rvalue;
  672. }
  673. int main(void) {
  674. status = SD_Init();
  675. checkSDStatus();
  676. writeBufFilled = 0;
  677. // SD_WriteHeaders();
  678. SDWriteOffset = SD_BUFSIZE;
  679. SystemCoreClockUpdate();
  680. SysTick_Config(SystemCoreClock/10000);
  681. while (1)
  682. {
  683. if (BuffReady != 0){
  684. check=1;
  685. // SD_WriteBlock_1(SDWriteOffset);
  686. SDWriteOffset = SDWriteOffset + SD_BUFSIZE;
  687. }
  688. }
  689. }
  690. void SysTick_Handler(void) {
  691. if (Rstatus == 1 && Wstatus != 1){
  692. ADC1ConvertedValue = 0xB1;
  693. Buffer1[BuffCount] = TMSTP;
  694. BuffCount++;
  695. Buffer1[BuffCount] = ADC1ConvertedValue;
  696. BuffCount++;
  697. TMSTP++;
  698. }
  699. if (Rstatus == 2 && Wstatus != 2){
  700. ADC1ConvertedValue = 0xB2;
  701. Buffer2[BuffCount] = TMSTP;
  702. BuffCount++;
  703. Buffer2[BuffCount] = ADC1ConvertedValue;
  704. BuffCount++;
  705. TMSTP++;
  706. }
  707. if ( BuffCount == 254 && Rstatus == 1 ){
  708. Rstatus = 2;
  709. BuffReady = 1;
  710. BuffCount = 0;
  711. }
  712. if (BuffCount == 254 && Rstatus == 2){
  713. Rstatus = 1;
  714. BuffReady = 2;
  715. BuffCount = 0;
  716. }
  717. }