main.c1 20 KB

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  1. #include <stdint.h>
  2. #include "system_stm32f10x.h"
  3. #include "system_stm32f10x.c"
  4. #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
  5. #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
  6. #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
  7. #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
  8. #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
  9. #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
  10. #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
  11. #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
  12. #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
  13. #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
  14. #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
  15. #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
  16. #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
  17. #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
  18. #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
  19. #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
  20. #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
  21. #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
  22. #define SPI_Mode_Master ((uint16_t)0x0104)
  23. #define SPI_DataSize_8b ((uint16_t)0x0000)
  24. #define SPI_CPOL_High ((uint16_t)0x0002)
  25. #define SPI_CPHA_2Edge ((uint16_t)0x0001)
  26. #define SPI_NSS_Soft ((uint16_t)0x0200)
  27. #define SPI_NSS_Hard ((uint16_t)0x0000)
  28. #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || ((NSS) == SPI_NSS_Hard))
  29. #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
  30. #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
  31. #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
  32. #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
  33. #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
  34. #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
  35. #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
  36. #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
  37. #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
  38. ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
  39. ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
  40. ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
  41. ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
  42. ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
  43. ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
  44. ((PRESCALER) == SPI_BaudRatePrescaler_256))
  45. #define SPI_FirstBit_MSB ((uint16_t)0x0000)
  46. #define SPI_FirstBit_LSB ((uint16_t)0x0080)
  47. #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || ((BIT) == SPI_FirstBit_LSB))
  48. #define SD_SPI SPI1
  49. #define SD_SPI_CLK RCC_APB2Periph_SPI1
  50. #define SD_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */
  51. #define SD_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */
  52. #define SD_SPI_SCK_GPIO_CLK RCC_APB2Periph_GPIOA
  53. #define SD_SPI_MISO_PIN GPIO_Pin_6 /* PA.06 */
  54. #define SD_SPI_MISO_GPIO_PORT GPIOA /* GPIOA */
  55. #define SD_SPI_MISO_GPIO_CLK RCC_APB2Periph_GPIOA
  56. #define SD_SPI_MOSI_PIN GPIO_Pin_7 /* PA.07 */
  57. #define SD_SPI_MOSI_GPIO_PORT GPIOA /* GPIOA */
  58. #define SD_SPI_MOSI_GPIO_CLK RCC_APB2Periph_GPIOA
  59. #define SD_CS_PIN GPIO_Pin_4 /* PC.12 */
  60. #define SD_CS_GPIO_PORT GPIOA /* GPIOC */
  61. #define SD_CS_GPIO_CLK RCC_APB2Periph_GPIOA
  62. #define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
  63. #define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
  64. #define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00))
  65. #define CR1_CLEAR_Mask ((uint16_t)0x3040)
  66. #define SPI_Mode_Select ((uint16_t)0xF7FF)
  67. #define CR1_SPE_Set ((uint16_t)0x0040)
  68. #define CR1_SPE_Reset ((uint16_t)0xFFBF)
  69. #define SD_CS_LOW() GPIO_ResetBits(SD_CS_GPIO_PORT, SD_CS_PIN)
  70. #define SD_CS_HIGH() GPIO_SetBits(SD_CS_GPIO_PORT, SD_CS_PIN)
  71. #define SD_DUMMY_BYTE 0xFF
  72. #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
  73. #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
  74. #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
  75. #define I2S_FLAG_UDR ((uint16_t)0x0008)
  76. #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
  77. #define SPI_FLAG_MODF ((uint16_t)0x0020)
  78. #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
  79. #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
  80. #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
  81. #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
  82. ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
  83. ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
  84. ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
  85. #ifdef USE_FULL_ASSERT
  86. #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
  87. void assert_failed(uint8_t* file, uint32_t line);
  88. #else
  89. #define assert_param(expr) ((void)0)
  90. #endif /* USE_FULL_ASSERT */
  91. int status = 0;
  92. volatile long int aa=0, bb;
  93. typedef struct
  94. {
  95. uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */
  96. uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */
  97. uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */
  98. uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */
  99. uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */
  100. }RCC_ClocksTypeDef;
  101. typedef struct
  102. {
  103. uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
  104. This parameter can be a value of @ref SPI_data_direction */
  105. uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
  106. This parameter can be a value of @ref SPI_mode */
  107. uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
  108. This parameter can be a value of @ref SPI_data_size */
  109. uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
  110. This parameter can be a value of @ref SPI_Clock_Polarity */
  111. uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
  112. This parameter can be a value of @ref SPI_Clock_Phase */
  113. uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
  114. hardware (NSS pin) or by software using the SSI bit.
  115. This parameter can be a value of @ref SPI_Slave_Select_management */
  116. uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
  117. used to configure the transmit and receive SCK clock.
  118. This parameter can be a value of @ref SPI_BaudRate_Prescaler.
  119. @note The communication clock is derived from the master
  120. clock. The slave clock does not need to be set. */
  121. uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
  122. This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  123. uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
  124. }SPI_InitTypeDef;
  125. typedef enum
  126. { Bit_RESET = 0,
  127. Bit_SET
  128. }BitAction;
  129. typedef enum
  130. {
  131. GPIO_Speed_10MHz = 1,
  132. GPIO_Speed_2MHz,
  133. GPIO_Speed_50MHz
  134. }GPIOSpeed_TypeDef;
  135. /**
  136. * @brief Configuration Mode enumeration
  137. */
  138. typedef enum
  139. { GPIO_Mode_AIN = 0x0,
  140. GPIO_Mode_IN_FLOATING = 0x04,
  141. GPIO_Mode_IPD = 0x28,
  142. GPIO_Mode_IPU = 0x48,
  143. GPIO_Mode_Out_OD = 0x14,
  144. GPIO_Mode_Out_PP = 0x10,
  145. GPIO_Mode_AF_OD = 0x1C,
  146. GPIO_Mode_AF_PP = 0x18
  147. }GPIOMode_TypeDef;
  148. typedef struct
  149. {
  150. uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
  151. This parameter can be any value of @ref GPIO_pins_define */
  152. GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
  153. This parameter can be a value of @ref GPIOSpeed_TypeDef */
  154. GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
  155. This parameter can be a value of @ref GPIOMode_TypeDef */
  156. }GPIO_InitTypeDef;
  157. void SD_LowLevel_Init(void);
  158. void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks);
  159. void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState);
  160. void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
  161. void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
  162. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
  163. void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
  164. void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
  165. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
  166. uint8_t SD_WriteByte(uint8_t byte);
  167. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
  168. void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
  169. uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
  170. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
  171. {
  172. FlagStatus bitstatus = RESET;
  173. /* Check the parameters */
  174. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  175. assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
  176. /* Check the status of the specified SPI/I2S flag */
  177. if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
  178. {
  179. /* SPI_I2S_FLAG is set */
  180. bitstatus = SET;
  181. }
  182. else
  183. {
  184. /* SPI_I2S_FLAG is reset */
  185. bitstatus = RESET;
  186. }
  187. /* Return the SPI_I2S_FLAG status */
  188. return bitstatus;
  189. }
  190. void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
  191. {
  192. /* Check the parameters */
  193. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  194. /* Write in the DR register the data to be sent */
  195. SPIx->DR = Data;
  196. }
  197. uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
  198. {
  199. /* Check the parameters */
  200. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  201. /* Return the data in the DR register */
  202. return SPIx->DR;
  203. }
  204. uint8_t SD_WriteByte(uint8_t Data)
  205. {
  206. /*!< Wait until the transmit buffer is empty */
  207. while(SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_TXE) == RESET)
  208. {
  209. }
  210. /*!< Send the byte */
  211. SPI_I2S_SendData(SD_SPI, Data);
  212. /*!< Wait to receive a byte*/
  213. while(SPI_I2S_GetFlagStatus(SD_SPI, SPI_I2S_FLAG_RXNE) == RESET)
  214. {
  215. }
  216. /*!< Return the byte read from the SPI bus */
  217. return SPI_I2S_ReceiveData(SD_SPI);
  218. }
  219. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  220. {
  221. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  222. uint32_t tmpreg = 0x00, pinmask = 0x00;
  223. /* Check the parameters */
  224. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  225. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  226. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  227. /*---------------------------- GPIO Mode Configuration -----------------------*/
  228. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  229. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  230. {
  231. /* Check the parameters */
  232. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  233. /* Output mode */
  234. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  235. }
  236. /*---------------------------- GPIO CRL Configuration ------------------------*/
  237. /* Configure the eight low port pins */
  238. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  239. {
  240. tmpreg = GPIOx->CRL;
  241. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  242. {
  243. pos = ((uint32_t)0x01) << pinpos;
  244. /* Get the port pins position */
  245. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  246. if (currentpin == pos)
  247. {
  248. pos = pinpos << 2;
  249. /* Clear the corresponding low control register bits */
  250. pinmask = ((uint32_t)0x0F) << pos;
  251. tmpreg &= ~pinmask;
  252. /* Write the mode configuration in the corresponding bits */
  253. tmpreg |= (currentmode << pos);
  254. /* Reset the corresponding ODR bit */
  255. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  256. {
  257. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  258. }
  259. else
  260. {
  261. /* Set the corresponding ODR bit */
  262. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  263. {
  264. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  265. }
  266. }
  267. }
  268. }
  269. GPIOx->CRL = tmpreg;
  270. }
  271. /*---------------------------- GPIO CRH Configuration ------------------------*/
  272. /* Configure the eight high port pins */
  273. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  274. {
  275. tmpreg = GPIOx->CRH;
  276. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  277. {
  278. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  279. /* Get the port pins position */
  280. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  281. if (currentpin == pos)
  282. {
  283. pos = pinpos << 2;
  284. /* Clear the corresponding high control register bits */
  285. pinmask = ((uint32_t)0x0F) << pos;
  286. tmpreg &= ~pinmask;
  287. /* Write the mode configuration in the corresponding bits */
  288. tmpreg |= (currentmode << pos);
  289. /* Reset the corresponding ODR bit */
  290. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  291. {
  292. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  293. }
  294. /* Set the corresponding ODR bit */
  295. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  296. {
  297. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  298. }
  299. }
  300. }
  301. GPIOx->CRH = tmpreg;
  302. }
  303. }
  304. void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
  305. {
  306. uint16_t tmpreg = 0;
  307. /* check the parameters */
  308. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  309. /* Check the SPI parameters */
  310. assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
  311. assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
  312. assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
  313. assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
  314. assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
  315. assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
  316. assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
  317. assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
  318. assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
  319. /*---------------------------- SPIx CR1 Configuration ------------------------*/
  320. /* Get the SPIx CR1 value */
  321. tmpreg = SPIx->CR1;
  322. /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
  323. tmpreg &= CR1_CLEAR_Mask;
  324. /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
  325. master/salve mode, CPOL and CPHA */
  326. /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
  327. /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
  328. /* Set LSBFirst bit according to SPI_FirstBit value */
  329. /* Set BR bits according to SPI_BaudRatePrescaler value */
  330. /* Set CPOL bit according to SPI_CPOL value */
  331. /* Set CPHA bit according to SPI_CPHA value */
  332. tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
  333. SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
  334. SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
  335. SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
  336. /* Write to SPIx CR1 */
  337. SPIx->CR1 = tmpreg;
  338. /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
  339. SPIx->I2SCFGR &= SPI_Mode_Select;
  340. /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
  341. /* Write to SPIx CRCPOLY */
  342. SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
  343. }
  344. void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  345. {
  346. /* Check the parameters */
  347. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  348. assert_param(IS_FUNCTIONAL_STATE(NewState));
  349. if (NewState != DISABLE)
  350. {
  351. /* Enable the selected SPI peripheral */
  352. SPIx->CR1 |= CR1_SPE_Set;
  353. }
  354. else
  355. {
  356. /* Disable the selected SPI peripheral */
  357. SPIx->CR1 &= CR1_SPE_Reset;
  358. }
  359. }
  360. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  361. {
  362. /* Check the parameters */
  363. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  364. assert_param(IS_GPIO_PIN(GPIO_Pin));
  365. GPIOx->BSRR = GPIO_Pin;
  366. }
  367. void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
  368. {
  369. /* Check the parameters */
  370. assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph));
  371. assert_param(IS_FUNCTIONAL_STATE(NewState));
  372. if (NewState != DISABLE)
  373. {
  374. RCC->APB2ENR |= RCC_APB2Periph;
  375. }
  376. else
  377. {
  378. RCC->APB2ENR &= ~RCC_APB2Periph;
  379. }
  380. }
  381. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  382. {
  383. /* Check the parameters */
  384. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  385. assert_param(IS_GPIO_PIN(GPIO_Pin));
  386. GPIOx->BRR = GPIO_Pin;
  387. }
  388. void SD_LowLevel_Init(void)
  389. {
  390. GPIO_InitTypeDef GPIO_InitStructure;
  391. SPI_InitTypeDef SPI_InitStructure;
  392. /*!< SD_SPI_CS_GPIO, SD_SPI_MOSI_GPIO, SD_SPI_MISO_GPIO, SD_SPI_DETECT_GPIO
  393. and SD_SPI_SCK_GPIO Periph clock enable */
  394. RCC_APB2PeriphClockCmd(SD_CS_GPIO_CLK | SD_SPI_MOSI_GPIO_CLK | SD_SPI_MISO_GPIO_CLK |
  395. SD_SPI_SCK_GPIO_CLK, ENABLE);
  396. /*!< SD_SPI Periph clock enable */
  397. RCC_APB2PeriphClockCmd(SD_SPI_CLK, ENABLE);
  398. /*!< Configure SD_SPI pins: SCK */
  399. GPIO_InitStructure.GPIO_Pin = SD_SPI_SCK_PIN;
  400. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  401. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  402. GPIO_Init(SD_SPI_SCK_GPIO_PORT, &GPIO_InitStructure);
  403. /*!< Configure SD_SPI pins: MOSI */
  404. GPIO_InitStructure.GPIO_Pin = SD_SPI_MOSI_PIN;
  405. GPIO_Init(SD_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure);
  406. /*!< Configure SD_SPI pins: MISO */
  407. GPIO_InitStructure.GPIO_Pin = SD_SPI_MISO_PIN;
  408. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  409. GPIO_Init(SD_SPI_MISO_GPIO_PORT, &GPIO_InitStructure);
  410. /*!< Configure SD_SPI_CS_PIN pin: SD Card CS pin */
  411. GPIO_InitStructure.GPIO_Pin = SD_CS_PIN;
  412. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  413. GPIO_Init(SD_CS_GPIO_PORT, &GPIO_InitStructure);
  414. /*!< SD_SPI Config */
  415. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  416. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  417. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  418. SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
  419. SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
  420. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  421. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
  422. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  423. SPI_InitStructure.SPI_CRCPolynomial = 7;
  424. SPI_Init(SD_SPI, &SPI_InitStructure);
  425. SPI_Cmd(SD_SPI, ENABLE); /*!< SD_SPI enable */
  426. }
  427. void init_alt(){
  428. RCC->APB2ENR |= RCC_APB2Periph_GPIOA;
  429. }
  430. int main(void) {
  431. SystemCoreClockUpdate();
  432. SysTick_Config(SystemCoreClock/100);
  433. SD_LowLevel_Init();
  434. while (1) {
  435. bb=SystemCoreClock;
  436. }
  437. }
  438. void test(){
  439. if (status == 0){
  440. SD_CS_HIGH();
  441. status=1;
  442. }
  443. else
  444. {
  445. SD_CS_LOW();
  446. status=0;
  447. }
  448. }
  449. void SysTick_Handler(void) {
  450. //test();
  451. SD_CS_HIGH();
  452. for (int i = 0; i <= 9; i++)
  453. {
  454. /*!< Send dummy byte 0xFF */
  455. // SD_WriteByte(SD_DUMMY_BYTE);
  456. SPI1->DR = 0xFF;
  457. }
  458. // SD_CS_LOW();
  459. aa++;
  460. }