stm32f10x_gpio.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651
  1. /**
  2. ******************************************************************************
  3. * @file stm32f10x_gpio.c
  4. * @author MCD Application Team
  5. * @version V3.5.0
  6. * @date 11-March-2011
  7. * @brief This file provides all the GPIO firmware functions.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  12. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  13. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  14. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  15. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  16. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  17. *
  18. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  19. ******************************************************************************
  20. */
  21. /* Includes ------------------------------------------------------------------*/
  22. #include "stm32f10x_gpio.h"
  23. #include "stm32f10x_rcc.h"
  24. /** @addtogroup STM32F10x_StdPeriph_Driver
  25. * @{
  26. */
  27. /** @defgroup GPIO
  28. * @brief GPIO driver modules
  29. * @{
  30. */
  31. /** @defgroup GPIO_Private_TypesDefinitions
  32. * @{
  33. */
  34. /**
  35. * @}
  36. */
  37. /** @defgroup GPIO_Private_Defines
  38. * @{
  39. */
  40. /* ------------ RCC registers bit address in the alias region ----------------*/
  41. #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
  42. /* --- EVENTCR Register -----*/
  43. /* Alias word address of EVOE bit */
  44. #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
  45. #define EVOE_BitNumber ((uint8_t)0x07)
  46. #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
  47. /* --- MAPR Register ---*/
  48. /* Alias word address of MII_RMII_SEL bit */
  49. #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
  50. #define MII_RMII_SEL_BitNumber ((u8)0x17)
  51. #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
  52. #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
  53. #define LSB_MASK ((uint16_t)0xFFFF)
  54. #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
  55. #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
  56. #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
  57. #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
  58. /**
  59. * @}
  60. */
  61. /** @defgroup GPIO_Private_Macros
  62. * @{
  63. */
  64. /**
  65. * @}
  66. */
  67. /** @defgroup GPIO_Private_Variables
  68. * @{
  69. */
  70. /**
  71. * @}
  72. */
  73. /** @defgroup GPIO_Private_FunctionPrototypes
  74. * @{
  75. */
  76. /**
  77. * @}
  78. */
  79. /** @defgroup GPIO_Private_Functions
  80. * @{
  81. */
  82. /**
  83. * @brief Deinitializes the GPIOx peripheral registers to their default reset values.
  84. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  85. * @retval None
  86. */
  87. void GPIO_DeInit(GPIO_TypeDef* GPIOx)
  88. {
  89. /* Check the parameters */
  90. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  91. if (GPIOx == GPIOA)
  92. {
  93. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
  94. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
  95. }
  96. else if (GPIOx == GPIOB)
  97. {
  98. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
  99. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
  100. }
  101. else if (GPIOx == GPIOC)
  102. {
  103. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
  104. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
  105. }
  106. else if (GPIOx == GPIOD)
  107. {
  108. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
  109. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
  110. }
  111. else if (GPIOx == GPIOE)
  112. {
  113. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
  114. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
  115. }
  116. else if (GPIOx == GPIOF)
  117. {
  118. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
  119. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
  120. }
  121. else
  122. {
  123. if (GPIOx == GPIOG)
  124. {
  125. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
  126. RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
  127. }
  128. }
  129. }
  130. /**
  131. * @brief Deinitializes the Alternate Functions (remap, event control
  132. * and EXTI configuration) registers to their default reset values.
  133. * @param None
  134. * @retval None
  135. */
  136. void GPIO_AFIODeInit(void)
  137. {
  138. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
  139. RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
  140. }
  141. /**
  142. * @brief Initializes the GPIOx peripheral according to the specified
  143. * parameters in the GPIO_InitStruct.
  144. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  145. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
  146. * contains the configuration information for the specified GPIO peripheral.
  147. * @retval None
  148. */
  149. void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
  150. {
  151. uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
  152. uint32_t tmpreg = 0x00, pinmask = 0x00;
  153. /* Check the parameters */
  154. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  155. assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
  156. assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
  157. /*---------------------------- GPIO Mode Configuration -----------------------*/
  158. currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
  159. if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
  160. {
  161. /* Check the parameters */
  162. assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
  163. /* Output mode */
  164. currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
  165. }
  166. /*---------------------------- GPIO CRL Configuration ------------------------*/
  167. /* Configure the eight low port pins */
  168. if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
  169. {
  170. tmpreg = GPIOx->CRL;
  171. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  172. {
  173. pos = ((uint32_t)0x01) << pinpos;
  174. /* Get the port pins position */
  175. currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
  176. if (currentpin == pos)
  177. {
  178. pos = pinpos << 2;
  179. /* Clear the corresponding low control register bits */
  180. pinmask = ((uint32_t)0x0F) << pos;
  181. tmpreg &= ~pinmask;
  182. /* Write the mode configuration in the corresponding bits */
  183. tmpreg |= (currentmode << pos);
  184. /* Reset the corresponding ODR bit */
  185. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  186. {
  187. GPIOx->BRR = (((uint32_t)0x01) << pinpos);
  188. }
  189. else
  190. {
  191. /* Set the corresponding ODR bit */
  192. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  193. {
  194. GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
  195. }
  196. }
  197. }
  198. }
  199. GPIOx->CRL = tmpreg;
  200. }
  201. /*---------------------------- GPIO CRH Configuration ------------------------*/
  202. /* Configure the eight high port pins */
  203. if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
  204. {
  205. tmpreg = GPIOx->CRH;
  206. for (pinpos = 0x00; pinpos < 0x08; pinpos++)
  207. {
  208. pos = (((uint32_t)0x01) << (pinpos + 0x08));
  209. /* Get the port pins position */
  210. currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
  211. if (currentpin == pos)
  212. {
  213. pos = pinpos << 2;
  214. /* Clear the corresponding high control register bits */
  215. pinmask = ((uint32_t)0x0F) << pos;
  216. tmpreg &= ~pinmask;
  217. /* Write the mode configuration in the corresponding bits */
  218. tmpreg |= (currentmode << pos);
  219. /* Reset the corresponding ODR bit */
  220. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
  221. {
  222. GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
  223. }
  224. /* Set the corresponding ODR bit */
  225. if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
  226. {
  227. GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
  228. }
  229. }
  230. }
  231. GPIOx->CRH = tmpreg;
  232. }
  233. }
  234. /**
  235. * @brief Fills each GPIO_InitStruct member with its default value.
  236. * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
  237. * be initialized.
  238. * @retval None
  239. */
  240. void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
  241. {
  242. /* Reset GPIO init structure parameters values */
  243. GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
  244. GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
  245. GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
  246. }
  247. /**
  248. * @brief Reads the specified input port pin.
  249. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  250. * @param GPIO_Pin: specifies the port bit to read.
  251. * This parameter can be GPIO_Pin_x where x can be (0..15).
  252. * @retval The input port pin value.
  253. */
  254. uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  255. {
  256. uint8_t bitstatus = 0x00;
  257. /* Check the parameters */
  258. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  259. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  260. if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
  261. {
  262. bitstatus = (uint8_t)Bit_SET;
  263. }
  264. else
  265. {
  266. bitstatus = (uint8_t)Bit_RESET;
  267. }
  268. return bitstatus;
  269. }
  270. /**
  271. * @brief Reads the specified GPIO input data port.
  272. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  273. * @retval GPIO input data port value.
  274. */
  275. uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
  276. {
  277. /* Check the parameters */
  278. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  279. return ((uint16_t)GPIOx->IDR);
  280. }
  281. /**
  282. * @brief Reads the specified output data port bit.
  283. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  284. * @param GPIO_Pin: specifies the port bit to read.
  285. * This parameter can be GPIO_Pin_x where x can be (0..15).
  286. * @retval The output port pin value.
  287. */
  288. uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  289. {
  290. uint8_t bitstatus = 0x00;
  291. /* Check the parameters */
  292. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  293. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  294. if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
  295. {
  296. bitstatus = (uint8_t)Bit_SET;
  297. }
  298. else
  299. {
  300. bitstatus = (uint8_t)Bit_RESET;
  301. }
  302. return bitstatus;
  303. }
  304. /**
  305. * @brief Reads the specified GPIO output data port.
  306. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  307. * @retval GPIO output data port value.
  308. */
  309. uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
  310. {
  311. /* Check the parameters */
  312. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  313. return ((uint16_t)GPIOx->ODR);
  314. }
  315. /**
  316. * @brief Sets the selected data port bits.
  317. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  318. * @param GPIO_Pin: specifies the port bits to be written.
  319. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  320. * @retval None
  321. */
  322. void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  323. {
  324. /* Check the parameters */
  325. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  326. assert_param(IS_GPIO_PIN(GPIO_Pin));
  327. GPIOx->BSRR = GPIO_Pin;
  328. }
  329. /**
  330. * @brief Clears the selected data port bits.
  331. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  332. * @param GPIO_Pin: specifies the port bits to be written.
  333. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  334. * @retval None
  335. */
  336. void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  337. {
  338. /* Check the parameters */
  339. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  340. assert_param(IS_GPIO_PIN(GPIO_Pin));
  341. GPIOx->BRR = GPIO_Pin;
  342. }
  343. /**
  344. * @brief Sets or clears the selected data port bit.
  345. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  346. * @param GPIO_Pin: specifies the port bit to be written.
  347. * This parameter can be one of GPIO_Pin_x where x can be (0..15).
  348. * @param BitVal: specifies the value to be written to the selected bit.
  349. * This parameter can be one of the BitAction enum values:
  350. * @arg Bit_RESET: to clear the port pin
  351. * @arg Bit_SET: to set the port pin
  352. * @retval None
  353. */
  354. void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
  355. {
  356. /* Check the parameters */
  357. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  358. assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
  359. assert_param(IS_GPIO_BIT_ACTION(BitVal));
  360. if (BitVal != Bit_RESET)
  361. {
  362. GPIOx->BSRR = GPIO_Pin;
  363. }
  364. else
  365. {
  366. GPIOx->BRR = GPIO_Pin;
  367. }
  368. }
  369. /**
  370. * @brief Writes data to the specified GPIO data port.
  371. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  372. * @param PortVal: specifies the value to be written to the port output data register.
  373. * @retval None
  374. */
  375. void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
  376. {
  377. /* Check the parameters */
  378. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  379. GPIOx->ODR = PortVal;
  380. }
  381. /**
  382. * @brief Locks GPIO Pins configuration registers.
  383. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
  384. * @param GPIO_Pin: specifies the port bit to be written.
  385. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
  386. * @retval None
  387. */
  388. void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
  389. {
  390. uint32_t tmp = 0x00010000;
  391. /* Check the parameters */
  392. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  393. assert_param(IS_GPIO_PIN(GPIO_Pin));
  394. tmp |= GPIO_Pin;
  395. /* Set LCKK bit */
  396. GPIOx->LCKR = tmp;
  397. /* Reset LCKK bit */
  398. GPIOx->LCKR = GPIO_Pin;
  399. /* Set LCKK bit */
  400. GPIOx->LCKR = tmp;
  401. /* Read LCKK bit*/
  402. tmp = GPIOx->LCKR;
  403. /* Read LCKK bit*/
  404. tmp = GPIOx->LCKR;
  405. }
  406. /**
  407. * @brief Selects the GPIO pin used as Event output.
  408. * @param GPIO_PortSource: selects the GPIO port to be used as source
  409. * for Event output.
  410. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
  411. * @param GPIO_PinSource: specifies the pin for the Event output.
  412. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  413. * @retval None
  414. */
  415. void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  416. {
  417. uint32_t tmpreg = 0x00;
  418. /* Check the parameters */
  419. assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
  420. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  421. tmpreg = AFIO->EVCR;
  422. /* Clear the PORT[6:4] and PIN[3:0] bits */
  423. tmpreg &= EVCR_PORTPINCONFIG_MASK;
  424. tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
  425. tmpreg |= GPIO_PinSource;
  426. AFIO->EVCR = tmpreg;
  427. }
  428. /**
  429. * @brief Enables or disables the Event Output.
  430. * @param NewState: new state of the Event output.
  431. * This parameter can be: ENABLE or DISABLE.
  432. * @retval None
  433. */
  434. void GPIO_EventOutputCmd(FunctionalState NewState)
  435. {
  436. /* Check the parameters */
  437. assert_param(IS_FUNCTIONAL_STATE(NewState));
  438. *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
  439. }
  440. /**
  441. * @brief Changes the mapping of the specified pin.
  442. * @param GPIO_Remap: selects the pin to remap.
  443. * This parameter can be one of the following values:
  444. * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
  445. * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
  446. * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
  447. * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
  448. * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
  449. * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
  450. * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
  451. * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
  452. * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
  453. * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
  454. * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
  455. * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
  456. * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
  457. * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
  458. * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
  459. * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
  460. * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
  461. * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
  462. * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
  463. * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
  464. * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
  465. * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
  466. * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
  467. * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
  468. * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
  469. * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
  470. * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
  471. * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
  472. * When the SPI3/I2S3 is remapped using this function, the SWJ is configured
  473. * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
  474. * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
  475. * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
  476. * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
  477. * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
  478. * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
  479. * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
  480. * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
  481. * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
  482. * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
  483. * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
  484. * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
  485. * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
  486. * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
  487. * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
  488. * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
  489. * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
  490. * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
  491. * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
  492. * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
  493. * only for High density Value line devices)
  494. * @param NewState: new state of the port pin remapping.
  495. * This parameter can be: ENABLE or DISABLE.
  496. * @retval None
  497. */
  498. void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
  499. {
  500. uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
  501. /* Check the parameters */
  502. assert_param(IS_GPIO_REMAP(GPIO_Remap));
  503. assert_param(IS_FUNCTIONAL_STATE(NewState));
  504. if((GPIO_Remap & 0x80000000) == 0x80000000)
  505. {
  506. tmpreg = AFIO->MAPR2;
  507. }
  508. else
  509. {
  510. tmpreg = AFIO->MAPR;
  511. }
  512. tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
  513. tmp = GPIO_Remap & LSB_MASK;
  514. if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
  515. {
  516. tmpreg &= DBGAFR_SWJCFG_MASK;
  517. AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
  518. }
  519. else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
  520. {
  521. tmp1 = ((uint32_t)0x03) << tmpmask;
  522. tmpreg &= ~tmp1;
  523. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  524. }
  525. else
  526. {
  527. tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
  528. tmpreg |= ~DBGAFR_SWJCFG_MASK;
  529. }
  530. if (NewState != DISABLE)
  531. {
  532. tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
  533. }
  534. if((GPIO_Remap & 0x80000000) == 0x80000000)
  535. {
  536. AFIO->MAPR2 = tmpreg;
  537. }
  538. else
  539. {
  540. AFIO->MAPR = tmpreg;
  541. }
  542. }
  543. /**
  544. * @brief Selects the GPIO pin used as EXTI Line.
  545. * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
  546. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
  547. * @param GPIO_PinSource: specifies the EXTI line to be configured.
  548. * This parameter can be GPIO_PinSourcex where x can be (0..15).
  549. * @retval None
  550. */
  551. void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
  552. {
  553. uint32_t tmp = 0x00;
  554. /* Check the parameters */
  555. assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
  556. assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
  557. tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
  558. AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
  559. AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
  560. }
  561. /**
  562. * @brief Selects the Ethernet media interface.
  563. * @note This function applies only to STM32 Connectivity line devices.
  564. * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
  565. * This parameter can be one of the following values:
  566. * @arg GPIO_ETH_MediaInterface_MII: MII mode
  567. * @arg GPIO_ETH_MediaInterface_RMII: RMII mode
  568. * @retval None
  569. */
  570. void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
  571. {
  572. assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
  573. /* Configure MII_RMII selection bit */
  574. *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
  575. }
  576. /**
  577. * @}
  578. */
  579. /**
  580. * @}
  581. */
  582. /**
  583. * @}
  584. */
  585. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/