stm32f0xx_hal_i2c.h 32 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f0xx_hal_i2c.h
  4. * @author MCD Application Team
  5. * @version V1.5.0
  6. * @date 04-November-2016
  7. * @brief Header file of I2C HAL module.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12. *
  13. * Redistribution and use in source and binary forms, with or without modification,
  14. * are permitted provided that the following conditions are met:
  15. * 1. Redistributions of source code must retain the above copyright notice,
  16. * this list of conditions and the following disclaimer.
  17. * 2. Redistributions in binary form must reproduce the above copyright notice,
  18. * this list of conditions and the following disclaimer in the documentation
  19. * and/or other materials provided with the distribution.
  20. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  21. * may be used to endorse or promote products derived from this software
  22. * without specific prior written permission.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34. *
  35. ******************************************************************************
  36. */
  37. /* Define to prevent recursive inclusion -------------------------------------*/
  38. #ifndef __STM32F0xx_HAL_I2C_H
  39. #define __STM32F0xx_HAL_I2C_H
  40. #ifdef __cplusplus
  41. extern "C" {
  42. #endif
  43. /* Includes ------------------------------------------------------------------*/
  44. #include "stm32f0xx_hal_def.h"
  45. /** @addtogroup STM32F0xx_HAL_Driver
  46. * @{
  47. */
  48. /** @addtogroup I2C
  49. * @{
  50. */
  51. /* Exported types ------------------------------------------------------------*/
  52. /** @defgroup I2C_Exported_Types I2C Exported Types
  53. * @{
  54. */
  55. /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
  56. * @brief I2C Configuration Structure definition
  57. * @{
  58. */
  59. typedef struct
  60. {
  61. uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value.
  62. This parameter calculated by referring to I2C initialization
  63. section in Reference manual */
  64. uint32_t OwnAddress1; /*!< Specifies the first device own address.
  65. This parameter can be a 7-bit or 10-bit address. */
  66. uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
  67. This parameter can be a value of @ref I2C_ADDRESSING_MODE */
  68. uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
  69. This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
  70. uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
  71. This parameter can be a 7-bit address. */
  72. uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
  73. This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
  74. uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
  75. This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
  76. uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
  77. This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
  78. }I2C_InitTypeDef;
  79. /**
  80. * @}
  81. */
  82. /** @defgroup HAL_state_structure_definition HAL state structure definition
  83. * @brief HAL State structure definition
  84. * @note HAL I2C State value coding follow below described bitmap :\n
  85. * b7-b6 Error information\n
  86. * 00 : No Error\n
  87. * 01 : Abort (Abort user request on going)\n
  88. * 10 : Timeout\n
  89. * 11 : Error\n
  90. * b5 IP initilisation status\n
  91. * 0 : Reset (IP not initialized)\n
  92. * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
  93. * b4 (not used)\n
  94. * x : Should be set to 0\n
  95. * b3\n
  96. * 0 : Ready or Busy (No Listen mode ongoing)\n
  97. * 1 : Listen (IP in Address Listen Mode)\n
  98. * b2 Intrinsic process state\n
  99. * 0 : Ready\n
  100. * 1 : Busy (IP busy with some configuration or internal operations)\n
  101. * b1 Rx state\n
  102. * 0 : Ready (no Rx operation ongoing)\n
  103. * 1 : Busy (Rx operation ongoing)\n
  104. * b0 Tx state\n
  105. * 0 : Ready (no Tx operation ongoing)\n
  106. * 1 : Busy (Tx operation ongoing)
  107. * @{
  108. */
  109. typedef enum
  110. {
  111. HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
  112. HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
  113. HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
  114. HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
  115. HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
  116. HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
  117. HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
  118. process is ongoing */
  119. HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
  120. process is ongoing */
  121. HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
  122. HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
  123. HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
  124. }HAL_I2C_StateTypeDef;
  125. /**
  126. * @}
  127. */
  128. /** @defgroup HAL_mode_structure_definition HAL mode structure definition
  129. * @brief HAL Mode structure definition
  130. * @note HAL I2C Mode value coding follow below described bitmap :\n
  131. * b7 (not used)\n
  132. * x : Should be set to 0\n
  133. * b6\n
  134. * 0 : None\n
  135. * 1 : Memory (HAL I2C communication is in Memory Mode)\n
  136. * b5\n
  137. * 0 : None\n
  138. * 1 : Slave (HAL I2C communication is in Slave Mode)\n
  139. * b4\n
  140. * 0 : None\n
  141. * 1 : Master (HAL I2C communication is in Master Mode)\n
  142. * b3-b2-b1-b0 (not used)\n
  143. * xxxx : Should be set to 0000
  144. * @{
  145. */
  146. typedef enum
  147. {
  148. HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
  149. HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
  150. HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
  151. HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
  152. }HAL_I2C_ModeTypeDef;
  153. /**
  154. * @}
  155. */
  156. /** @defgroup I2C_Error_Code_definition I2C Error Code definition
  157. * @brief I2C Error Code definition
  158. * @{
  159. */
  160. #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
  161. #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
  162. #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
  163. #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
  164. #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
  165. #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
  166. #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
  167. #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
  168. /**
  169. * @}
  170. */
  171. /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
  172. * @brief I2C handle Structure definition
  173. * @{
  174. */
  175. typedef struct __I2C_HandleTypeDef
  176. {
  177. I2C_TypeDef *Instance; /*!< I2C registers base address */
  178. I2C_InitTypeDef Init; /*!< I2C communication parameters */
  179. uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
  180. uint16_t XferSize; /*!< I2C transfer size */
  181. __IO uint16_t XferCount; /*!< I2C transfer counter */
  182. __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
  183. be a value of @ref I2C_XFEROPTIONS */
  184. __IO uint32_t PreviousState; /*!< I2C communication Previous state */
  185. HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
  186. DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
  187. DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
  188. HAL_LockTypeDef Lock; /*!< I2C locking object */
  189. __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
  190. __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
  191. __IO uint32_t ErrorCode; /*!< I2C Error code */
  192. __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
  193. }I2C_HandleTypeDef;
  194. /**
  195. * @}
  196. */
  197. /**
  198. * @}
  199. */
  200. /* Exported constants --------------------------------------------------------*/
  201. /** @defgroup I2C_Exported_Constants I2C Exported Constants
  202. * @{
  203. */
  204. /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
  205. * @{
  206. */
  207. #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
  208. #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  209. #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
  210. #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  211. #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
  212. /**
  213. * @}
  214. */
  215. /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
  216. * @{
  217. */
  218. #define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
  219. #define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
  220. /**
  221. * @}
  222. */
  223. /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
  224. * @{
  225. */
  226. #define I2C_DUALADDRESS_DISABLE (0x00000000U)
  227. #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
  228. /**
  229. * @}
  230. */
  231. /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
  232. * @{
  233. */
  234. #define I2C_OA2_NOMASK ((uint8_t)0x00U)
  235. #define I2C_OA2_MASK01 ((uint8_t)0x01U)
  236. #define I2C_OA2_MASK02 ((uint8_t)0x02U)
  237. #define I2C_OA2_MASK03 ((uint8_t)0x03U)
  238. #define I2C_OA2_MASK04 ((uint8_t)0x04U)
  239. #define I2C_OA2_MASK05 ((uint8_t)0x05U)
  240. #define I2C_OA2_MASK06 ((uint8_t)0x06U)
  241. #define I2C_OA2_MASK07 ((uint8_t)0x07U)
  242. /**
  243. * @}
  244. */
  245. /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
  246. * @{
  247. */
  248. #define I2C_GENERALCALL_DISABLE (0x00000000U)
  249. #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
  250. /**
  251. * @}
  252. */
  253. /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
  254. * @{
  255. */
  256. #define I2C_NOSTRETCH_DISABLE (0x00000000U)
  257. #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
  258. /**
  259. * @}
  260. */
  261. /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
  262. * @{
  263. */
  264. #define I2C_MEMADD_SIZE_8BIT (0x00000001U)
  265. #define I2C_MEMADD_SIZE_16BIT (0x00000002U)
  266. /**
  267. * @}
  268. */
  269. /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
  270. * @{
  271. */
  272. #define I2C_DIRECTION_TRANSMIT (0x00000000U)
  273. #define I2C_DIRECTION_RECEIVE (0x00000001U)
  274. /**
  275. * @}
  276. */
  277. /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
  278. * @{
  279. */
  280. #define I2C_RELOAD_MODE I2C_CR2_RELOAD
  281. #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
  282. #define I2C_SOFTEND_MODE (0x00000000U)
  283. /**
  284. * @}
  285. */
  286. /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
  287. * @{
  288. */
  289. #define I2C_NO_STARTSTOP (0x00000000U)
  290. #define I2C_GENERATE_STOP I2C_CR2_STOP
  291. #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
  292. #define I2C_GENERATE_START_WRITE I2C_CR2_START
  293. /**
  294. * @}
  295. */
  296. /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
  297. * @brief I2C Interrupt definition
  298. * Elements values convention: 0xXXXXXXXX
  299. * - XXXXXXXX : Interrupt control mask
  300. * @{
  301. */
  302. #define I2C_IT_ERRI I2C_CR1_ERRIE
  303. #define I2C_IT_TCI I2C_CR1_TCIE
  304. #define I2C_IT_STOPI I2C_CR1_STOPIE
  305. #define I2C_IT_NACKI I2C_CR1_NACKIE
  306. #define I2C_IT_ADDRI I2C_CR1_ADDRIE
  307. #define I2C_IT_RXI I2C_CR1_RXIE
  308. #define I2C_IT_TXI I2C_CR1_TXIE
  309. /**
  310. * @}
  311. */
  312. /** @defgroup I2C_Flag_definition I2C Flag definition
  313. * @{
  314. */
  315. #define I2C_FLAG_TXE I2C_ISR_TXE
  316. #define I2C_FLAG_TXIS I2C_ISR_TXIS
  317. #define I2C_FLAG_RXNE I2C_ISR_RXNE
  318. #define I2C_FLAG_ADDR I2C_ISR_ADDR
  319. #define I2C_FLAG_AF I2C_ISR_NACKF
  320. #define I2C_FLAG_STOPF I2C_ISR_STOPF
  321. #define I2C_FLAG_TC I2C_ISR_TC
  322. #define I2C_FLAG_TCR I2C_ISR_TCR
  323. #define I2C_FLAG_BERR I2C_ISR_BERR
  324. #define I2C_FLAG_ARLO I2C_ISR_ARLO
  325. #define I2C_FLAG_OVR I2C_ISR_OVR
  326. #define I2C_FLAG_PECERR I2C_ISR_PECERR
  327. #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
  328. #define I2C_FLAG_ALERT I2C_ISR_ALERT
  329. #define I2C_FLAG_BUSY I2C_ISR_BUSY
  330. #define I2C_FLAG_DIR I2C_ISR_DIR
  331. /**
  332. * @}
  333. */
  334. /**
  335. * @}
  336. */
  337. /* Exported macros -----------------------------------------------------------*/
  338. /** @defgroup I2C_Exported_Macros I2C Exported Macros
  339. * @{
  340. */
  341. /** @brief Reset I2C handle state.
  342. * @param __HANDLE__ specifies the I2C Handle.
  343. * @retval None
  344. */
  345. #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
  346. /** @brief Enable the specified I2C interrupt.
  347. * @param __HANDLE__ specifies the I2C Handle.
  348. * @param __INTERRUPT__ specifies the interrupt source to enable.
  349. * This parameter can be one of the following values:
  350. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  351. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  352. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  353. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  354. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  355. * @arg @ref I2C_IT_RXI RX interrupt enable
  356. * @arg @ref I2C_IT_TXI TX interrupt enable
  357. *
  358. * @retval None
  359. */
  360. #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
  361. /** @brief Disable the specified I2C interrupt.
  362. * @param __HANDLE__ specifies the I2C Handle.
  363. * @param __INTERRUPT__ specifies the interrupt source to disable.
  364. * This parameter can be one of the following values:
  365. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  366. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  367. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  368. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  369. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  370. * @arg @ref I2C_IT_RXI RX interrupt enable
  371. * @arg @ref I2C_IT_TXI TX interrupt enable
  372. *
  373. * @retval None
  374. */
  375. #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
  376. /** @brief Check whether the specified I2C interrupt source is enabled or not.
  377. * @param __HANDLE__ specifies the I2C Handle.
  378. * @param __INTERRUPT__ specifies the I2C interrupt source to check.
  379. * This parameter can be one of the following values:
  380. * @arg @ref I2C_IT_ERRI Errors interrupt enable
  381. * @arg @ref I2C_IT_TCI Transfer complete interrupt enable
  382. * @arg @ref I2C_IT_STOPI STOP detection interrupt enable
  383. * @arg @ref I2C_IT_NACKI NACK received interrupt enable
  384. * @arg @ref I2C_IT_ADDRI Address match interrupt enable
  385. * @arg @ref I2C_IT_RXI RX interrupt enable
  386. * @arg @ref I2C_IT_TXI TX interrupt enable
  387. *
  388. * @retval The new state of __INTERRUPT__ (SET or RESET).
  389. */
  390. #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
  391. /** @brief Check whether the specified I2C flag is set or not.
  392. * @param __HANDLE__ specifies the I2C Handle.
  393. * @param __FLAG__ specifies the flag to check.
  394. * This parameter can be one of the following values:
  395. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  396. * @arg @ref I2C_FLAG_TXIS Transmit interrupt status
  397. * @arg @ref I2C_FLAG_RXNE Receive data register not empty
  398. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  399. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  400. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  401. * @arg @ref I2C_FLAG_TC Transfer complete (master mode)
  402. * @arg @ref I2C_FLAG_TCR Transfer complete reload
  403. * @arg @ref I2C_FLAG_BERR Bus error
  404. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  405. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  406. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  407. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  408. * @arg @ref I2C_FLAG_ALERT SMBus alert
  409. * @arg @ref I2C_FLAG_BUSY Bus busy
  410. * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
  411. *
  412. * @retval The new state of __FLAG__ (SET or RESET).
  413. */
  414. #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
  415. /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
  416. * @param __HANDLE__ specifies the I2C Handle.
  417. * @param __FLAG__ specifies the flag to clear.
  418. * This parameter can be any combination of the following values:
  419. * @arg @ref I2C_FLAG_TXE Transmit data register empty
  420. * @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
  421. * @arg @ref I2C_FLAG_AF Acknowledge failure received flag
  422. * @arg @ref I2C_FLAG_STOPF STOP detection flag
  423. * @arg @ref I2C_FLAG_BERR Bus error
  424. * @arg @ref I2C_FLAG_ARLO Arbitration lost
  425. * @arg @ref I2C_FLAG_OVR Overrun/Underrun
  426. * @arg @ref I2C_FLAG_PECERR PEC error in reception
  427. * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
  428. * @arg @ref I2C_FLAG_ALERT SMBus alert
  429. *
  430. * @retval None
  431. */
  432. #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
  433. : ((__HANDLE__)->Instance->ICR = (__FLAG__)))
  434. /** @brief Enable the specified I2C peripheral.
  435. * @param __HANDLE__ specifies the I2C Handle.
  436. * @retval None
  437. */
  438. #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  439. /** @brief Disable the specified I2C peripheral.
  440. * @param __HANDLE__ specifies the I2C Handle.
  441. * @retval None
  442. */
  443. #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
  444. /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
  445. * @param __HANDLE__: specifies the I2C Handle.
  446. * @retval None
  447. */
  448. #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
  449. /**
  450. * @}
  451. */
  452. /* Include I2C HAL Extended module */
  453. #include "stm32f0xx_hal_i2c_ex.h"
  454. /* Exported functions --------------------------------------------------------*/
  455. /** @addtogroup I2C_Exported_Functions
  456. * @{
  457. */
  458. /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  459. * @{
  460. */
  461. /* Initialization and de-initialization functions******************************/
  462. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
  463. HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
  464. void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
  465. void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
  466. /**
  467. * @}
  468. */
  469. /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
  470. * @{
  471. */
  472. /* IO operation functions ****************************************************/
  473. /******* Blocking mode: Polling */
  474. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  475. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  476. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  477. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  478. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  479. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
  480. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
  481. /******* Non-Blocking mode: Interrupt */
  482. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  483. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  484. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  485. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  486. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  487. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  488. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  489. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  490. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  491. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
  492. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
  493. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
  494. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
  495. /******* Non-Blocking mode: DMA */
  496. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  497. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
  498. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  499. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
  500. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  501. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
  502. /**
  503. * @}
  504. */
  505. /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  506. * @{
  507. */
  508. /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
  509. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
  510. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
  511. void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
  512. void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
  513. void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
  514. void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
  515. void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
  516. void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
  517. void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
  518. void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
  519. void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
  520. void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
  521. /**
  522. * @}
  523. */
  524. /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  525. * @{
  526. */
  527. /* Peripheral State, Mode and Error functions *********************************/
  528. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
  529. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
  530. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
  531. /**
  532. * @}
  533. */
  534. /**
  535. * @}
  536. */
  537. /* Private constants ---------------------------------------------------------*/
  538. /** @defgroup I2C_Private_Constants I2C Private Constants
  539. * @{
  540. */
  541. /**
  542. * @}
  543. */
  544. /* Private macros ------------------------------------------------------------*/
  545. /** @defgroup I2C_Private_Macro I2C Private Macros
  546. * @{
  547. */
  548. #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
  549. ((MODE) == I2C_ADDRESSINGMODE_10BIT))
  550. #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
  551. ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
  552. #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
  553. ((MASK) == I2C_OA2_MASK01) || \
  554. ((MASK) == I2C_OA2_MASK02) || \
  555. ((MASK) == I2C_OA2_MASK03) || \
  556. ((MASK) == I2C_OA2_MASK04) || \
  557. ((MASK) == I2C_OA2_MASK05) || \
  558. ((MASK) == I2C_OA2_MASK06) || \
  559. ((MASK) == I2C_OA2_MASK07))
  560. #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
  561. ((CALL) == I2C_GENERALCALL_ENABLE))
  562. #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
  563. ((STRETCH) == I2C_NOSTRETCH_ENABLE))
  564. #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
  565. ((SIZE) == I2C_MEMADD_SIZE_16BIT))
  566. #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
  567. ((MODE) == I2C_AUTOEND_MODE) || \
  568. ((MODE) == I2C_SOFTEND_MODE))
  569. #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
  570. ((REQUEST) == I2C_GENERATE_START_READ) || \
  571. ((REQUEST) == I2C_GENERATE_START_WRITE) || \
  572. ((REQUEST) == I2C_NO_STARTSTOP))
  573. #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
  574. ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
  575. ((REQUEST) == I2C_NEXT_FRAME) || \
  576. ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
  577. ((REQUEST) == I2C_LAST_FRAME))
  578. #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
  579. #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
  580. #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
  581. #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
  582. #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
  583. #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
  584. #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
  585. #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
  586. #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
  587. #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
  588. #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
  589. (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
  590. /**
  591. * @}
  592. */
  593. /* Private Functions ---------------------------------------------------------*/
  594. /** @defgroup I2C_Private_Functions I2C Private Functions
  595. * @{
  596. */
  597. /* Private functions are defined in stm32f0xx_hal_i2c.c file */
  598. /**
  599. * @}
  600. */
  601. /**
  602. * @}
  603. */
  604. /**
  605. * @}
  606. */
  607. #ifdef __cplusplus
  608. }
  609. #endif
  610. #endif /* __STM32F0xx_HAL_I2C_H */
  611. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/